From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A1CA23EC2CD; Mon, 17 Aug 2026 15:22:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786980139; cv=none; b=V+//IqH/HETUZnuFSr7C5zN94RgyJxQJ9cs/jFC5gBGgMBSxUqxCKulqw4TaHjvTbLrYL357e07+EA764E1fC9hv7uR1yr9Oo0gQE2Z7kxIaPOm0JealF2WzTJ9lK+ao9oLPV+ThwO5FaABunUM3/NbEMUBh9syyZCoidtTksgY= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786980139; c=relaxed/simple; bh=USoelgSeQrDveVcJjbJk9cYhylOKs0UTHmoB4FnRpzg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=t+IgCT4vM9J6ueciaGWViimnhY4ujw/O+R56ZWcMnyb2C/umtgFaPOGT8YNHn7z/UXrCrNxa09MYburmrmPkFBQLVXvU/NztvLdF9JFSQb5FTLT60sNfsrYbAioLFeuS4Nx7J2g5Y0NzNJdIBE4X01afOpHrmdQ7YDn46gIwREo= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=zmh4tHpf; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="zmh4tHpf" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 055AD1F000E9; Mon, 17 Aug 2026 15:22:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linuxfoundation.org; s=korg; t=1786980138; bh=GRLW6DzmQW9Hr25UcQmSPRpgBK/gUfiROylKFJn6MU8=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=zmh4tHpf7Z6lg1m/cGzwW6khED0pXIjnPINexGko99O0AI1vxfFe1CPf9oSawb/7Z MQ5PzY0E168OXvxTFq2Qql54aa37xDnNgU/0MxmUDSPGBn17+PNwqiguiuXp74Oryq 0Znazd873hN0MCdV9y3o2UIEn6SLB0E9WOjDiW0k= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Harkirat Gill , David Francis , Alex Deucher Subject: [PATCH 6.1 469/609] drm/amdgpu: cap GTT size to physical RAM on APUs Date: Mon, 17 Aug 2026 15:32:45 +0200 Message-ID: <20260817132559.678990470@linuxfoundation.org> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20260817132543.039278408@linuxfoundation.org> References: <20260817132543.039278408@linuxfoundation.org> User-Agent: quilt/0.69 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: patches@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 6.1-stable review patch. If anyone has any objections, please let me know. ------------------ From: Harkirat Gill commit 5e70f6804b4d6256058c360b10e044ee04ea4a4e upstream. On APUs, the GTT pool is backed by system RAM, but its size is not bound to the non-carveout memory that actually backs it. A user can end up with GTT + VRAM exceeding total physical memory through the following sequence: - Have a large non-carveout memory space (~128GB) and accordingly set a large GTT (~100GB) via the ttm module parameter. - Lower the non-carveout memory space in BIOS by increasing the UMA Frame Buffer Size (VRAM) to 64GB. - The previously set GTT value (~100GB) persists, even though the new non-carveout space (64GB) can no longer back it. This leads to a case where kernel reports GTT (100GB) + VRAM (64GB) despite the sum being greater than total physical memory (128GB). Cap the GTT size to totalram_pages() on APUs. totalram_pages() already excludes the VRAM carveout, so the resulting GTT can never exceed the system RAM that actually backs it. Signed-off-by: Harkirat Gill Reviewed-by: David Francis Assisted-by: Claude:claude-opus-4 Signed-off-by: Alex Deucher (cherry picked from commit 5dafdd649280c7dc6c22c8f877da3f54fcc441e1) Cc: stable@vger.kernel.org Signed-off-by: Greg Kroah-Hartman --- drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c @@ -1862,6 +1862,18 @@ int amdgpu_ttm_init(struct amdgpu_device gtt_size = (uint64_t)amdgpu_gtt_size << 20; } + /* Cap GTT so that it does not exceed total physical RAM. */ + if (adev->flags & AMD_IS_APU) { + u64 phys_ram = (u64)totalram_pages() << PAGE_SHIFT; + + if (gtt_size > phys_ram) { + gtt_size = phys_ram; + dev_info(adev->dev, + "Capping GTT to %uM to not exceed available system memory\n", + (unsigned int)(gtt_size / (1024 * 1024))); + } + } + /* Initialize GTT memory pool */ r = amdgpu_gtt_mgr_init(adev, gtt_size); if (r) {