From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E43E1F4F1; Sat, 12 Sep 2026 18:46:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789238790; cv=none; b=nkkInRlzMNkhB0L3sURYOgR83rEiE0OsCHOUXdAlPnchLrMJ7pAIL9HpfrMiOGvlRuY7iWjyPBnlUIJXiZZGHoU6EqDevfNNXW/a6KtSAiaPo2clip49c/nhnFCTPMNJyGMoL4du8GG3DGyg5RmMeezfpsNFTjroRHviBJOOznU= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789238790; c=relaxed/simple; bh=Onj27hysC4+1g9yW/0DqdCritL4Ss3LoHeUeZsz2dXo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=RDmu/a5CBZuy670OfYrrSgEI+AVmd6EgupskQLznqD+PMPkudUU2a7b78AL57y53NdbrECwtNe9M+EJnRGyXB3XoXyMPRgBYOoZa+z7pUB55fyaCxojTMoxuugRiDXbBghFGg24F/PTWZHhGnyFa286L+6ly8mj9/s2PjGCcrVw= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=Y70sbLwl; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="Y70sbLwl" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 455341F000FF; Sat, 12 Sep 2026 18:46:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linuxfoundation.org; s=korg; t=1789238788; bh=F+wPDcMSZdLqwm2CZEqq+D+qlxPRTQKvkMkik9pB/7s=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=Y70sbLwl0ycNXzT+1cjKi4nStqzBl91f9lh7qF6EpKfmH+lJ/QHEgfjgE+A8nDRBi ldqGeXZ2WlTwyZ+EGgwegSV1YUoNU6iz4tnfHzVW7b3HyolJDEzgBFDJd82zi+r6Uc 1GdWg9LzHq5CtbiGy1au1ztdlgWTYW/YKBQb5TTE= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Dmitry Baryshkov , Bjorn Andersson , Ulf Hansson , Sasha Levin Subject: [PATCH 5.15 531/935] arm64: dts: qcom: sm8250: remove mmcx regulator Date: Sat, 12 Sep 2026 08:59:21 +0200 Message-ID: <20260912065539.000777440@linuxfoundation.org> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20260912065526.833703348@linuxfoundation.org> References: <20260912065526.833703348@linuxfoundation.org> User-Agent: quilt/0.69 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: patches@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 5.15-stable review patch. If anyone has any objections, please let me know. ------------------ From: Dmitry Baryshkov [ Upstream commit 266e5cf39a0f25787cb66a36dde50799194062c6 ] Switch dispcc and videocc into using MMCX domain directly. Drop the now unused mmcx regulator. Signed-off-by: Dmitry Baryshkov Reviewed-by: Bjorn Andersson Reviewed-by: Ulf Hansson Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20210829154757.784699-7-dmitry.baryshkov@linaro.org Stable-dep-of: d5c8efda722e ("arm64: dts: qcom: sm8250: sort out Iris power domains") Signed-off-by: Sasha Levin --- arch/arm64/boot/dts/qcom/sm8250.dtsi | 13 ++++--------- 1 file changed, 4 insertions(+), 9 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index 735dca94e20b8..f3897a5bdf802 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -272,13 +272,6 @@ memory@80000000 { reg = <0x0 0x80000000 0x0 0x0>; }; - mmcx_reg: mmcx-reg { - compatible = "regulator-fixed-domain"; - power-domains = <&rpmhpd SM8250_MMCX>; - required-opps = <&rpmhpd_opp_low_svs>; - regulator-name = "MMCX"; - }; - pmu { compatible = "arm,armv8-pmuv3"; interrupts = ; @@ -2578,7 +2571,8 @@ videocc: clock-controller@abf0000 { clocks = <&gcc GCC_VIDEO_AHB_CLK>, <&rpmhcc RPMH_CXO_CLK>, <&rpmhcc RPMH_CXO_CLK_A>; - mmcx-supply = <&mmcx_reg>; + power-domains = <&rpmhpd SM8250_MMCX>; + required-opps = <&rpmhpd_opp_low_svs>; clock-names = "iface", "bi_tcxo", "bi_tcxo_ao"; #clock-cells = <1>; #reset-cells = <1>; @@ -2853,7 +2847,8 @@ opp-358000000 { dispcc: clock-controller@af00000 { compatible = "qcom,sm8250-dispcc"; reg = <0 0x0af00000 0 0x10000>; - mmcx-supply = <&mmcx_reg>; + power-domains = <&rpmhpd SM8250_MMCX>; + required-opps = <&rpmhpd_opp_low_svs>; clocks = <&rpmhcc RPMH_CXO_CLK>, <&dsi0_phy 0>, <&dsi0_phy 1>, -- 2.53.0