From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 57E7742376B; Sat, 12 Sep 2026 11:46:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789213581; cv=none; b=vCCxiBp9ktPbCqcCTX6WZkPbp+pY91iZmNBT0+ET9hw0cAuKDKPz0ESEyVxoAzsnjgOJpjmTOk0Urt71PzY2IaqDd92qrejJP0cEjwOePx5IdNPN4NpEjo4P2dsiLtEBghQx1pK59GGaet/+JuMFH3YTGnmDTQott43hwqIF+J4= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789213581; c=relaxed/simple; bh=abBizeRSMnv7fe1doRvipH5r0OAKUyvgtiQZ0CBDF3c=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=gn5cLO+Ml5RijwLq3ERBYgHa5wr3/lguEa6gW5OeXJMTYh8kseWsEsM00n9TY2cCbRPiKmyaWtd4U/jAM2u4I4CptjjLZAsjHubzaPsB5ggyu0CcRVXUxhWx4qibtmd3SskXl3ZTvNhGMuBpBrwtosdEPLygxl7RYjT5speromQ= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=W69zsT9x; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="W69zsT9x" Received: by smtp.kernel.org (Postfix) with ESMTPSA id DF47E1F000FF; Sat, 12 Sep 2026 11:46:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linuxfoundation.org; s=korg; t=1789213580; bh=f9JA5hYq/z7s/UKqUgipRapCp8ytXu/1JCYGJaEqek0=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=W69zsT9xiYnzZkQpYFrFwfOiBAu4/ddEWY1qE6SJmuvkKyeAewIKmZlq3l8PbyVIq Zt6oBZq/Bq7bSbds39qZ9lJ5MH1bvEyzSUMcyrVg7D++MhfWpeioeAX2ugVWJKolx6 WeCHxilyd3WPjZMHbUKCxiJag22qtTE2yN6dPbj0= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Nikhil Gautam , Andy Shevchenko , Stable@vger.kernel.org, Jonathan Cameron Subject: [PATCH 6.12 0152/1376] iio: light: opt4001: Fix incompatible pointer type passed to div_u64_rem() Date: Sat, 12 Sep 2026 08:42:58 +0200 Message-ID: <20260912065610.938120700@linuxfoundation.org> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20260912065607.535295758@linuxfoundation.org> References: <20260912065607.535295758@linuxfoundation.org> User-Agent: quilt/0.69 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: patches@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 6.12-stable review patch. If anyone has any objections, please let me know. ------------------ From: Nikhil Gautam commit afa28741c9a2cf6edb2e41e25ff146a562160bb3 upstream. div_u64_rem() takes a u32 * for the remainder but is passed val2, which is an int *. There is no functional impact as int and u32 have the same size and representation on all supported architectures and the remainder is always smaller than the divisor, so it fits in the positive range of int. Fix the type mismatch by using a local u32 for the remainder and assigning the result to *val2. Fixes: 9a9608418292 ("iio: light: Add support for TI OPT4001 light sensor") Signed-off-by: Nikhil Gautam Reviewed-by: Andy Shevchenko Cc: Signed-off-by: Jonathan Cameron Signed-off-by: Greg Kroah-Hartman --- drivers/iio/light/opt4001.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) --- a/drivers/iio/light/opt4001.c +++ b/drivers/iio/light/opt4001.c @@ -173,6 +173,7 @@ static int opt4001_read_lux_value(struct u8 crc; u8 calc_crc; u64 lux_raw; + u32 rem; int ret; ret = regmap_read(chip->regmap, OPT4001_LIGHT1_MSB, &light1); @@ -199,8 +200,8 @@ static int opt4001_read_lux_value(struct lux_raw = lux_raw << exp; lux_raw = lux_raw * chip->chip_info->mul; - *val = div_u64_rem(lux_raw, chip->chip_info->div, val2); - *val2 = *val2 * 100; + *val = div_u64_rem(lux_raw, chip->chip_info->div, &rem); + *val2 = rem * 100; return IIO_VAL_INT_PLUS_NANO; }