From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8B3113246ED; Sat, 12 Sep 2026 13:58:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789221526; cv=none; b=UKBS8hmU6TiuLz0Ytow9bFb5gaqfw+vbhTOjc5ltzYIgJBL6uwCita9/R2Lb6nGCD+2nU1N3zleyawehAHwnDHccRc7Joh/ZgdcvNQpCgAB/LR/lSLuTcmm8Xcky6HC3JBp6LE0ARQ2mqSezp4Apo4FCkCKcBUou4XxJ51aRDKg= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789221526; c=relaxed/simple; bh=wGQzjhZAlpm4bkBXirKzHvzuIbAnyt/CrtJRZemFMrQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=QHazUxaqhRqzioRqJyykY6+wqQDGTdn335NNrGqC4zC+BEvwmbSPkBf+GeijzWhMVJFhp2enQ28E5m5vnPl508FqX7zu4O3Y+WDLkJmtOBcOOmhZGv9/19/65EPhKq51VCQW+EhbYQslgscS6ezpcNDBEqiVPe57j09zipNHKQQ= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=NJ2GfwWF; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="NJ2GfwWF" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 449FA1F000FF; Sat, 12 Sep 2026 13:58:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linuxfoundation.org; s=korg; t=1789221525; bh=e6Zf6nvMAfbpSe8sHJ11kC7aWoG7cNZDV34TqX6RnVI=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=NJ2GfwWFZlKLz7OkQnDCmd8C/5/81Scm3LX8RFbYAHb2ErN8coOFvUpp+E8vVdIlQ zsKKkHPkkru7nMjgSyBO376YAiQLQYovK0D6XuhZCFGIHmLjqUf4EphboeGtKLUY2/ Vs8TNb1DMGNbOtpg8YG1AB8bA93ndrTwZlzM4dms= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Heiko Stuebner , Quentin Schulz , Chris Morgan , Heiko Stuebner Subject: [PATCH 6.6 0401/1424] clk: rockchip: rk3588: Dont change PLL rates when setting dclk_vop2_src Date: Sat, 12 Sep 2026 08:47:13 +0200 Message-ID: <20260912065616.265471329@linuxfoundation.org> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20260912065607.279695368@linuxfoundation.org> References: <20260912065607.279695368@linuxfoundation.org> User-Agent: quilt/0.69 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: patches@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 6.6-stable review patch. If anyone has any objections, please let me know. ------------------ From: Heiko Stuebner commit 13b10571cc353448275365ede1a5396d20dfe839 upstream. dclk_vop2_src currently has the CLK_SET_RATE_PARENT flag set, which is very different from dclk_vop0_src or dclk_vop1_src, which don't have it. With this flag in dclk_vop2_src, actually setting the clock then results in a lot of other peripherals breaking, because setting the rate results in the PLL source getting changed: [ 14.898718] clk_core_set_rate_nolock: setting rate for dclk_vop2 to 152840000 [ 15.155017] clk_change_rate: setting rate for pll_gpll to 1680000000 [ clk adjusting every gpll user ] This includes possibly the other vops, i2s, spdif and even the uarts. Among other possible things, this breaks the uart console on a board I use. Sometimes it recovers later on, but there will be a big block of garbled output for a while at least. Shared PLLs should not be changed by individual users, so drop this flag from dclk_vop2_src. Fixes: f1c506d152ff ("clk: rockchip: add clock controller for the RK3588") Cc: stable@vger.kernel.org Tested-by: Quentin Schulz # RK3588 Tiger w/ DP Signed-off-by: Heiko Stuebner Reviewed-by: Quentin Schulz Tested-by: Chris Morgan Link: https://patch.msgid.link/20260304121426.1184680-2-heiko@sntech.de Signed-off-by: Heiko Stuebner Signed-off-by: Greg Kroah-Hartman --- drivers/clk/rockchip/clk-rk3588.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) --- a/drivers/clk/rockchip/clk-rk3588.c +++ b/drivers/clk/rockchip/clk-rk3588.c @@ -2117,7 +2117,7 @@ static struct rockchip_clk_branch rk3588 COMPOSITE(DCLK_VOP1_SRC, "dclk_vop1_src", gpll_cpll_v0pll_aupll_p, 0, RK3588_CLKSEL_CON(111), 14, 2, MFLAGS, 9, 5, DFLAGS, RK3588_CLKGATE_CON(52), 11, GFLAGS), - COMPOSITE(DCLK_VOP2_SRC, "dclk_vop2_src", gpll_cpll_v0pll_aupll_p, CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT, + COMPOSITE(DCLK_VOP2_SRC, "dclk_vop2_src", gpll_cpll_v0pll_aupll_p, CLK_SET_RATE_NO_REPARENT, RK3588_CLKSEL_CON(112), 5, 2, MFLAGS, 0, 5, DFLAGS, RK3588_CLKGATE_CON(52), 12, GFLAGS), COMPOSITE_NODIV(DCLK_VOP0, "dclk_vop0", dclk_vop0_p,