From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A9ADA2F617C; Sat, 12 Sep 2026 12:21:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789215713; cv=none; b=Miyl5mMpA4fZkOxY5SGhRkrj3ogKpZ8b55hc8+NYb4q8J9/ypEPi3Cb/2Wcqj1426N09z72R6WztegMxKWaVVRGA3Urox/P5pbtubrBtgiqXAY33egczSYt0m1Rh9itKnpPSXjiWHd1KRghI++IYdAxhmsuq6ogELwBa7a6wS3Y= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789215713; c=relaxed/simple; bh=k6KlX9aq2d+Q0DbpgyasCVt1MtlaAv+kvtTOlwMAd84=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=jqJNIJLi9lppu5XZr56wH8BWA8tlG95tvbpQ/1JA92IK/VN5tHXNBhoiBlxQTnebVQr2kl7U7POtt5gP3dfYRzVM+tU4rvQmRksolwZ32TrTg84QBj0A3euo4oOUoWi1mGxgYLXN2cS3WNd68o0YcEqTS4c3MfYE5S70FnIgep4= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=N0zq5nhs; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="N0zq5nhs" Received: by smtp.kernel.org (Postfix) with ESMTPSA id E16EC1F000FF; Sat, 12 Sep 2026 12:21:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linuxfoundation.org; s=korg; t=1789215712; bh=iZxfCzmAih5E/g4qI767SKrp67hbEFvDgBOY9vQBQbI=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=N0zq5nhs4SYX9apQaGZfWo/e7TknQs5Ylu7dlZDTyNRjfCogl197G/oSD99msPcPv TWOSy0XD8G5/H7vX+gqh23dMUzpXPMuGQS/lkc57/9DbzvWmD2nzFgmUHIQDsGc2AT 6YBtYFtz0cN6SBNFhYd1LTYmeFH/C6AtB6JK7/1g= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Konrad Dybcio , Dmitry Baryshkov , Dikshita Agarwal , Bjorn Andersson , Sasha Levin Subject: [PATCH 6.12 0561/1376] arm64: dts: qcom: sm8250: sort out Iris power domains Date: Sat, 12 Sep 2026 08:49:47 +0200 Message-ID: <20260912065620.037309792@linuxfoundation.org> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20260912065607.535295758@linuxfoundation.org> References: <20260912065607.535295758@linuxfoundation.org> User-Agent: quilt/0.69 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: patches@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 6.12-stable review patch. If anyone has any objections, please let me know. ------------------ From: Dmitry Baryshkov [ Upstream commit d5c8efda722eb1f67cfe299b71f13dab93746934 ] On SM8250 Iris core requires two power rails to function, MX (for PLLs) and MMCX (for everything else). The commit fa245b3f06cd ("arm64: dts: qcom: sm8250: Add venus DT node") added only MX power rail, but omitted MMCX voltage levels. Add MMCX domain to the Iris device node. Fixes: fa245b3f06cd ("arm64: dts: qcom: sm8250: Add venus DT node") Reported-by: Konrad Dybcio Signed-off-by: Dmitry Baryshkov Reviewed-by: Konrad Dybcio Reviewed-by: Dikshita Agarwal Link: https://lore.kernel.org/r/20260604-iris-venus-fix-sm8250-v7-1-7bd2f0e5bae8@oss.qualcomm.com Signed-off-by: Bjorn Andersson Signed-off-by: Sasha Levin --- arch/arm64/boot/dts/qcom/sm8250.dtsi | 20 ++++++++++++++------ 1 file changed, 14 insertions(+), 6 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index 4cb91f31340db..12c1d60ec3e76 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -4310,8 +4310,12 @@ venus: video-codec@aa00000 { interrupts = ; power-domains = <&videocc MVS0C_GDSC>, <&videocc MVS0_GDSC>, - <&rpmhpd RPMHPD_MX>; - power-domain-names = "venus", "vcodec0", "mx"; + <&rpmhpd RPMHPD_MX>, + <&rpmhpd RPMHPD_MMCX>; + power-domain-names = "venus", + "vcodec0", + "mx", + "mmcx"; operating-points-v2 = <&venus_opp_table>; clocks = <&gcc GCC_VIDEO_AXI0_CLK>, @@ -4345,22 +4349,26 @@ venus_opp_table: opp-table { opp-720000000 { opp-hz = /bits/ 64 <720000000>; - required-opps = <&rpmhpd_opp_low_svs>; + required-opps = <&rpmhpd_opp_svs>, + <&rpmhpd_opp_low_svs>; }; opp-1014000000 { opp-hz = /bits/ 64 <1014000000>; - required-opps = <&rpmhpd_opp_svs>; + required-opps = <&rpmhpd_opp_svs>, + <&rpmhpd_opp_svs>; }; opp-1098000000 { opp-hz = /bits/ 64 <1098000000>; - required-opps = <&rpmhpd_opp_svs_l1>; + required-opps = <&rpmhpd_opp_svs_l1>, + <&rpmhpd_opp_svs_l1>; }; opp-1332000000 { opp-hz = /bits/ 64 <1332000000>; - required-opps = <&rpmhpd_opp_nom>; + required-opps = <&rpmhpd_opp_svs_l1>, + <&rpmhpd_opp_nom>; }; }; }; -- 2.53.0