From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8B669246BCD; Sat, 12 Sep 2026 10:14:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789208078; cv=none; b=ozwYhBf//YG/x8XVFZXDwYxLHmTD1Q14g0lC2knAFui9utiq5t2A4p5rupfzRMXT7mw3tN9Xit9se3TPvvSXnvA/3ggGmBAeAeQPceddausSQwxGdaUVN3AfJh2qN/SQHmtY5tdjkG+AdtcyUTDrzgoHiADFyhTmyXckQv01uwg= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789208078; c=relaxed/simple; bh=RLEB/4fKgJEqTwtjnwA3rEIapat3/5YDVwUV0gn+/Vg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=qxpC2eNHgzAoLVPf6e0XrK9t1ducuZJhrG18JiOAa74x55uuDlJVl/YfVnFxLT9jh8g4KjZo4x3nE/saB6uGG5T4/lf3PAh324qbSBRAPIOaWediod80oIwnLCAtycrFrZS00i849KyYGBIN7fiPZrls3KTC7+Xhvs4bo0Xomic= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=wezzZPVf; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="wezzZPVf" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 7FADA1F00893; Sat, 12 Sep 2026 10:14:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linuxfoundation.org; s=korg; t=1789208077; bh=dggT54a5SLa3sMEMtB+kJWfS73Iqvzzsej2eOAlhwjo=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=wezzZPVfJobDTvX+T++UjvWyAh4QWDjjfHA6875Y3K0L3J1s03K3rjxnC+bna5r5C z/kTos669eCMvm7MDnnV0dwwdppcm8SKjqyfyM83LNVKZiCooaC3bah9vXSiOU2ns1 stWgAXEOJO9jXF6U8oZ5yqalYNxiZ+Dig8UU57Bk= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Andre Przywara , Chen-Yu Tsai , Sasha Levin Subject: [PATCH 6.18 0543/1518] ARM: dts: allwinner: a10: Fix PMU interrupt Date: Sat, 12 Sep 2026 08:45:12 +0200 Message-ID: <20260912065635.726549281@linuxfoundation.org> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20260912065623.398859879@linuxfoundation.org> References: <20260912065623.398859879@linuxfoundation.org> User-Agent: quilt/0.69 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: patches@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 6.18-stable review patch. If anyone has any objections, please let me know. ------------------ From: Andre Przywara [ Upstream commit eb7051f756460d7b951e94d9656e31ebb631ba28 ] The Performance Monitoring Unit of the Cortex-A8 cores in the Allwinner A10 SoC is connected to interrupt line 66, not 3. This is shown in the manual (where interrupt 3 is assigned to UART2, also in our .dtsi), but has also been confirmed by triggering an PMU overflow interrupt and inspecting the IRQ controller status registers (from U-Boot). Please note that "perf stat" does not use interrupts, this might explain why this evaded the initial testing. Fixes: 7e345d25c796 ("ARM: dts: sun4i-a10: Add PMU node") Signed-off-by: Andre Przywara Link: https://patch.msgid.link/20260720215128.5761-1-andre.przywara@arm.com Signed-off-by: Chen-Yu Tsai Signed-off-by: Sasha Levin --- arch/arm/boot/dts/allwinner/sun4i-a10.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/allwinner/sun4i-a10.dtsi b/arch/arm/boot/dts/allwinner/sun4i-a10.dtsi index 51a6464aab9a3..cabf619c2e217 100644 --- a/arch/arm/boot/dts/allwinner/sun4i-a10.dtsi +++ b/arch/arm/boot/dts/allwinner/sun4i-a10.dtsi @@ -185,7 +185,7 @@ de: display-engine { pmu { compatible = "arm,cortex-a8-pmu"; - interrupts = <3>; + interrupts = <66>; }; reserved-memory { -- 2.53.0