From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A5AF249D58F; Thu, 17 Sep 2026 17:57:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789667844; cv=none; b=onS/mfHI9FUOtt3YvHNhkgFF2fMmyZb/KImSl3sbUrze4M7E47QAXzf15803To6IP1wujPhwR2U1LKnKhiSPXbyo4TTjQkBcBYyFiXEKoQONQvv+be8DKYoToncGaq6IwsBzofpZw6NsuB0y2ZVo46Np85NDmU0OX3Oo04c0/dU= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789667844; c=relaxed/simple; bh=/Kp/SIYgsc9INslc3gTH6sVOkxGdZ/edrx2il8ZD+uU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=G7EA2tq2ZLZkZX59lQPk5PDOhm38iPP6Iszcqgj5bUxteBW5SrVbyO0vT0MDHyiDcycQ5WNb9IAEpLKVSdym4f6Lcn7i2wi0kuKZCAKWmY0ZhpgtWY0psUYmpQa6SmSNu2c8XshnwLYqc+5O+UYfPyuAVdBzZEeff5BjKa93nzs= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=HTtaTVJE; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="HTtaTVJE" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 0B64E1F00893; Thu, 17 Sep 2026 17:57:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linuxfoundation.org; s=korg; t=1789667843; bh=TsDa+KUt2KFLx1JUw6gNlmbIrgQ3fFX8pmS2If3+irU=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=HTtaTVJE6I2j+NxDBOhkYVzUzj5M3GDfjesT3fiBbTTyIlhIXmAAc3pC0h03QrIf4 8XtbJMH5NekEvBcr91hMRASkwJkgScCoi+JuePT3LHIdSyHs/QsyJJzDaINbUUASqW ZmfiKUH2xOd67A/qtxyd6aaAondnaF5d/vBP5FLU= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Michael Walle , Kevin Hilman , Randolph Sapp , Nishanth Menon , Antonios Christidis , Brian Masney , Sasha Levin Subject: [PATCH 6.12 0228/1102] clk: keystone: dont cache clock rate Date: Thu, 17 Sep 2026 16:02:51 +0100 Message-ID: <20260917151545.307779889@linuxfoundation.org> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20260917151539.408551884@linuxfoundation.org> References: <20260917151539.408551884@linuxfoundation.org> User-Agent: quilt/0.69 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: patches@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 6.12-stable review patch. If anyone has any objections, please let me know. ------------------ From: Michael Walle [ Upstream commit a80b32a140c8612bbaed27009c383d43304db6d5 ] The TISCI firmware will return 0 if the clock or consumer is not enabled although there is a stored value in the firmware. IOW a call to set rate will work but at get rate will always return 0 if the clock is disabled. The clk framework will try to cache the clock rate when it's requested by a consumer. If the clock or consumer is not enabled at that point, the cached value is 0, which is wrong. Thus, disable the cache altogether. Signed-off-by: Michael Walle Reviewed-by: Kevin Hilman Reviewed-by: Randolph Sapp Reviewed-by: Nishanth Menon Signed-off-by: Antonios Christidis Reviewed-by: Brian Masney Link: https://patch.msgid.link/20260507-clk-sci-v2-1-38f59b48777a@ti.com Signed-off-by: Nishanth Menon Signed-off-by: Sasha Levin --- drivers/clk/keystone/sci-clk.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/clk/keystone/sci-clk.c b/drivers/clk/keystone/sci-clk.c index c5894fc9395e8..d73858b5ca7a0 100644 --- a/drivers/clk/keystone/sci-clk.c +++ b/drivers/clk/keystone/sci-clk.c @@ -333,6 +333,14 @@ static int _sci_clk_build(struct sci_clk_provider *provider, init.ops = &sci_clk_ops; init.num_parents = sci_clk->num_parents; + + /* + * A clock rate query to the SCI firmware will return 0 if either the + * clock itself is disabled or the attached device/consumer is disabled. + * This makes it inherently unsuitable for the caching of the clk + * framework. + */ + init.flags = CLK_GET_RATE_NOCACHE; sci_clk->hw.init = &init; ret = devm_clk_hw_register(provider->dev, &sci_clk->hw); -- 2.53.0