diff for duplicates of <20260917151553.899871432@linuxfoundation.org> diff --git a/a/1.txt b/N1/1.txt index 5d4699c..58522e4 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,54 +1,288 @@ -6.18-stable review patch. If anyone has any objections, please let me know. +6.12-stable review patch. If anyone has any objections, please let me know. ------------------ -From: Johannes Berg <johannes.berg@intel.com> +From: Linus Walleij <linusw@kernel.org> -[ Upstream commit 89e367a90c1a877ca9c5d75d3848582d80fd0e60 ] +[ Upstream commit f98785adf004db6b1c9f4cea9dadae7b800db72f ] -When stopping the AP, explicitly disable FTM responder while -disabling beaconing. +The codec programs I2S as an undelayed left-aligned format, although the +hardware manual defines delayed left-aligned as I2S compatible. It also +enables the master generator when the codec is a clock consumer, changes +registers before the complete format has been validated, and discards +register I/O errors. -Link: https://patch.msgid.link/20260505151241.f213196d7d6a.I95d65c030e986c5f7d63ecbd79596da890b9fc84@changeid -Signed-off-by: Johannes Berg <johannes.berg@intel.com> +Build all three interface register values before writing them, use the +required one-bit I2S delay, only run the master generator for a provider +configuration, and propagate write failures. + +Fixes: 679d7abdc754 ("ASoC: codecs: Add AB8500 codec-driver") +Assisted-by: LLM +Signed-off-by: Linus Walleij <linusw@kernel.org> +Link: https://patch.msgid.link/20260831-ab8500-codec-fixes-v1-3-f85024e717e3@kernel.org +Signed-off-by: Mark Brown <broonie@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org> --- - net/mac80211/cfg.c | 9 +++++++-- - 1 file changed, 7 insertions(+), 2 deletions(-) + sound/soc/codecs/ab8500-codec.c | 175 ++++++++++++-------------------- + 1 file changed, 64 insertions(+), 111 deletions(-) -diff --git a/net/mac80211/cfg.c b/net/mac80211/cfg.c -index f6232948bc0f4..72c9d5aceae58 100644 ---- a/net/mac80211/cfg.c -+++ b/net/mac80211/cfg.c -@@ -1811,6 +1811,7 @@ static int ieee80211_stop_ap(struct wiphy *wiphy, struct net_device *dev, - struct ieee80211_link_data *link = - sdata_dereference(sdata->link[link_id], sdata); - struct ieee80211_bss_conf *link_conf = link->conf; -+ u64 changes = BSS_CHANGED_BEACON_ENABLED; - LIST_HEAD(keys); - - lockdep_assert_wiphy(local->hw.wiphy); -@@ -1860,6 +1861,11 @@ static int ieee80211_stop_ap(struct wiphy *wiphy, struct net_device *dev, - if (old_s1g_short_beacon) - kfree_rcu(old_s1g_short_beacon, rcu_head); - -+ if (link_conf->ftm_responder) { -+ link_conf->ftm_responder = false; -+ changes |= BSS_CHANGED_FTM_RESPONDER; -+ } +diff --git a/sound/soc/codecs/ab8500-codec.c b/sound/soc/codecs/ab8500-codec.c +index 2c7e3b7a386ae..595d378d02320 100644 +--- a/sound/soc/codecs/ab8500-codec.c ++++ b/sound/soc/codecs/ab8500-codec.c +@@ -2016,149 +2016,91 @@ static int ab8500_audio_set_ear_cmv(struct snd_soc_component *component, + return 0; + } + +-static int ab8500_audio_set_bit_delay(struct snd_soc_dai *dai, +- unsigned int delay) +-{ +- unsigned int mask, val; +- struct snd_soc_component *component = dai->component; +- +- mask = BIT(AB8500_DIGIFCONF2_IF0DEL); +- val = 0; +- +- switch (delay) { +- case 0: +- break; +- case 1: +- val |= BIT(AB8500_DIGIFCONF2_IF0DEL); +- break; +- default: +- dev_err(dai->component->dev, +- "%s: ERROR: Unsupported bit-delay (0x%x)!\n", +- __func__, delay); +- return -EINVAL; +- } +- +- dev_dbg(dai->component->dev, "%s: IF0 Bit-delay: %d bits.\n", +- __func__, delay); +- snd_soc_component_update_bits(component, AB8500_DIGIFCONF2, mask, val); +- +- return 0; +-} +- +-/* Gates clocking according format mask */ +-static int ab8500_codec_set_dai_clock_gate(struct snd_soc_component *component, +- unsigned int fmt) +-{ +- unsigned int mask; +- unsigned int val; +- +- mask = BIT(AB8500_DIGIFCONF1_ENMASTGEN) | +- BIT(AB8500_DIGIFCONF1_ENFSBITCLK0); +- +- val = BIT(AB8500_DIGIFCONF1_ENMASTGEN); +- +- switch (fmt & SND_SOC_DAIFMT_CLOCK_MASK) { +- case SND_SOC_DAIFMT_CONT: /* continuous clock */ +- dev_dbg(component->dev, "%s: IF0 Clock is continuous.\n", +- __func__); +- val |= BIT(AB8500_DIGIFCONF1_ENFSBITCLK0); +- break; +- case SND_SOC_DAIFMT_GATED: /* clock is gated */ +- dev_dbg(component->dev, "%s: IF0 Clock is gated.\n", +- __func__); +- break; +- default: +- dev_err(component->dev, +- "%s: ERROR: Unsupported clock mask (0x%x)!\n", +- __func__, fmt & SND_SOC_DAIFMT_CLOCK_MASK); +- return -EINVAL; +- } +- +- snd_soc_component_update_bits(component, AB8500_DIGIFCONF1, mask, val); +- +- return 0; +-} +- + static int ab8500_codec_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt) + { +- unsigned int mask; +- unsigned int val; + struct snd_soc_component *component = dai->component; +- int status; ++ unsigned int conf1_mask, conf1_val = 0; ++ unsigned int conf2_mask, conf2_val = 0; ++ unsigned int conf3_mask, conf3_val = 0; ++ bool provider = false; ++ int ret; + + dev_dbg(component->dev, "%s: Enter (fmt = 0x%x)\n", __func__, fmt); + +- mask = BIT(AB8500_DIGIFCONF3_IF1DATOIF0AD) | ++ conf3_mask = BIT(AB8500_DIGIFCONF3_IF1DATOIF0AD) | + BIT(AB8500_DIGIFCONF3_IF1CLKTOIF0CLK) | + BIT(AB8500_DIGIFCONF3_IF0BFIFOEN) | + BIT(AB8500_DIGIFCONF3_IF0MASTER); +- val = 0; + + switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { + case SND_SOC_DAIFMT_CBP_CFP: +- dev_dbg(dai->component->dev, ++ dev_dbg(component->dev, + "%s: IF0 Master-mode: AB8500 provider.\n", __func__); +- val |= BIT(AB8500_DIGIFCONF3_IF0MASTER); ++ conf3_val |= BIT(AB8500_DIGIFCONF3_IF0MASTER); ++ provider = true; + break; + case SND_SOC_DAIFMT_CBC_CFC: +- dev_dbg(dai->component->dev, ++ dev_dbg(component->dev, + "%s: IF0 Master-mode: AB8500 consumer.\n", __func__); + break; + case SND_SOC_DAIFMT_CBC_CFP: + case SND_SOC_DAIFMT_CBP_CFC: +- dev_err(dai->component->dev, ++ dev_err(component->dev, + "%s: ERROR: The device is either a provider or a consumer.\n", + __func__); + fallthrough; + default: +- dev_err(dai->component->dev, +- "%s: ERROR: Unsupporter clocking mask 0x%x\n", ++ dev_err(component->dev, ++ "%s: ERROR: Unsupported clocking mask 0x%x\n", + __func__, fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK); + return -EINVAL; + } + +- snd_soc_component_update_bits(component, AB8500_DIGIFCONF3, mask, val); +- +- /* Set clock gating */ +- status = ab8500_codec_set_dai_clock_gate(component, fmt); +- if (status) { +- dev_err(dai->component->dev, +- "%s: ERROR: Failed to set clock gate (%d).\n", +- __func__, status); +- return status; ++ conf1_mask = BIT(AB8500_DIGIFCONF1_ENMASTGEN) | ++ BIT(AB8500_DIGIFCONF1_ENFSBITCLK0); ++ switch (fmt & SND_SOC_DAIFMT_CLOCK_MASK) { ++ case SND_SOC_DAIFMT_CONT: ++ if (provider) ++ conf1_val = conf1_mask; ++ break; ++ case SND_SOC_DAIFMT_GATED: ++ if (provider) ++ conf1_val = BIT(AB8500_DIGIFCONF1_ENMASTGEN); ++ break; ++ default: ++ dev_err(component->dev, "%s: Unsupported clock mask 0x%x\n", ++ __func__, fmt & SND_SOC_DAIFMT_CLOCK_MASK); ++ return -EINVAL; + } + +- /* Setting data transfer format */ +- +- mask = BIT(AB8500_DIGIFCONF2_IF0FORMAT0) | +- BIT(AB8500_DIGIFCONF2_IF0FORMAT1) | +- BIT(AB8500_DIGIFCONF2_FSYNC0P) | +- BIT(AB8500_DIGIFCONF2_BITCLK0P); +- val = 0; ++ conf2_mask = BIT(AB8500_DIGIFCONF2_IF0FORMAT0) | ++ BIT(AB8500_DIGIFCONF2_IF0FORMAT1) | ++ BIT(AB8500_DIGIFCONF2_IF0DEL) | ++ BIT(AB8500_DIGIFCONF2_FSYNC0P) | ++ BIT(AB8500_DIGIFCONF2_BITCLK0P); + + switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { + case SND_SOC_DAIFMT_I2S: /* I2S mode */ +- dev_dbg(dai->component->dev, "%s: IF0 Protocol: I2S\n", __func__); +- val |= BIT(AB8500_DIGIFCONF2_IF0FORMAT1); +- ab8500_audio_set_bit_delay(dai, 0); ++ dev_dbg(component->dev, "%s: IF0 Protocol: I2S\n", __func__); ++ conf2_val |= BIT(AB8500_DIGIFCONF2_IF0FORMAT1) | ++ BIT(AB8500_DIGIFCONF2_IF0DEL); + break; + + case SND_SOC_DAIFMT_DSP_A: /* L data MSB after FRM LRC */ +- dev_dbg(dai->component->dev, ++ dev_dbg(component->dev, + "%s: IF0 Protocol: DSP A (TDM)\n", __func__); +- val |= BIT(AB8500_DIGIFCONF2_IF0FORMAT0); +- ab8500_audio_set_bit_delay(dai, 1); ++ conf2_val |= BIT(AB8500_DIGIFCONF2_IF0FORMAT0) | ++ BIT(AB8500_DIGIFCONF2_IF0DEL); + break; + + case SND_SOC_DAIFMT_DSP_B: /* L data MSB during FRM LRC */ +- dev_dbg(dai->component->dev, ++ dev_dbg(component->dev, + "%s: IF0 Protocol: DSP B (TDM)\n", __func__); +- val |= BIT(AB8500_DIGIFCONF2_IF0FORMAT0); +- ab8500_audio_set_bit_delay(dai, 0); ++ conf2_val |= BIT(AB8500_DIGIFCONF2_IF0FORMAT0); + break; + + default: +- dev_err(dai->component->dev, ++ dev_err(component->dev, + "%s: ERROR: Unsupported format (0x%x)!\n", + __func__, fmt & SND_SOC_DAIFMT_FORMAT_MASK); + return -EINVAL; +@@ -2166,39 +2108,50 @@ static int ab8500_codec_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt) + + switch (fmt & SND_SOC_DAIFMT_INV_MASK) { + case SND_SOC_DAIFMT_NB_NF: /* normal bit clock + frame */ +- dev_dbg(dai->component->dev, ++ dev_dbg(component->dev, + "%s: IF0: Normal bit clock, normal frame\n", + __func__); + break; + case SND_SOC_DAIFMT_NB_IF: /* normal BCLK + inv FRM */ +- dev_dbg(dai->component->dev, ++ dev_dbg(component->dev, + "%s: IF0: Normal bit clock, inverted frame\n", + __func__); +- val |= BIT(AB8500_DIGIFCONF2_FSYNC0P); ++ conf2_val |= BIT(AB8500_DIGIFCONF2_FSYNC0P); + break; + case SND_SOC_DAIFMT_IB_NF: /* invert BCLK + nor FRM */ +- dev_dbg(dai->component->dev, ++ dev_dbg(component->dev, + "%s: IF0: Inverted bit clock, normal frame\n", + __func__); +- val |= BIT(AB8500_DIGIFCONF2_BITCLK0P); ++ conf2_val |= BIT(AB8500_DIGIFCONF2_BITCLK0P); + break; + case SND_SOC_DAIFMT_IB_IF: /* invert BCLK + FRM */ +- dev_dbg(dai->component->dev, ++ dev_dbg(component->dev, + "%s: IF0: Inverted bit clock, inverted frame\n", + __func__); +- val |= BIT(AB8500_DIGIFCONF2_FSYNC0P); +- val |= BIT(AB8500_DIGIFCONF2_BITCLK0P); ++ conf2_val |= BIT(AB8500_DIGIFCONF2_FSYNC0P) | ++ BIT(AB8500_DIGIFCONF2_BITCLK0P); + break; + default: +- dev_err(dai->component->dev, ++ dev_err(component->dev, + "%s: ERROR: Unsupported INV mask 0x%x\n", + __func__, fmt & SND_SOC_DAIFMT_INV_MASK); + return -EINVAL; + } + +- snd_soc_component_update_bits(component, AB8500_DIGIFCONF2, mask, val); ++ ret = snd_soc_component_update_bits(component, AB8500_DIGIFCONF3, ++ conf3_mask, conf3_val); ++ if (ret < 0) ++ return ret; + +- return 0; ++ ret = snd_soc_component_update_bits(component, AB8500_DIGIFCONF1, ++ conf1_mask, conf1_val); ++ if (ret < 0) ++ return ret; + - kfree(link_conf->ftmr_params); - link_conf->ftmr_params = NULL; - -@@ -1881,8 +1887,7 @@ static int ieee80211_stop_ap(struct wiphy *wiphy, struct net_device *dev, - sdata->vif.cfg.ssid_len = 0; - sdata->vif.cfg.s1g = false; - clear_bit(SDATA_STATE_OFFCHANNEL_BEACON_STOPPED, &sdata->state); -- ieee80211_link_info_change_notify(sdata, link, -- BSS_CHANGED_BEACON_ENABLED); -+ ieee80211_link_info_change_notify(sdata, link, changes); - - ieee80211_remove_link_keys(link, &keys); - if (!list_empty(&keys)) { ++ ret = snd_soc_component_update_bits(component, AB8500_DIGIFCONF2, ++ conf2_mask, conf2_val); ++ ++ return ret < 0 ? ret : 0; + } + + static int ab8500_codec_set_dai_tdm_slot(struct snd_soc_dai *dai, -- 2.53.0 diff --git a/a/content_digest b/N1/content_digest index 09058f3..2bf3d8b 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,67 +1,302 @@ - "ref\020260917151551.901433442@linuxfoundation.org\0" + "ref\020260917151539.408551884@linuxfoundation.org\0" "From\0Greg Kroah-Hartman <gregkh@linuxfoundation.org>\0" - "Subject\0[PATCH 6.18 0072/1250] wifi: mac80211: explicitly disable FTM responder on AP stop\0" - "Date\0Thu, 17 Sep 2026 15:57:47 +0100\0" + "Subject\0[PATCH 6.12 0559/1102] ASoC: ab8500: Correct digital interface format setup\0" + "Date\0Thu, 17 Sep 2026 16:08:22 +0100\0" "To\0stable@vger.kernel.org\0" "Cc\0Greg Kroah-Hartman <gregkh@linuxfoundation.org>" patches@lists.linux.dev - Johannes Berg <johannes.berg@intel.com> + Linus Walleij <linusw@kernel.org> + Mark Brown <broonie@kernel.org> " Sasha Levin <sashal@kernel.org>\0" "\00:1\0" "b\0" - "6.18-stable review patch. If anyone has any objections, please let me know.\n" + "6.12-stable review patch. If anyone has any objections, please let me know.\n" "\n" "------------------\n" "\n" - "From: Johannes Berg <johannes.berg@intel.com>\n" + "From: Linus Walleij <linusw@kernel.org>\n" "\n" - "[ Upstream commit 89e367a90c1a877ca9c5d75d3848582d80fd0e60 ]\n" + "[ Upstream commit f98785adf004db6b1c9f4cea9dadae7b800db72f ]\n" "\n" - "When stopping the AP, explicitly disable FTM responder while\n" - "disabling beaconing.\n" + "The codec programs I2S as an undelayed left-aligned format, although the\n" + "hardware manual defines delayed left-aligned as I2S compatible. It also\n" + "enables the master generator when the codec is a clock consumer, changes\n" + "registers before the complete format has been validated, and discards\n" + "register I/O errors.\n" "\n" - "Link: https://patch.msgid.link/20260505151241.f213196d7d6a.I95d65c030e986c5f7d63ecbd79596da890b9fc84@changeid\n" - "Signed-off-by: Johannes Berg <johannes.berg@intel.com>\n" + "Build all three interface register values before writing them, use the\n" + "required one-bit I2S delay, only run the master generator for a provider\n" + "configuration, and propagate write failures.\n" + "\n" + "Fixes: 679d7abdc754 (\"ASoC: codecs: Add AB8500 codec-driver\")\n" + "Assisted-by: LLM\n" + "Signed-off-by: Linus Walleij <linusw@kernel.org>\n" + "Link: https://patch.msgid.link/20260831-ab8500-codec-fixes-v1-3-f85024e717e3@kernel.org\n" + "Signed-off-by: Mark Brown <broonie@kernel.org>\n" "Signed-off-by: Sasha Levin <sashal@kernel.org>\n" "---\n" - " net/mac80211/cfg.c | 9 +++++++--\n" - " 1 file changed, 7 insertions(+), 2 deletions(-)\n" + " sound/soc/codecs/ab8500-codec.c | 175 ++++++++++++--------------------\n" + " 1 file changed, 64 insertions(+), 111 deletions(-)\n" "\n" - "diff --git a/net/mac80211/cfg.c b/net/mac80211/cfg.c\n" - "index f6232948bc0f4..72c9d5aceae58 100644\n" - "--- a/net/mac80211/cfg.c\n" - "+++ b/net/mac80211/cfg.c\n" - "@@ -1811,6 +1811,7 @@ static int ieee80211_stop_ap(struct wiphy *wiphy, struct net_device *dev,\n" - " \tstruct ieee80211_link_data *link =\n" - " \t\tsdata_dereference(sdata->link[link_id], sdata);\n" - " \tstruct ieee80211_bss_conf *link_conf = link->conf;\n" - "+\tu64 changes = BSS_CHANGED_BEACON_ENABLED;\n" - " \tLIST_HEAD(keys);\n" + "diff --git a/sound/soc/codecs/ab8500-codec.c b/sound/soc/codecs/ab8500-codec.c\n" + "index 2c7e3b7a386ae..595d378d02320 100644\n" + "--- a/sound/soc/codecs/ab8500-codec.c\n" + "+++ b/sound/soc/codecs/ab8500-codec.c\n" + "@@ -2016,149 +2016,91 @@ static int ab8500_audio_set_ear_cmv(struct snd_soc_component *component,\n" + " \treturn 0;\n" + " }\n" " \n" - " \tlockdep_assert_wiphy(local->hw.wiphy);\n" - "@@ -1860,6 +1861,11 @@ static int ieee80211_stop_ap(struct wiphy *wiphy, struct net_device *dev,\n" - " \tif (old_s1g_short_beacon)\n" - " \t\tkfree_rcu(old_s1g_short_beacon, rcu_head);\n" + "-static int ab8500_audio_set_bit_delay(struct snd_soc_dai *dai,\n" + "-\t\t\t\tunsigned int delay)\n" + "-{\n" + "-\tunsigned int mask, val;\n" + "-\tstruct snd_soc_component *component = dai->component;\n" + "-\n" + "-\tmask = BIT(AB8500_DIGIFCONF2_IF0DEL);\n" + "-\tval = 0;\n" + "-\n" + "-\tswitch (delay) {\n" + "-\tcase 0:\n" + "-\t\tbreak;\n" + "-\tcase 1:\n" + "-\t\tval |= BIT(AB8500_DIGIFCONF2_IF0DEL);\n" + "-\t\tbreak;\n" + "-\tdefault:\n" + "-\t\tdev_err(dai->component->dev,\n" + "-\t\t\t\"%s: ERROR: Unsupported bit-delay (0x%x)!\\n\",\n" + "-\t\t\t__func__, delay);\n" + "-\t\treturn -EINVAL;\n" + "-\t}\n" + "-\n" + "-\tdev_dbg(dai->component->dev, \"%s: IF0 Bit-delay: %d bits.\\n\",\n" + "-\t\t__func__, delay);\n" + "-\tsnd_soc_component_update_bits(component, AB8500_DIGIFCONF2, mask, val);\n" + "-\n" + "-\treturn 0;\n" + "-}\n" + "-\n" + "-/* Gates clocking according format mask */\n" + "-static int ab8500_codec_set_dai_clock_gate(struct snd_soc_component *component,\n" + "-\t\t\t\t\tunsigned int fmt)\n" + "-{\n" + "-\tunsigned int mask;\n" + "-\tunsigned int val;\n" + "-\n" + "-\tmask = BIT(AB8500_DIGIFCONF1_ENMASTGEN) |\n" + "-\t\t\tBIT(AB8500_DIGIFCONF1_ENFSBITCLK0);\n" + "-\n" + "-\tval = BIT(AB8500_DIGIFCONF1_ENMASTGEN);\n" + "-\n" + "-\tswitch (fmt & SND_SOC_DAIFMT_CLOCK_MASK) {\n" + "-\tcase SND_SOC_DAIFMT_CONT: /* continuous clock */\n" + "-\t\tdev_dbg(component->dev, \"%s: IF0 Clock is continuous.\\n\",\n" + "-\t\t\t__func__);\n" + "-\t\tval |= BIT(AB8500_DIGIFCONF1_ENFSBITCLK0);\n" + "-\t\tbreak;\n" + "-\tcase SND_SOC_DAIFMT_GATED: /* clock is gated */\n" + "-\t\tdev_dbg(component->dev, \"%s: IF0 Clock is gated.\\n\",\n" + "-\t\t\t__func__);\n" + "-\t\tbreak;\n" + "-\tdefault:\n" + "-\t\tdev_err(component->dev,\n" + "-\t\t\t\"%s: ERROR: Unsupported clock mask (0x%x)!\\n\",\n" + "-\t\t\t__func__, fmt & SND_SOC_DAIFMT_CLOCK_MASK);\n" + "-\t\treturn -EINVAL;\n" + "-\t}\n" + "-\n" + "-\tsnd_soc_component_update_bits(component, AB8500_DIGIFCONF1, mask, val);\n" + "-\n" + "-\treturn 0;\n" + "-}\n" + "-\n" + " static int ab8500_codec_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)\n" + " {\n" + "-\tunsigned int mask;\n" + "-\tunsigned int val;\n" + " \tstruct snd_soc_component *component = dai->component;\n" + "-\tint status;\n" + "+\tunsigned int conf1_mask, conf1_val = 0;\n" + "+\tunsigned int conf2_mask, conf2_val = 0;\n" + "+\tunsigned int conf3_mask, conf3_val = 0;\n" + "+\tbool provider = false;\n" + "+\tint ret;\n" " \n" - "+\tif (link_conf->ftm_responder) {\n" - "+\t\tlink_conf->ftm_responder = false;\n" - "+\t\tchanges |= BSS_CHANGED_FTM_RESPONDER;\n" - "+\t}\n" - "+\n" - " \tkfree(link_conf->ftmr_params);\n" - " \tlink_conf->ftmr_params = NULL;\n" + " \tdev_dbg(component->dev, \"%s: Enter (fmt = 0x%x)\\n\", __func__, fmt);\n" + " \n" + "-\tmask = BIT(AB8500_DIGIFCONF3_IF1DATOIF0AD) |\n" + "+\tconf3_mask = BIT(AB8500_DIGIFCONF3_IF1DATOIF0AD) |\n" + " \t\t\tBIT(AB8500_DIGIFCONF3_IF1CLKTOIF0CLK) |\n" + " \t\t\tBIT(AB8500_DIGIFCONF3_IF0BFIFOEN) |\n" + " \t\t\tBIT(AB8500_DIGIFCONF3_IF0MASTER);\n" + "-\tval = 0;\n" + " \n" + " \tswitch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {\n" + " \tcase SND_SOC_DAIFMT_CBP_CFP:\n" + "-\t\tdev_dbg(dai->component->dev,\n" + "+\t\tdev_dbg(component->dev,\n" + " \t\t\t\"%s: IF0 Master-mode: AB8500 provider.\\n\", __func__);\n" + "-\t\tval |= BIT(AB8500_DIGIFCONF3_IF0MASTER);\n" + "+\t\tconf3_val |= BIT(AB8500_DIGIFCONF3_IF0MASTER);\n" + "+\t\tprovider = true;\n" + " \t\tbreak;\n" + " \tcase SND_SOC_DAIFMT_CBC_CFC:\n" + "-\t\tdev_dbg(dai->component->dev,\n" + "+\t\tdev_dbg(component->dev,\n" + " \t\t\t\"%s: IF0 Master-mode: AB8500 consumer.\\n\", __func__);\n" + " \t\tbreak;\n" + " \tcase SND_SOC_DAIFMT_CBC_CFP:\n" + " \tcase SND_SOC_DAIFMT_CBP_CFC:\n" + "-\t\tdev_err(dai->component->dev,\n" + "+\t\tdev_err(component->dev,\n" + " \t\t\t\"%s: ERROR: The device is either a provider or a consumer.\\n\",\n" + " \t\t\t__func__);\n" + " \t\tfallthrough;\n" + " \tdefault:\n" + "-\t\tdev_err(dai->component->dev,\n" + "-\t\t\t\"%s: ERROR: Unsupporter clocking mask 0x%x\\n\",\n" + "+\t\tdev_err(component->dev,\n" + "+\t\t\t\"%s: ERROR: Unsupported clocking mask 0x%x\\n\",\n" + " \t\t\t__func__, fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK);\n" + " \t\treturn -EINVAL;\n" + " \t}\n" + " \n" + "-\tsnd_soc_component_update_bits(component, AB8500_DIGIFCONF3, mask, val);\n" + "-\n" + "-\t/* Set clock gating */\n" + "-\tstatus = ab8500_codec_set_dai_clock_gate(component, fmt);\n" + "-\tif (status) {\n" + "-\t\tdev_err(dai->component->dev,\n" + "-\t\t\t\"%s: ERROR: Failed to set clock gate (%d).\\n\",\n" + "-\t\t\t__func__, status);\n" + "-\t\treturn status;\n" + "+\tconf1_mask = BIT(AB8500_DIGIFCONF1_ENMASTGEN) |\n" + "+\t\t BIT(AB8500_DIGIFCONF1_ENFSBITCLK0);\n" + "+\tswitch (fmt & SND_SOC_DAIFMT_CLOCK_MASK) {\n" + "+\tcase SND_SOC_DAIFMT_CONT:\n" + "+\t\tif (provider)\n" + "+\t\t\tconf1_val = conf1_mask;\n" + "+\t\tbreak;\n" + "+\tcase SND_SOC_DAIFMT_GATED:\n" + "+\t\tif (provider)\n" + "+\t\t\tconf1_val = BIT(AB8500_DIGIFCONF1_ENMASTGEN);\n" + "+\t\tbreak;\n" + "+\tdefault:\n" + "+\t\tdev_err(component->dev, \"%s: Unsupported clock mask 0x%x\\n\",\n" + "+\t\t\t__func__, fmt & SND_SOC_DAIFMT_CLOCK_MASK);\n" + "+\t\treturn -EINVAL;\n" + " \t}\n" + " \n" + "-\t/* Setting data transfer format */\n" + "-\n" + "-\tmask = BIT(AB8500_DIGIFCONF2_IF0FORMAT0) |\n" + "-\t\tBIT(AB8500_DIGIFCONF2_IF0FORMAT1) |\n" + "-\t\tBIT(AB8500_DIGIFCONF2_FSYNC0P) |\n" + "-\t\tBIT(AB8500_DIGIFCONF2_BITCLK0P);\n" + "-\tval = 0;\n" + "+\tconf2_mask = BIT(AB8500_DIGIFCONF2_IF0FORMAT0) |\n" + "+\t\t BIT(AB8500_DIGIFCONF2_IF0FORMAT1) |\n" + "+\t\t BIT(AB8500_DIGIFCONF2_IF0DEL) |\n" + "+\t\t BIT(AB8500_DIGIFCONF2_FSYNC0P) |\n" + "+\t\t BIT(AB8500_DIGIFCONF2_BITCLK0P);\n" + " \n" + " \tswitch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {\n" + " \tcase SND_SOC_DAIFMT_I2S: /* I2S mode */\n" + "-\t\tdev_dbg(dai->component->dev, \"%s: IF0 Protocol: I2S\\n\", __func__);\n" + "-\t\tval |= BIT(AB8500_DIGIFCONF2_IF0FORMAT1);\n" + "-\t\tab8500_audio_set_bit_delay(dai, 0);\n" + "+\t\tdev_dbg(component->dev, \"%s: IF0 Protocol: I2S\\n\", __func__);\n" + "+\t\tconf2_val |= BIT(AB8500_DIGIFCONF2_IF0FORMAT1) |\n" + "+\t\t\t BIT(AB8500_DIGIFCONF2_IF0DEL);\n" + " \t\tbreak;\n" " \n" - "@@ -1881,8 +1887,7 @@ static int ieee80211_stop_ap(struct wiphy *wiphy, struct net_device *dev,\n" - " \tsdata->vif.cfg.ssid_len = 0;\n" - " \tsdata->vif.cfg.s1g = false;\n" - " \tclear_bit(SDATA_STATE_OFFCHANNEL_BEACON_STOPPED, &sdata->state);\n" - "-\tieee80211_link_info_change_notify(sdata, link,\n" - "-\t\t\t\t\t BSS_CHANGED_BEACON_ENABLED);\n" - "+\tieee80211_link_info_change_notify(sdata, link, changes);\n" + " \tcase SND_SOC_DAIFMT_DSP_A: /* L data MSB after FRM LRC */\n" + "-\t\tdev_dbg(dai->component->dev,\n" + "+\t\tdev_dbg(component->dev,\n" + " \t\t\t\"%s: IF0 Protocol: DSP A (TDM)\\n\", __func__);\n" + "-\t\tval |= BIT(AB8500_DIGIFCONF2_IF0FORMAT0);\n" + "-\t\tab8500_audio_set_bit_delay(dai, 1);\n" + "+\t\tconf2_val |= BIT(AB8500_DIGIFCONF2_IF0FORMAT0) |\n" + "+\t\t\t BIT(AB8500_DIGIFCONF2_IF0DEL);\n" + " \t\tbreak;\n" + " \n" + " \tcase SND_SOC_DAIFMT_DSP_B: /* L data MSB during FRM LRC */\n" + "-\t\tdev_dbg(dai->component->dev,\n" + "+\t\tdev_dbg(component->dev,\n" + " \t\t\t\"%s: IF0 Protocol: DSP B (TDM)\\n\", __func__);\n" + "-\t\tval |= BIT(AB8500_DIGIFCONF2_IF0FORMAT0);\n" + "-\t\tab8500_audio_set_bit_delay(dai, 0);\n" + "+\t\tconf2_val |= BIT(AB8500_DIGIFCONF2_IF0FORMAT0);\n" + " \t\tbreak;\n" + " \n" + " \tdefault:\n" + "-\t\tdev_err(dai->component->dev,\n" + "+\t\tdev_err(component->dev,\n" + " \t\t\t\"%s: ERROR: Unsupported format (0x%x)!\\n\",\n" + " \t\t\t__func__, fmt & SND_SOC_DAIFMT_FORMAT_MASK);\n" + " \t\treturn -EINVAL;\n" + "@@ -2166,39 +2108,50 @@ static int ab8500_codec_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)\n" + " \n" + " \tswitch (fmt & SND_SOC_DAIFMT_INV_MASK) {\n" + " \tcase SND_SOC_DAIFMT_NB_NF: /* normal bit clock + frame */\n" + "-\t\tdev_dbg(dai->component->dev,\n" + "+\t\tdev_dbg(component->dev,\n" + " \t\t\t\"%s: IF0: Normal bit clock, normal frame\\n\",\n" + " \t\t\t__func__);\n" + " \t\tbreak;\n" + " \tcase SND_SOC_DAIFMT_NB_IF: /* normal BCLK + inv FRM */\n" + "-\t\tdev_dbg(dai->component->dev,\n" + "+\t\tdev_dbg(component->dev,\n" + " \t\t\t\"%s: IF0: Normal bit clock, inverted frame\\n\",\n" + " \t\t\t__func__);\n" + "-\t\tval |= BIT(AB8500_DIGIFCONF2_FSYNC0P);\n" + "+\t\tconf2_val |= BIT(AB8500_DIGIFCONF2_FSYNC0P);\n" + " \t\tbreak;\n" + " \tcase SND_SOC_DAIFMT_IB_NF: /* invert BCLK + nor FRM */\n" + "-\t\tdev_dbg(dai->component->dev,\n" + "+\t\tdev_dbg(component->dev,\n" + " \t\t\t\"%s: IF0: Inverted bit clock, normal frame\\n\",\n" + " \t\t\t__func__);\n" + "-\t\tval |= BIT(AB8500_DIGIFCONF2_BITCLK0P);\n" + "+\t\tconf2_val |= BIT(AB8500_DIGIFCONF2_BITCLK0P);\n" + " \t\tbreak;\n" + " \tcase SND_SOC_DAIFMT_IB_IF: /* invert BCLK + FRM */\n" + "-\t\tdev_dbg(dai->component->dev,\n" + "+\t\tdev_dbg(component->dev,\n" + " \t\t\t\"%s: IF0: Inverted bit clock, inverted frame\\n\",\n" + " \t\t\t__func__);\n" + "-\t\tval |= BIT(AB8500_DIGIFCONF2_FSYNC0P);\n" + "-\t\tval |= BIT(AB8500_DIGIFCONF2_BITCLK0P);\n" + "+\t\tconf2_val |= BIT(AB8500_DIGIFCONF2_FSYNC0P) |\n" + "+\t\t\t BIT(AB8500_DIGIFCONF2_BITCLK0P);\n" + " \t\tbreak;\n" + " \tdefault:\n" + "-\t\tdev_err(dai->component->dev,\n" + "+\t\tdev_err(component->dev,\n" + " \t\t\t\"%s: ERROR: Unsupported INV mask 0x%x\\n\",\n" + " \t\t\t__func__, fmt & SND_SOC_DAIFMT_INV_MASK);\n" + " \t\treturn -EINVAL;\n" + " \t}\n" + " \n" + "-\tsnd_soc_component_update_bits(component, AB8500_DIGIFCONF2, mask, val);\n" + "+\tret = snd_soc_component_update_bits(component, AB8500_DIGIFCONF3,\n" + "+\t\t\t\t\t conf3_mask, conf3_val);\n" + "+\tif (ret < 0)\n" + "+\t\treturn ret;\n" + " \n" + "-\treturn 0;\n" + "+\tret = snd_soc_component_update_bits(component, AB8500_DIGIFCONF1,\n" + "+\t\t\t\t\t conf1_mask, conf1_val);\n" + "+\tif (ret < 0)\n" + "+\t\treturn ret;\n" + "+\n" + "+\tret = snd_soc_component_update_bits(component, AB8500_DIGIFCONF2,\n" + "+\t\t\t\t\t conf2_mask, conf2_val);\n" + "+\n" + "+\treturn ret < 0 ? ret : 0;\n" + " }\n" " \n" - " \tieee80211_remove_link_keys(link, &keys);\n" - " \tif (!list_empty(&keys)) {\n" + " static int ab8500_codec_set_dai_tdm_slot(struct snd_soc_dai *dai,\n" "-- \n" 2.53.0 -4d5dbf22f22fd7f027fb791fe8f3c311b6888638dec68b38170ff05677d658a7 +8648363bede4755466afdc955609ba2e929bb3b81b87bbd54f2efb0fafe93fd0
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