diff for duplicates of <20260917151553.989274075@linuxfoundation.org> diff --git a/a/1.txt b/N1/1.txt index a13490b..29603ec 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,77 +1,257 @@ -6.18-stable review patch. If anyone has any objections, please let me know. +6.12-stable review patch. If anyone has any objections, please let me know. ------------------ -From: Thorsten Blum <thorsten.blum@linux.dev> +From: Ciprian Regus <ciprian.regus@analog.com> -[ Upstream commit 9ab1392b1163daab674484d6ddacf16f0ad4c040 ] +[ Upstream commit 7d0e4c4b8c85d8ea2c77a90e1f7a7f74ce531e52 ] -Add a new helper omap_des_unregister_algs() and replace two for loops in -omap_des_probe() and omap_des_remove(), which also ensure ->registered -is reset to 0. +Implement the OA TC6 standard defined protected mode for control (register +access) transactions. In addition to the current register access formats +the oa_tc6 driver handles, 1's complement values of the data field +are included (by both the host and the MACPHY) in the SPI transfer frames. +This feature acts as an integrity check. -Signed-off-by: Thorsten Blum <thorsten.blum@linux.dev> -Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> +Control write transactions look like this: + + |<- 32 bits ->|<--- data_size --->|<- 32 bits ->| + MOSI: | ctrl header | reg write data | ignored | + MISO: | (discard) | echoed ctrl hdr | echoed data | + + data_size (LEN = number of registers to read in a sequence): + Unprotected: 32 x (LEN + 1) bits + Protected: 2 x 32 x (LEN + 1) bits + +Control read transaction: + + |<- 32 bits ->|<--- 32 bits --> |<- data_size ->| + MOSI: | ctrl header | ignored ... | + MISO: | (discard) | echoed ctrl hdr | reg read data | + + data_size (LEN = number of registers to read in a sequence): + Unprotected: 32 x (LEN + 1) bits + Protected: 2 x 32 x (LEN + 1) bits + +Register data format ("reg write data" and "reg read data"): + + Unprotected: + | W1 (normal) | W2 (normal) | ... | Wx (normal) | + + Protected: + | W1 (normal) | W1 (complement) | ... | Wx (normal) | Wx (complement)| + +The protected mode state can be read from the bit 5 of CONFIG0 (0x4) +register, and this setting is usually only configured during the +MACPHY's reset (depending on the device it can be done by setting the +state of a pin). We can read the protected mode configuration before any +other register access and since the SPI transfer is initially sized for an +unprotected read, the MACPHY's complement words are never clocked out +and no checking is required. The data transactions (Ethernet frames) +remain unchanged. + +Signed-off-by: Ciprian Regus <ciprian.regus@analog.com> +Link: https://patch.msgid.link/20260708-adin1140-driver-v5-2-4aca7b51a58b@analog.com +Signed-off-by: Paolo Abeni <pabeni@redhat.com> +Stable-dep-of: 172c974113bf ("net: ethernet: oa_tc6: Improve the error recovery") Signed-off-by: Sasha Levin <sashal@kernel.org> --- - drivers/crypto/omap-des.c | 26 ++++++++++++++++---------- - 1 file changed, 16 insertions(+), 10 deletions(-) - -diff --git a/drivers/crypto/omap-des.c b/drivers/crypto/omap-des.c -index 149ebd77710bf..16d5c617d5ee8 100644 ---- a/drivers/crypto/omap-des.c -+++ b/drivers/crypto/omap-des.c -@@ -938,6 +938,20 @@ static int omap_des_get_pdev(struct omap_des_dev *dd, + drivers/net/ethernet/oa_tc6.c | 93 ++++++++++++++++++++++++++++------- + 1 file changed, 76 insertions(+), 17 deletions(-) + +diff --git a/drivers/net/ethernet/oa_tc6.c b/drivers/net/ethernet/oa_tc6.c +index cf5249f81651f..3321ed4201963 100644 +--- a/drivers/net/ethernet/oa_tc6.c ++++ b/drivers/net/ethernet/oa_tc6.c +@@ -25,6 +25,7 @@ + #define OA_TC6_REG_CONFIG0 0x0004 + #define CONFIG0_SYNC BIT(15) + #define CONFIG0_ZARFE_ENABLE BIT(12) ++#define CONFIG0_PROTE BIT(5) + + /* Status Register #0 */ + #define OA_TC6_REG_STATUS0 0x0008 +@@ -90,14 +91,17 @@ + #define OA_TC6_PHY_C45_AUTO_NEG_MMS5 5 /* MMD 7 */ + #define OA_TC6_PHY_C45_POWER_UNIT_MMS6 6 /* MMD 13 */ + ++#define OA_TC6_CTRL_PROT_REPLY_SIZE 4 + #define OA_TC6_CTRL_HEADER_SIZE 4 + #define OA_TC6_CTRL_REG_VALUE_SIZE 4 + #define OA_TC6_CTRL_IGNORED_SIZE 4 + #define OA_TC6_CTRL_MAX_REGISTERS 128 +-#define OA_TC6_CTRL_SPI_BUF_SIZE (OA_TC6_CTRL_HEADER_SIZE +\ +- (OA_TC6_CTRL_MAX_REGISTERS *\ +- OA_TC6_CTRL_REG_VALUE_SIZE) +\ +- OA_TC6_CTRL_IGNORED_SIZE) ++#define OA_TC6_CTRL_SPI_BUF_SIZE (OA_TC6_CTRL_HEADER_SIZE +\ ++ (OA_TC6_CTRL_MAX_REGISTERS *\ ++ (OA_TC6_CTRL_REG_VALUE_SIZE +\ ++ OA_TC6_CTRL_PROT_REPLY_SIZE)) +\ ++ OA_TC6_CTRL_IGNORED_SIZE) ++ + #define OA_TC6_CHUNK_PAYLOAD_SIZE 64 + #define OA_TC6_DATA_HEADER_SIZE 4 + #define OA_TC6_CHUNK_SIZE (OA_TC6_DATA_HEADER_SIZE +\ +@@ -131,6 +135,7 @@ struct oa_tc6 { + bool rx_buf_overflow; + bool int_flag; + bool disable_traffic; ++ bool prot_ctrl; + }; + + enum oa_tc6_header_type { +@@ -214,25 +219,36 @@ static void oa_tc6_update_ctrl_write_data(struct oa_tc6 *tc6, u32 value[], + { + __be32 *tx_buf = tc6->spi_ctrl_tx_buf + OA_TC6_CTRL_HEADER_SIZE; + +- for (int i = 0; i < length; i++) ++ for (int i = 0; i < length; i++) { + *tx_buf++ = cpu_to_be32(value[i]); ++ if (tc6->prot_ctrl) ++ *tx_buf++ = cpu_to_be32(~value[i]); ++ } + } + +-static u16 oa_tc6_calculate_ctrl_buf_size(u8 length) ++static u16 oa_tc6_calculate_ctrl_buf_size(u8 length, bool ctrl_prot) + { ++ u32 reply_size = OA_TC6_CTRL_REG_VALUE_SIZE; ++ ++ if (ctrl_prot) ++ reply_size += OA_TC6_CTRL_PROT_REPLY_SIZE; ++ + /* Control command consists 4 bytes header + 4 bytes register value for +- * each register + 4 bytes ignored value. ++ * each register (+ 4 bytes for the register value complement in case ++ * protected mode is used) + 4 bytes ignored value. + */ +- return OA_TC6_CTRL_HEADER_SIZE + OA_TC6_CTRL_REG_VALUE_SIZE * length + ++ return OA_TC6_CTRL_HEADER_SIZE + reply_size * length + + OA_TC6_CTRL_IGNORED_SIZE; + } + + static void oa_tc6_prepare_ctrl_spi_buf(struct oa_tc6 *tc6, u32 address, + u32 value[], u8 length, +- enum oa_tc6_register_op reg_op) ++ enum oa_tc6_register_op reg_op, ++ u16 buf_size) + { + __be32 *tx_buf = tc6->spi_ctrl_tx_buf; + ++ memset(tx_buf, 0, buf_size); + *tx_buf = oa_tc6_prepare_ctrl_header(address, length, reg_op); + + if (reg_op == OA_TC6_CTRL_REG_WRITE) +@@ -255,10 +271,12 @@ static int oa_tc6_check_ctrl_write_reply(struct oa_tc6 *tc6, u8 size) return 0; } -+static void omap_des_unregister_algs(const struct omap_des_pdata *pdata) -+{ -+ struct omap_des_algs_info *alg_info; -+ int i; +-static int oa_tc6_check_ctrl_read_reply(struct oa_tc6 *tc6, u8 size) ++static int oa_tc6_check_ctrl_read_reply(struct oa_tc6 *tc6, u8 length) + { +- u32 *rx_buf = tc6->spi_ctrl_rx_buf + OA_TC6_CTRL_IGNORED_SIZE; +- u32 *tx_buf = tc6->spi_ctrl_tx_buf; ++ __be32 *rx_buf = tc6->spi_ctrl_rx_buf + OA_TC6_CTRL_IGNORED_SIZE; ++ __be32 *tx_buf = tc6->spi_ctrl_tx_buf; ++ u32 complement; ++ u32 reply; + + /* The echoed control read header must match with the one that was + * transmitted. +@@ -266,6 +284,20 @@ static int oa_tc6_check_ctrl_read_reply(struct oa_tc6 *tc6, u8 size) + if (*tx_buf != *rx_buf) + return -EPROTO; + ++ if (tc6->prot_ctrl) { ++ /* Skip past the echoed header to the value/complement pairs */ ++ rx_buf += 1; ++ for (int i = 0; i < length; i++) { ++ reply = be32_to_cpu(rx_buf[0]); ++ complement = be32_to_cpu(rx_buf[1]); + -+ for (i = pdata->algs_info_size - 1; i >= 0; i--) { -+ alg_info = &pdata->algs_info[i]; ++ if (complement != ~reply) ++ return -EPROTO; + -+ crypto_engine_unregister_skciphers(alg_info->algs_list, -+ alg_info->registered); -+ alg_info->registered = 0; ++ rx_buf += 2; ++ } + } -+} + - static int omap_des_probe(struct platform_device *pdev) - { - struct device *dev = &pdev->dev; -@@ -1043,11 +1057,7 @@ static int omap_des_probe(struct platform_device *pdev) return 0; + } - err_algs: -- for (i = dd->pdata->algs_info_size - 1; i >= 0; i--) -- for (j = dd->pdata->algs_info[i].registered - 1; j >= 0; j--) -- crypto_engine_unregister_skcipher( -- &dd->pdata->algs_info[i].algs_list[j]); -- -+ omap_des_unregister_algs(dd->pdata); - err_engine: - if (dd->engine) - crypto_engine_exit(dd->engine); -@@ -1067,16 +1077,12 @@ static int omap_des_probe(struct platform_device *pdev) - static void omap_des_remove(struct platform_device *pdev) - { - struct omap_des_dev *dd = platform_get_drvdata(pdev); -- int i, j; +@@ -275,8 +307,13 @@ static void oa_tc6_copy_ctrl_read_data(struct oa_tc6 *tc6, u32 value[], + __be32 *rx_buf = tc6->spi_ctrl_rx_buf + OA_TC6_CTRL_IGNORED_SIZE + + OA_TC6_CTRL_HEADER_SIZE; + +- for (int i = 0; i < length; i++) ++ for (int i = 0; i < length; i++) { + value[i] = be32_to_cpu(*rx_buf++); ++ ++ /* skip complement word */ ++ if (tc6->prot_ctrl) ++ rx_buf++; ++ } + } + + static int oa_tc6_perform_ctrl(struct oa_tc6 *tc6, u32 address, u32 value[], +@@ -285,10 +322,10 @@ static int oa_tc6_perform_ctrl(struct oa_tc6 *tc6, u32 address, u32 value[], + u16 size; + int ret; - spin_lock_bh(&list_lock); - list_del(&dd->list); - spin_unlock_bh(&list_lock); +- /* Prepare control command and copy to SPI control buffer */ +- oa_tc6_prepare_ctrl_spi_buf(tc6, address, value, length, reg_op); ++ size = oa_tc6_calculate_ctrl_buf_size(length, tc6->prot_ctrl); -- for (i = dd->pdata->algs_info_size - 1; i >= 0; i--) -- for (j = dd->pdata->algs_info[i].registered - 1; j >= 0; j--) -- crypto_engine_unregister_skcipher( -- &dd->pdata->algs_info[i].algs_list[j]); -+ omap_des_unregister_algs(dd->pdata); +- size = oa_tc6_calculate_ctrl_buf_size(length); ++ /* Prepare control command and copy to SPI control buffer */ ++ oa_tc6_prepare_ctrl_spi_buf(tc6, address, value, length, reg_op, size); - cancel_work_sync(&dd->done_task); - omap_des_dma_cleanup(dd); + /* Perform SPI transfer */ + ret = oa_tc6_spi_transfer(tc6, OA_TC6_CTRL_HEADER, size); +@@ -303,7 +340,7 @@ static int oa_tc6_perform_ctrl(struct oa_tc6 *tc6, u32 address, u32 value[], + return oa_tc6_check_ctrl_write_reply(tc6, size); + + /* Check echoed/received control read command reply for errors */ +- ret = oa_tc6_check_ctrl_read_reply(tc6, size); ++ ret = oa_tc6_check_ctrl_read_reply(tc6, length); + if (ret) + return ret; + +@@ -1273,6 +1310,20 @@ netdev_tx_t oa_tc6_start_xmit(struct oa_tc6 *tc6, struct sk_buff *skb) + } + EXPORT_SYMBOL_GPL(oa_tc6_start_xmit); + ++static int oa_tc6_check_ctrl_protection(struct oa_tc6 *tc6) ++{ ++ u32 regval; ++ int ret; ++ ++ ret = oa_tc6_read_register(tc6, OA_TC6_REG_CONFIG0, ®val); ++ if (ret) ++ return ret; ++ ++ tc6->prot_ctrl = FIELD_GET(CONFIG0_PROTE, regval); ++ ++ return 0; ++} ++ + /** + * oa_tc6_init - allocates and initializes oa_tc6 structure. + * @spi: device with which data will be exchanged. +@@ -1325,6 +1376,14 @@ struct oa_tc6 *oa_tc6_init(struct spi_device *spi, struct net_device *netdev) + if (!tc6->spi_data_rx_buf) + return NULL; + ++ /* Check the PROTE bit status so that we can reset the device */ ++ ret = oa_tc6_check_ctrl_protection(tc6); ++ if (ret) { ++ dev_err(&tc6->spi->dev, ++ "Failed to check the protection mode: %d\n", ret); ++ return NULL; ++ } ++ + ret = oa_tc6_sw_reset_macphy(tc6); + if (ret) { + dev_err(&tc6->spi->dev, -- 2.53.0 diff --git a/a/content_digest b/N1/content_digest index a6bb4d3..5a7e3a0 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,91 +1,271 @@ - "ref\020260917151551.901433442@linuxfoundation.org\0" + "ref\020260917151539.408551884@linuxfoundation.org\0" "From\0Greg Kroah-Hartman <gregkh@linuxfoundation.org>\0" - "Subject\0[PATCH 6.18 0075/1250] crypto: omap - add omap_des_unregister_algs helper\0" - "Date\0Thu, 17 Sep 2026 15:57:50 +0100\0" + "Subject\0[PATCH 6.12 0562/1102] net: ethernet: oa_tc6: Handle the OA TC6 SPI protected mode\0" + "Date\0Thu, 17 Sep 2026 16:08:25 +0100\0" "To\0stable@vger.kernel.org\0" "Cc\0Greg Kroah-Hartman <gregkh@linuxfoundation.org>" patches@lists.linux.dev - Thorsten Blum <thorsten.blum@linux.dev> - Herbert Xu <herbert@gondor.apana.org.au> + Ciprian Regus <ciprian.regus@analog.com> + Paolo Abeni <pabeni@redhat.com> " Sasha Levin <sashal@kernel.org>\0" "\00:1\0" "b\0" - "6.18-stable review patch. If anyone has any objections, please let me know.\n" + "6.12-stable review patch. If anyone has any objections, please let me know.\n" "\n" "------------------\n" "\n" - "From: Thorsten Blum <thorsten.blum@linux.dev>\n" + "From: Ciprian Regus <ciprian.regus@analog.com>\n" "\n" - "[ Upstream commit 9ab1392b1163daab674484d6ddacf16f0ad4c040 ]\n" + "[ Upstream commit 7d0e4c4b8c85d8ea2c77a90e1f7a7f74ce531e52 ]\n" "\n" - "Add a new helper omap_des_unregister_algs() and replace two for loops in\n" - "omap_des_probe() and omap_des_remove(), which also ensure ->registered\n" - "is reset to 0.\n" + "Implement the OA TC6 standard defined protected mode for control (register\n" + "access) transactions. In addition to the current register access formats\n" + "the oa_tc6 driver handles, 1's complement values of the data field\n" + "are included (by both the host and the MACPHY) in the SPI transfer frames.\n" + "This feature acts as an integrity check.\n" "\n" - "Signed-off-by: Thorsten Blum <thorsten.blum@linux.dev>\n" - "Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>\n" + "Control write transactions look like this:\n" + "\n" + " |<- 32 bits ->|<--- data_size --->|<- 32 bits ->|\n" + " MOSI: | ctrl header | reg write data | ignored |\n" + " MISO: | (discard) | echoed ctrl hdr | echoed data |\n" + "\n" + " data_size (LEN = number of registers to read in a sequence):\n" + " Unprotected: 32 x (LEN + 1) bits\n" + " Protected: 2 x 32 x (LEN + 1) bits\n" + "\n" + "Control read transaction:\n" + "\n" + " |<- 32 bits ->|<--- 32 bits --> |<- data_size ->|\n" + " MOSI: | ctrl header | ignored ... |\n" + " MISO: | (discard) | echoed ctrl hdr | reg read data |\n" + "\n" + " data_size (LEN = number of registers to read in a sequence):\n" + " Unprotected: 32 x (LEN + 1) bits\n" + " Protected: 2 x 32 x (LEN + 1) bits\n" + "\n" + "Register data format (\"reg write data\" and \"reg read data\"):\n" + "\n" + " Unprotected:\n" + " | W1 (normal) | W2 (normal) | ... | Wx (normal) |\n" + "\n" + " Protected:\n" + " | W1 (normal) | W1 (complement) | ... | Wx (normal) | Wx (complement)|\n" + "\n" + "The protected mode state can be read from the bit 5 of CONFIG0 (0x4)\n" + "register, and this setting is usually only configured during the\n" + "MACPHY's reset (depending on the device it can be done by setting the\n" + "state of a pin). We can read the protected mode configuration before any\n" + "other register access and since the SPI transfer is initially sized for an\n" + "unprotected read, the MACPHY's complement words are never clocked out\n" + "and no checking is required. The data transactions (Ethernet frames)\n" + "remain unchanged.\n" + "\n" + "Signed-off-by: Ciprian Regus <ciprian.regus@analog.com>\n" + "Link: https://patch.msgid.link/20260708-adin1140-driver-v5-2-4aca7b51a58b@analog.com\n" + "Signed-off-by: Paolo Abeni <pabeni@redhat.com>\n" + "Stable-dep-of: 172c974113bf (\"net: ethernet: oa_tc6: Improve the error recovery\")\n" "Signed-off-by: Sasha Levin <sashal@kernel.org>\n" "---\n" - " drivers/crypto/omap-des.c | 26 ++++++++++++++++----------\n" - " 1 file changed, 16 insertions(+), 10 deletions(-)\n" - "\n" - "diff --git a/drivers/crypto/omap-des.c b/drivers/crypto/omap-des.c\n" - "index 149ebd77710bf..16d5c617d5ee8 100644\n" - "--- a/drivers/crypto/omap-des.c\n" - "+++ b/drivers/crypto/omap-des.c\n" - "@@ -938,6 +938,20 @@ static int omap_des_get_pdev(struct omap_des_dev *dd,\n" + " drivers/net/ethernet/oa_tc6.c | 93 ++++++++++++++++++++++++++++-------\n" + " 1 file changed, 76 insertions(+), 17 deletions(-)\n" + "\n" + "diff --git a/drivers/net/ethernet/oa_tc6.c b/drivers/net/ethernet/oa_tc6.c\n" + "index cf5249f81651f..3321ed4201963 100644\n" + "--- a/drivers/net/ethernet/oa_tc6.c\n" + "+++ b/drivers/net/ethernet/oa_tc6.c\n" + "@@ -25,6 +25,7 @@\n" + " #define OA_TC6_REG_CONFIG0\t\t\t0x0004\n" + " #define CONFIG0_SYNC\t\t\t\tBIT(15)\n" + " #define CONFIG0_ZARFE_ENABLE\t\t\tBIT(12)\n" + "+#define CONFIG0_PROTE\t\t\t\tBIT(5)\n" + " \n" + " /* Status Register #0 */\n" + " #define OA_TC6_REG_STATUS0\t\t\t0x0008\n" + "@@ -90,14 +91,17 @@\n" + " #define OA_TC6_PHY_C45_AUTO_NEG_MMS5\t\t5\t/* MMD 7 */\n" + " #define OA_TC6_PHY_C45_POWER_UNIT_MMS6\t\t6\t/* MMD 13 */\n" + " \n" + "+#define OA_TC6_CTRL_PROT_REPLY_SIZE\t\t4\n" + " #define OA_TC6_CTRL_HEADER_SIZE\t\t\t4\n" + " #define OA_TC6_CTRL_REG_VALUE_SIZE\t\t4\n" + " #define OA_TC6_CTRL_IGNORED_SIZE\t\t4\n" + " #define OA_TC6_CTRL_MAX_REGISTERS\t\t128\n" + "-#define OA_TC6_CTRL_SPI_BUF_SIZE\t\t(OA_TC6_CTRL_HEADER_SIZE +\\\n" + "-\t\t\t\t\t\t(OA_TC6_CTRL_MAX_REGISTERS *\\\n" + "-\t\t\t\t\t\tOA_TC6_CTRL_REG_VALUE_SIZE) +\\\n" + "-\t\t\t\t\t\tOA_TC6_CTRL_IGNORED_SIZE)\n" + "+#define OA_TC6_CTRL_SPI_BUF_SIZE\t(OA_TC6_CTRL_HEADER_SIZE +\\\n" + "+\t\t\t\t\t(OA_TC6_CTRL_MAX_REGISTERS *\\\n" + "+\t\t\t\t\t(OA_TC6_CTRL_REG_VALUE_SIZE +\\\n" + "+\t\t\t\t\tOA_TC6_CTRL_PROT_REPLY_SIZE)) +\\\n" + "+\t\t\t\t\tOA_TC6_CTRL_IGNORED_SIZE)\n" + "+\n" + " #define OA_TC6_CHUNK_PAYLOAD_SIZE\t\t64\n" + " #define OA_TC6_DATA_HEADER_SIZE\t\t\t4\n" + " #define OA_TC6_CHUNK_SIZE\t\t\t(OA_TC6_DATA_HEADER_SIZE +\\\n" + "@@ -131,6 +135,7 @@ struct oa_tc6 {\n" + " \tbool rx_buf_overflow;\n" + " \tbool int_flag;\n" + " \tbool disable_traffic;\n" + "+\tbool prot_ctrl;\n" + " };\n" + " \n" + " enum oa_tc6_header_type {\n" + "@@ -214,25 +219,36 @@ static void oa_tc6_update_ctrl_write_data(struct oa_tc6 *tc6, u32 value[],\n" + " {\n" + " \t__be32 *tx_buf = tc6->spi_ctrl_tx_buf + OA_TC6_CTRL_HEADER_SIZE;\n" + " \n" + "-\tfor (int i = 0; i < length; i++)\n" + "+\tfor (int i = 0; i < length; i++) {\n" + " \t\t*tx_buf++ = cpu_to_be32(value[i]);\n" + "+\t\tif (tc6->prot_ctrl)\n" + "+\t\t\t*tx_buf++ = cpu_to_be32(~value[i]);\n" + "+\t}\n" + " }\n" + " \n" + "-static u16 oa_tc6_calculate_ctrl_buf_size(u8 length)\n" + "+static u16 oa_tc6_calculate_ctrl_buf_size(u8 length, bool ctrl_prot)\n" + " {\n" + "+\tu32 reply_size = OA_TC6_CTRL_REG_VALUE_SIZE;\n" + "+\n" + "+\tif (ctrl_prot)\n" + "+\t\treply_size += OA_TC6_CTRL_PROT_REPLY_SIZE;\n" + "+\n" + " \t/* Control command consists 4 bytes header + 4 bytes register value for\n" + "-\t * each register + 4 bytes ignored value.\n" + "+\t * each register (+ 4 bytes for the register value complement in case\n" + "+\t * protected mode is used) + 4 bytes ignored value.\n" + " \t */\n" + "-\treturn OA_TC6_CTRL_HEADER_SIZE + OA_TC6_CTRL_REG_VALUE_SIZE * length +\n" + "+\treturn OA_TC6_CTRL_HEADER_SIZE + reply_size * length +\n" + " \t OA_TC6_CTRL_IGNORED_SIZE;\n" + " }\n" + " \n" + " static void oa_tc6_prepare_ctrl_spi_buf(struct oa_tc6 *tc6, u32 address,\n" + " \t\t\t\t\tu32 value[], u8 length,\n" + "-\t\t\t\t\tenum oa_tc6_register_op reg_op)\n" + "+\t\t\t\t\tenum oa_tc6_register_op reg_op,\n" + "+\t\t\t\t\tu16 buf_size)\n" + " {\n" + " \t__be32 *tx_buf = tc6->spi_ctrl_tx_buf;\n" + " \n" + "+\tmemset(tx_buf, 0, buf_size);\n" + " \t*tx_buf = oa_tc6_prepare_ctrl_header(address, length, reg_op);\n" + " \n" + " \tif (reg_op == OA_TC6_CTRL_REG_WRITE)\n" + "@@ -255,10 +271,12 @@ static int oa_tc6_check_ctrl_write_reply(struct oa_tc6 *tc6, u8 size)\n" " \treturn 0;\n" " }\n" " \n" - "+static void omap_des_unregister_algs(const struct omap_des_pdata *pdata)\n" - "+{\n" - "+\tstruct omap_des_algs_info *alg_info;\n" - "+\tint i;\n" + "-static int oa_tc6_check_ctrl_read_reply(struct oa_tc6 *tc6, u8 size)\n" + "+static int oa_tc6_check_ctrl_read_reply(struct oa_tc6 *tc6, u8 length)\n" + " {\n" + "-\tu32 *rx_buf = tc6->spi_ctrl_rx_buf + OA_TC6_CTRL_IGNORED_SIZE;\n" + "-\tu32 *tx_buf = tc6->spi_ctrl_tx_buf;\n" + "+\t__be32 *rx_buf = tc6->spi_ctrl_rx_buf + OA_TC6_CTRL_IGNORED_SIZE;\n" + "+\t__be32 *tx_buf = tc6->spi_ctrl_tx_buf;\n" + "+\tu32 complement;\n" + "+\tu32 reply;\n" + " \n" + " \t/* The echoed control read header must match with the one that was\n" + " \t * transmitted.\n" + "@@ -266,6 +284,20 @@ static int oa_tc6_check_ctrl_read_reply(struct oa_tc6 *tc6, u8 size)\n" + " \tif (*tx_buf != *rx_buf)\n" + " \t\treturn -EPROTO;\n" + " \n" + "+\tif (tc6->prot_ctrl) {\n" + "+\t\t/* Skip past the echoed header to the value/complement pairs */\n" + "+\t\trx_buf += 1;\n" + "+\t\tfor (int i = 0; i < length; i++) {\n" + "+\t\t\treply = be32_to_cpu(rx_buf[0]);\n" + "+\t\t\tcomplement = be32_to_cpu(rx_buf[1]);\n" "+\n" - "+\tfor (i = pdata->algs_info_size - 1; i >= 0; i--) {\n" - "+\t\talg_info = &pdata->algs_info[i];\n" + "+\t\t\tif (complement != ~reply)\n" + "+\t\t\t\treturn -EPROTO;\n" "+\n" - "+\t\tcrypto_engine_unregister_skciphers(alg_info->algs_list,\n" - "+\t\t\t\t\t\t alg_info->registered);\n" - "+\t\talg_info->registered = 0;\n" + "+\t\t\trx_buf += 2;\n" + "+\t\t}\n" "+\t}\n" - "+}\n" "+\n" - " static int omap_des_probe(struct platform_device *pdev)\n" - " {\n" - " \tstruct device *dev = &pdev->dev;\n" - "@@ -1043,11 +1057,7 @@ static int omap_des_probe(struct platform_device *pdev)\n" " \treturn 0;\n" + " }\n" " \n" - " err_algs:\n" - "-\tfor (i = dd->pdata->algs_info_size - 1; i >= 0; i--)\n" - "-\t\tfor (j = dd->pdata->algs_info[i].registered - 1; j >= 0; j--)\n" - "-\t\t\tcrypto_engine_unregister_skcipher(\n" - "-\t\t\t\t\t&dd->pdata->algs_info[i].algs_list[j]);\n" - "-\n" - "+\tomap_des_unregister_algs(dd->pdata);\n" - " err_engine:\n" - " \tif (dd->engine)\n" - " \t\tcrypto_engine_exit(dd->engine);\n" - "@@ -1067,16 +1077,12 @@ static int omap_des_probe(struct platform_device *pdev)\n" - " static void omap_des_remove(struct platform_device *pdev)\n" - " {\n" - " \tstruct omap_des_dev *dd = platform_get_drvdata(pdev);\n" - "-\tint i, j;\n" + "@@ -275,8 +307,13 @@ static void oa_tc6_copy_ctrl_read_data(struct oa_tc6 *tc6, u32 value[],\n" + " \t__be32 *rx_buf = tc6->spi_ctrl_rx_buf + OA_TC6_CTRL_IGNORED_SIZE +\n" + " \t\t\t OA_TC6_CTRL_HEADER_SIZE;\n" + " \n" + "-\tfor (int i = 0; i < length; i++)\n" + "+\tfor (int i = 0; i < length; i++) {\n" + " \t\tvalue[i] = be32_to_cpu(*rx_buf++);\n" + "+\n" + "+\t\t/* skip complement word */\n" + "+\t\tif (tc6->prot_ctrl)\n" + "+\t\t\trx_buf++;\n" + "+\t}\n" + " }\n" + " \n" + " static int oa_tc6_perform_ctrl(struct oa_tc6 *tc6, u32 address, u32 value[],\n" + "@@ -285,10 +322,10 @@ static int oa_tc6_perform_ctrl(struct oa_tc6 *tc6, u32 address, u32 value[],\n" + " \tu16 size;\n" + " \tint ret;\n" " \n" - " \tspin_lock_bh(&list_lock);\n" - " \tlist_del(&dd->list);\n" - " \tspin_unlock_bh(&list_lock);\n" + "-\t/* Prepare control command and copy to SPI control buffer */\n" + "-\toa_tc6_prepare_ctrl_spi_buf(tc6, address, value, length, reg_op);\n" + "+\tsize = oa_tc6_calculate_ctrl_buf_size(length, tc6->prot_ctrl);\n" " \n" - "-\tfor (i = dd->pdata->algs_info_size - 1; i >= 0; i--)\n" - "-\t\tfor (j = dd->pdata->algs_info[i].registered - 1; j >= 0; j--)\n" - "-\t\t\tcrypto_engine_unregister_skcipher(\n" - "-\t\t\t\t\t&dd->pdata->algs_info[i].algs_list[j]);\n" - "+\tomap_des_unregister_algs(dd->pdata);\n" + "-\tsize = oa_tc6_calculate_ctrl_buf_size(length);\n" + "+\t/* Prepare control command and copy to SPI control buffer */\n" + "+\toa_tc6_prepare_ctrl_spi_buf(tc6, address, value, length, reg_op, size);\n" " \n" - " \tcancel_work_sync(&dd->done_task);\n" - " \tomap_des_dma_cleanup(dd);\n" + " \t/* Perform SPI transfer */\n" + " \tret = oa_tc6_spi_transfer(tc6, OA_TC6_CTRL_HEADER, size);\n" + "@@ -303,7 +340,7 @@ static int oa_tc6_perform_ctrl(struct oa_tc6 *tc6, u32 address, u32 value[],\n" + " \t\treturn oa_tc6_check_ctrl_write_reply(tc6, size);\n" + " \n" + " \t/* Check echoed/received control read command reply for errors */\n" + "-\tret = oa_tc6_check_ctrl_read_reply(tc6, size);\n" + "+\tret = oa_tc6_check_ctrl_read_reply(tc6, length);\n" + " \tif (ret)\n" + " \t\treturn ret;\n" + " \n" + "@@ -1273,6 +1310,20 @@ netdev_tx_t oa_tc6_start_xmit(struct oa_tc6 *tc6, struct sk_buff *skb)\n" + " }\n" + " EXPORT_SYMBOL_GPL(oa_tc6_start_xmit);\n" + " \n" + "+static int oa_tc6_check_ctrl_protection(struct oa_tc6 *tc6)\n" + "+{\n" + "+\tu32 regval;\n" + "+\tint ret;\n" + "+\n" + "+\tret = oa_tc6_read_register(tc6, OA_TC6_REG_CONFIG0, ®val);\n" + "+\tif (ret)\n" + "+\t\treturn ret;\n" + "+\n" + "+\ttc6->prot_ctrl = FIELD_GET(CONFIG0_PROTE, regval);\n" + "+\n" + "+\treturn 0;\n" + "+}\n" + "+\n" + " /**\n" + " * oa_tc6_init - allocates and initializes oa_tc6 structure.\n" + " * @spi: device with which data will be exchanged.\n" + "@@ -1325,6 +1376,14 @@ struct oa_tc6 *oa_tc6_init(struct spi_device *spi, struct net_device *netdev)\n" + " \tif (!tc6->spi_data_rx_buf)\n" + " \t\treturn NULL;\n" + " \n" + "+\t/* Check the PROTE bit status so that we can reset the device */\n" + "+\tret = oa_tc6_check_ctrl_protection(tc6);\n" + "+\tif (ret) {\n" + "+\t\tdev_err(&tc6->spi->dev,\n" + "+\t\t\t\"Failed to check the protection mode: %d\\n\", ret);\n" + "+\t\treturn NULL;\n" + "+\t}\n" + "+\n" + " \tret = oa_tc6_sw_reset_macphy(tc6);\n" + " \tif (ret) {\n" + " \t\tdev_err(&tc6->spi->dev,\n" "-- \n" 2.53.0 -bd789bda0743747af0006700a6a189c8362ec05adf2150450ba2dfd06e161f1c +4a6b33273a8f239c42b20f7d9bb22868cab7b39a33bf0a13a8cc62883b4ce3c1
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