From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5338C4F405E; Wed, 30 Sep 2026 15:39:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790782777; cv=none; b=UCfVJjbJVhvWci62Un6sMjGf7JfvHQ6GUmHyTajv+M529qboFxjzpkyU/OfO1ZylQeLsetT5ItJBJ7rE38t8H2RWK6nD41mq5P1CFYyW+D3VYowcWHnLR+H8jt6nhnh3HxjASgxVG7yjL4r70ne6Tie4TaZO31KA231jsb0MG+E= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790782777; c=relaxed/simple; bh=DxvQp1P/IwdzbXSGyDp4gtnaqTAW/WWeYWzmRjABOxA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=e32SkfcRHHxxEZYDepplqxoep5vz3tWlz+LKEryVtSEhu7iIHW3SEOZ5ezoXKfcycyUaZF+anfHcedoKW5rrhFhaN6ToZEWiyAZATJzLr/sWziIgomIlN9knM0ZFlMPCRw4CPT7qh2l5Q1LRYCzYOHd/qfSYGymWZpGM6WB9kTg= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=Y18tgAcc; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="Y18tgAcc" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 9BDA71F0089B; Wed, 30 Sep 2026 15:39:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linuxfoundation.org; s=korg; t=1790782769; bh=dmaJdAtwIlxi8wtHKUp0sjrb4uQyG0ELDI9KS8PNo5I=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=Y18tgAccfymjX+cCgXYFwLP9kKR4YHlomialvwOiCppDoBCMcKFUrwIJrMot10CXb NPMUlCQV0yMkcTggptIEgr95ogjcTPrFt39HcxQ5PyUQ9jIq+tcTnoIBXfFRs5p3F9 h+CUR/nDgKwj5pbtbcjyQH9ACiXn1orwqOiiu+J4= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Jose Ignacio Tornos Martinez , Bjorn Helgaas , Sasha Levin Subject: [PATCH 5.10 118/595] PCI: Avoid SBR for Qualcomm WCN6855/WCN7850 WiFi, SDX62/SDX65 modems Date: Wed, 30 Sep 2026 17:20:11 +0200 Message-ID: <20260930152350.275205859@linuxfoundation.org> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20260930152347.700140858@linuxfoundation.org> References: <20260930152347.700140858@linuxfoundation.org> User-Agent: quilt/0.69 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: patches@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 5.10-stable review patch. If anyone has any objections, please let me know. ------------------ From: Jose Ignacio Tornos Martinez [ Upstream commit 6a4f64c3a3ada43e71ef1e06da89beb36bdaeefa ] Some Qualcomm PCIe devices (WCN6855/WCN7850 WiFi cards, SDX62/SDX65 modems) do not properly support Secondary Bus Reset (SBR). Testing confirms this is device-specific, not deployment-specific: MediaTek MT7925e successfully uses bus reset through the same passive M.2-to-PCIe adapters where Qualcomm devices fail, proving PERST# is properly wired through the adapters. Prevent use of Secondary Bus Reset for these devices. Signed-off-by: Jose Ignacio Tornos Martinez Signed-off-by: Bjorn Helgaas Link: https://lore.kernel.org/all/20260609163649.319755-4-jtornosm@redhat.com Signed-off-by: Sasha Levin --- drivers/pci/quirks.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index e95439af31c83..b3ea52038aec9 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -3614,6 +3614,9 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x003c, quirk_no_bus_reset); DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x0033, quirk_no_bus_reset); DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x0034, quirk_no_bus_reset); DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x003e, quirk_no_bus_reset); +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_QCOM, 0x1103, quirk_no_bus_reset); /* WCN6855 */ +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_QCOM, 0x1107, quirk_no_bus_reset); /* WCN7850 */ +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_QCOM, 0x0308, quirk_no_bus_reset); /* SDX62/SDX65 */ /* * Root port on some Cavium CN8xxx chips do not successfully complete a bus -- 2.53.0