From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 42C7951B191; Wed, 30 Sep 2026 17:59:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790791143; cv=none; b=RJXZeXIpfoA7YXlG98pMfkl4jp/9D1bz0Md3ui0xIRxTBlQt6ztateI+KJNqtqajahCzEkHXlX++1bVuZoUI8lIwiY+fuGEJrQvEhz/+wV3AdfsnainhxvPoaqjoxq0KLWopLIQRXwKySTKYc78u+INU/meLEVQCDV0CbwhWiN4= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790791143; c=relaxed/simple; bh=68ba1yYRSCvNpGvjUA8Ck4UIkWhRjBKEETgWD6OoE2E=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=YrIE2DVSgcbQQsrYjcgwyH0UjdOdrViQP92+beakngW5cNahXE41232HWn8jToz2s+2W725Twlpd1tje6leEU3JP390RxZzJOMOjRwJAvlcCnqbebsLr8Yq+8S/xNSKSOmtGstNFaK3WYgkve4sG3DF0xkCgCg1tKmTo17i9lhg= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=tz4pp9nX; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="tz4pp9nX" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 9C55C1F000FF; Wed, 30 Sep 2026 17:59:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linuxfoundation.org; s=korg; t=1790791142; bh=M9To2C0XQAqgHJP08I/wSrw2vESijn3BG5YZxInR4r4=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=tz4pp9nX8HfKioFqQAOzH3NZ2g42NBTyRa4I0hRLb33oTb/KYA2/QkJMnC/JAMbIz ABuEmHgBW7yg1hrCsTMScSQIsGm6GlUOqVAjNbUFgoXoFdnxRsEOqgPvoUWPlHa4tR 0eMM7JSDR+KYiGYjSsAn2SDB4fyf85tXkin7aDo4= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Liang Hao , Bartosz Golaszewski , Sasha Levin Subject: [PATCH 5.15 199/752] gpio: dwapb: Mask interrupts at hardware initialization Date: Wed, 30 Sep 2026 17:21:09 +0200 Message-ID: <20260930152402.527780899@linuxfoundation.org> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20260930152358.131179731@linuxfoundation.org> References: <20260930152358.131179731@linuxfoundation.org> User-Agent: quilt/0.69 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: patches@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 5.15-stable review patch. If anyone has any objections, please let me know. ------------------ From: Liang Hao [ Upstream commit aaf7766ba3b99a3834319e7cf939838afc705574 ] GPIO interrupts may retain stale state across warm reboots when peripherals remain powered. If a GPIO line is not explicitly configured for interrupts, this can result in interrupt storms due to missing handlers. Fix this by ensuring all interrupts are masked and disabled at hardware initialization time via the init_hw() callback. Pending interrupts are also cleared to start from a known-safe state. Interrupts will be unmasked only when explicitly configured by userspace or kernel drivers. Signed-off-by: Liang Hao Link: https://patch.msgid.link/20260705074759.47863-1-haohlliang@gmail.com Signed-off-by: Bartosz Golaszewski Signed-off-by: Sasha Levin --- drivers/gpio/gpio-dwapb.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/drivers/gpio/gpio-dwapb.c b/drivers/gpio/gpio-dwapb.c index 8773cbf6138f5..893ca163e43e4 100644 --- a/drivers/gpio/gpio-dwapb.c +++ b/drivers/gpio/gpio-dwapb.c @@ -200,6 +200,22 @@ static void dwapb_toggle_trigger(struct dwapb_gpio *gpio, unsigned int offs) dwapb_write(gpio, GPIO_INT_POLARITY, pol); } +static int dwapb_irq_init_hw(struct gpio_chip *gc) +{ + struct dwapb_gpio *gpio = to_dwapb_gpio(gc); + + /* + * GPIO interrupts may retain stale state across warm reboots when + * peripherals stay powered. Force a known-safe state before the GPIO + * irqchip and irq domain are set up. + */ + dwapb_write(gpio, GPIO_INTEN, 0); + dwapb_write(gpio, GPIO_INTMASK, 0xffffffff); + dwapb_write(gpio, GPIO_PORTA_EOI, 0xffffffff); + + return 0; +} + static u32 dwapb_do_irq(struct dwapb_gpio *gpio) { struct gpio_chip *gc = &gpio->ports[0].gc; @@ -440,6 +456,7 @@ static void dwapb_configure_irqs(struct dwapb_gpio *gpio, girq = &gc->irq; girq->handler = handle_bad_irq; girq->default_type = IRQ_TYPE_NONE; + girq->init_hw = dwapb_irq_init_hw; port->pirq = pirq; pirq->irqchip.name = DWAPB_DRIVER_NAME; -- 2.53.0