From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 90BC23B3894; Wed, 30 Sep 2026 19:12:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790795521; cv=none; b=ABWOKqN4B5fOn0VtZ3ntHAaOLINtSP2cJYBP5z+jQlAsDrn6/xoFkBXySB7b7BcSkA3QBEBXNTJ8Rebpl/wJa5q3WjNS5oy0Lns6ArBnugPJjLhMu84CoRnsdZA37L/f5lEWaT2Y7HHuWUULLQH4FwA1I490RSyAY8ZFnLaSKHA= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790795521; c=relaxed/simple; bh=0j/jQDtbhwbRa65wewViLMLhoehq8FJzEQUW4mllAAY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=lKLT6kG7Cu0yXdaRl++B4vCilyEx1an55xcFHc7Vy4QjaXQiW3aIqV4RnCxRfDwUuaSALoWUACqgdvxfHkAyA0D7zmFTtftuEZR9CpdY5xheSuy/f5GlK06A01q5A3PiQCbN0BQb1H2agKvN0WIbCqQeG+wURYt61hsomIvOXak= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=GXFaclMb; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="GXFaclMb" Received: by smtp.kernel.org (Postfix) with ESMTPSA id EAB8E1F000FF; Wed, 30 Sep 2026 19:11:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linuxfoundation.org; s=korg; t=1790795520; bh=nmvOY0GORlsL29607q1jgY36GVJuqzxxcCzMrndBjG0=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=GXFaclMbtZS9cgIoxhjIfvSOTMNn8q6GZ1FSivJVu1lqUUdc3xq0b4ZYaoJb9XZkQ unEcIIAu4JzmS9dDnxZ3L98PsPkUnWLagm2PYRqu3O5DOOP8XGLWHw2dC8MzMrYbsP nlJJXDppg0UtmDErIipsnsIR5DpmHQ10AD9u5hOQ= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Subbaraya Sundeep , Ratheesh Kannoth , Simon Horman , Jakub Kicinski , Sasha Levin Subject: [PATCH 6.6 0590/1193] octeontx2-af: fix PF/CGX debugfs PCI bus lookup Date: Wed, 30 Sep 2026 17:21:14 +0200 Message-ID: <20260930152447.353688349@linuxfoundation.org> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20260930152434.301151190@linuxfoundation.org> References: <20260930152434.301151190@linuxfoundation.org> User-Agent: quilt/0.69 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: patches@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 6.6-stable review patch. If anyone has any objections, please let me know. ------------------ From: Ratheesh Kannoth [ Upstream commit 4f4b743c2d2bbc336cb164d9d3d2ed6956ad8437 ] rvu_dbg_rvu_pf_cgx_map_display() locates each RVU PF PCI device via pci_get_domain_bus_and_slot() when printing the PF-to-CGX map. It assumed PF0 always sits on PCI bus 1 and derived other PF bus numbers as pf + 1, but the AF device can be enumerated on a different bus. Use rvu->pdev->bus->number as the base bus instead, so each PF lookup uses pf + start on systems where RVU functions are on contiguous buses but do not start at bus 1. Fixes: e2fb373038654 ("octeontx2-af: Display CGX, NIX and PF map in debugfs.") Signed-off-by: Subbaraya Sundeep Signed-off-by: Ratheesh Kannoth Reviewed-by: Simon Horman Link: https://patch.msgid.link/20260904085114.3385530-1-rkannoth@marvell.com Signed-off-by: Jakub Kicinski Signed-off-by: Sasha Levin --- .../net/ethernet/marvell/octeontx2/af/rvu_debugfs.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c index 285ae29396342..5502f7452236f 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c @@ -852,19 +852,25 @@ static int rvu_dbg_rvu_pf_cgx_map_display(struct seq_file *filp, void *unused) int pf, domain, blkid; u8 cgx_id, lmac_id; u16 pcifunc; + u8 start; - domain = 2; + domain = pci_domain_nr(rvu->pdev->bus); mac_ops = get_mac_ops(rvu_first_cgx_pdata(rvu)); /* There can be no CGX devices at all */ if (!mac_ops) return 0; seq_printf(filp, "PCI dev\t\tRVU PF Func\tNIX block\t%s\tLMAC\n", mac_ops->name); + + /* All the PF devices are on contiguous PCI bus numbers, but the PF0(AF) + * may not start from 1 always. Hence get domain and bus from PCI device. + */ + start = rvu->pdev->bus->number; for (pf = 0; pf < rvu->hw->total_pfs; pf++) { if (!is_pf_cgxmapped(rvu, pf)) continue; - pdev = pci_get_domain_bus_and_slot(domain, pf + 1, 0); + pdev = pci_get_domain_bus_and_slot(domain, pf + start, 0); if (!pdev) continue; -- 2.53.0