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[199.106.103.254]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-36740cc848fsm8915123eec.13.2026.10.21.10.47.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 21 Oct 2026 10:47:31 -0700 (PDT) Date: Wed, 21 Oct 2026 10:47:26 -0700 From: Jonathan Cameron To: Jason Gunthorpe Cc: Alexandre Ghiti , Albert Ou , Ard Biesheuvel , Arnd Bergmann , Catalin Marinas , Jonathan Corbet , David Sterba , Ilias Apalodimas , linux-arch@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, linux-efi@vger.kernel.org, linux-riscv@lists.infradead.org, Mark Rutland , Palmer Dabbelt , Paul Walmsley , Randy Dunlap , Simon Glass , Shuah Khan , Nick Terrell , Will Deacon , Alexandre Ghiti , Conor Dooley , linux-integrity@vger.kernel.org, Palmer Dabbelt , patches@lists.linux.dev, Piotr =?ISO-8859-1?Q?Kr=F3l?= , Ross Philipson , Sami Tolvanen , Song Shuai Subject: Re: [PATCH v2 14/15] arm64: drtm: Call UNPROTECT_MEMORY Message-ID: <20261021104726.00002640@oss.qualcomm.com> In-Reply-To: <14-v2-989a18390eb1+486-arm64_drtm_jgg@nvidia.com> References: <0-v2-989a18390eb1+486-arm64_drtm_jgg@nvidia.com> <14-v2-989a18390eb1+486-arm64_drtm_jgg@nvidia.com> Organization: Qualcomm X-Mailer: Claws Mail 4.4.0 (GTK 3.24.51; x86_64-w64-mingw32) X-Mailing-List: patches@lists.linux.dev List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: kQXp1IStjL0eyP2cZix76rhdT0B8bc2k X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDIxMDA3MCBTYWx0ZWRfXywNyH7CIlPph hNqUISznWUPyEVYGCFmCCRUIc4nWLJW8hqEpQOQ1SCu3rxQLW0dhSkIyKuXqEDyCcHGUHFPjYpv 245YPEo+GqLLog6E7F4SSA/r6pji/nEEsKPrgnKWOUl1mEB0IHbQuE5tz0m9JYtvOK3/IlM3VlW e1HpFUOgcy1NPY0J2wPW/s/sLrhjWvv5xIwUgJGvLDAXo5809yl2SioY9Fj32YFcRkR3+Mi1hF2 pq4F6zpW8wr2MiVPMeR11/bCygCZW+tj3WnWrh6gIuefmvBeP7jWGGkUSssVuIBcj+1CuGFsY4j Fgw0gHJHOFjeIq1QUTkGrfK1Z5/TJlEOFa0A5peSq8PGrx3t+T4HTJ+3qUvnWZCMfIPI0vrczwd f9RYGDt6cY/q/4P3oaT1zfPHRn0+J/wgbjvPMBNhYa7MHAyrII63CB9HvrtJWEtWavyBMFijvnZ gxEJtcHt42qkm5BUUAg== X-Proofpoint-Spam-Info: AW1haW4tMjYxMDIxMDA3MCBTYWx0ZWRfX8ChxhjmadRMh se7Dt/MLh46kF6w49xVRVn+m6zyDtp9a/q/mM6UlOSyElkZVby8hnP4MD7s0BOdlLWiqNylEdWq rnsyDR/68jy6N0fHNjQVTyongv4ukzw= X-Proofpoint-ORIG-GUID: kQXp1IStjL0eyP2cZix76rhdT0B8bc2k X-Authority-Analysis: v=2.4 cv=IPaXmQvG c=1 sm=1 tr=0 ts=6ad8fab5 cx=c_pps a=JYo30EpNSr/tUYqK9jHPoA==:117 a=JYp8KDb2vCoCEuGobkYCKw==:17 a=kj9zAlcOel0A:10 a=660iZSQnnn4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=DJpcGTmdVt4CTyJn9g5Z:22 a=Ikd4Dj_1AAAA:8 a=4lc54p1sSd76nvOad-kA:9 a=CjuIK1q_8ugA:10 a=Fk4IpSoW4aLDllm1B1p-:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.138,FMLib:17.12.100.49 definitions=2026-10-21_04,2026-10-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 malwarescore=0 phishscore=0 lowpriorityscore=0 suspectscore=0 impostorscore=0 spamscore=0 priorityscore=1501 adultscore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2610190000 definitions=main-2610210070 On Fri, 2 Oct 2026 20:31:51 -0300 Jason Gunthorpe wrote: > The stub always requests ARM_DRTM_LAUNCH_DMA_COMPLETE. On a system > with an SMMU the COMPLETE option is sanely implemented using the SMMU > global abort register. DMA_COMPLETE should be mostly a no-op. It > seems to be designed for the region protection mode that Linux does > not use. > > However, the FW can still do something interesting under it and we > should call it. Choose late_initcall as we know the SMMU drivers are > loaded by then. If some platform does actually block DMA beyond the > SMMU, then this would result in a noisy failure of built-in driver > DMA, not a silent security gap. > > The platforms I'm aware of are OK with this placement, and it is a > reasonable place to start. > > Signed-off-by: Jason Gunthorpe > --- > arch/arm64/kernel/drtm.c | 39 +++++++++++++++++++++++++++++++++++++++ > 1 file changed, 39 insertions(+) > > diff --git a/arch/arm64/kernel/drtm.c b/arch/arm64/kernel/drtm.c > index 14493948a27f0d..6062980a5d9e53 100644 > --- a/arch/arm64/kernel/drtm.c > +++ b/arch/arm64/kernel/drtm.c > @@ -3,8 +3,47 @@ > * > * Support functions for ARM DEN 0113 "DRTM Architecture for Arm" > */ > +#include > #include > +#include > +#include > > #include > > struct arm64_drtm_handoff arm64_drtm_handoff __efi_data_handoff; > + > +static int __init arm64_drtm_unprotect_memory(void) > +{ > + s64 status; > + > + if (!arm64_drtm_handoff.drtm_enabled) > + return 0; > + > + /* > + * Currently Linux can only fully support a DRTM implementation that > + * relies only the SMMU. That sentence doesn't parse. relies on maybe? > This should be called directly after attaching > + * a driver to every SMMU but before binding any drivers that want to > + * use devices attached to the SMMU. Our boot flow does not have a way > + * to do that, so for now call it here. > + * > + * For SMMU based implementations their UNPROTECT_MEMORY is probably a > + * NOP since touching the SMMU here is forbidden, but they may still do > + * something interesting so be sure to call it at least. > + * > + * The stub excludes the most likely case of non-SMMU by only using > + * ARM_DRTM_DMA_PROTECTION_COMPLETE, which is defined as: > + * Complete DMA protection is hardware-based enforcement at the SMMU > + * that blocks all DMA from Non- secure devices." > + * > + * For now if people have such systems they cannot include built-in > + * drivers for any DMA devices, those have to be modules to be ordered > + * after this. > + */ > + status = arm_drtm_unprotect_memory(); > + WARN(status != ARM_DRTM_SUCCESS, > + "DRTM: failed to unprotect memory (x0=%lld)", status); > + if (status == ARM_DRTM_SUCCESS) > + pr_info("DRTM: launch completed\n"); > + return 0; > +} > +late_initcall_sync(arm64_drtm_unprotect_memory);