From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.remote-ip=100.103.45.18 ARC-Seal: i=1; d=subspace.kernel.org; s=arc20261015; a=rsa-sha256; cv=none; t=1792774596; b=mvi7GZZpEKuPJKJ+HjVslU3LVX4SDHAXGsRRy49lRrBVdZdhHe+wx4+xHnLbHbIuOVgN zPdFXfVNL8iZBb/wui+uXtkA+bKBXHS23QrUbEluh5c9qh7hv8bhXi76DssFQ/SatxwNp EEVQbk/S2Q9OOQPcchBOj5/R5obPwzKlWl5V4VTgu6ACyeijaFINgQDOqhpit5E4z1yxi urN/F/SsLkG9/TuFEgu7dusFyKzyUcB4lhmDlhQW1bNv/LPPX0AZj+pRT5ZFbPbGmX33P SeasPNn+WxAugMRO+Q9S8jpoqic7oAZ6sp1DfJUw+owruQTdWhzGclP53yG9yyE4u6g== ARC-Message-Signature: i=1; d=subspace.kernel.org; s=arc20261015; a=rsa-sha256; c=relaxed/relaxed; t=1792774596; h=Received:DKIM-Signature:From:To:Cc:Subject:Date:Message-ID:X-Mailer: In-Reply-To:References:User-Agent:X-stable:X-Patchwork-Hint: MIME-Version:Content-Transfer-Encoding; bh=yZrfFADB5Q10Zx1aPp6A6FJCmRxNE+l59+Ptb67yiYE=; b=XtHv7IcsjeLLgcuWjLfEMArvT3r+116bCjfRBqs5Oh36Aw0heNZ53DglmE0U4eTzFRIm 53ORPeZ1rwmfJJHMJUav4WhScoWSzUzQVBhCdZOOFP63qvzUDIBUDYpCQ7pQmJ/rlxtV8 TLVpyDewzhVW74c0JPFA/v1oNShg4SXQ8MiNfvOdA+boC3s+AOW91/DM8mHxnguVlBCFM 59xOn8hsQF0az55fCCu9ZZzUhu2JGCMICSOUlz/xG5TQadygkqhWsk0mG8FNTIVotcW1q NzMuhAqWfvI6Cu0h2/9/uLgzQl6uQosi02RNH3FztUmVul5ghhzCDTbqE+Ss/n9v4IQ== ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass header.d=linuxfoundation.org header.i=@linuxfoundation.org header.a=rsa-sha256 header.s=korg header.b=CD18psFr; arc=none smtp.remote-ip=100.103.45.18 Received: from smtp.kernel.org (quasi.space.kernel.org [100.103.45.18]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (prime256v1)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 42B98606A31D; Fri, 23 Oct 2026 16:56:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key, unprotected) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.a=rsa-sha256 header.s=korg header.b=CD18psFr Received: by smtp.kernel.org (Postfix) with ESMTPSA id 958601F01825; Fri, 23 Oct 2026 16:56:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linuxfoundation.org; s=korg; t=1792774596; bh=yZrfFADB5Q10Zx1aPp6A6FJCmRxNE+l59+Ptb67yiYE=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=CD18psFrhtaiMctxfvG4DVSoCGdtn4GJc+MZwz9++bxrE2RxpPmM/dPe20dXN8zDw 5PgTLQgkdqZzLmUAEJVSh0q80+eHcOG7IwS/UZBYcJ2np8110UzePqg+SunUtOQpyv zwEQScNNNmNZdL9lPyRtjqHySDx9PcFM07GLJ4Sw= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Frank Li , Peng Fan , Linus Walleij , Andy Shevchenko , Bartosz Golaszewski , Sasha Levin Subject: [PATCH 7.2 087/242] gpio: mxc: fix both_edges bit operations Date: Fri, 23 Oct 2026 18:38:49 +0200 Message-ID: <20261023163715.836258006@linuxfoundation.org> X-Mailer: git-send-email 2.56.0 In-Reply-To: <20261023163713.816071858@linuxfoundation.org> References: <20261023163713.816071858@linuxfoundation.org> User-Agent: quilt/0.69 X-stable: review X-Patchwork-Hint: ignore X-Mailing-List: patches@lists.linux.dev List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 7.2-stable review patch. If anyone has any objections, please let me know. ------------------ From: Peng Fan [ Upstream commit b7719c575dec69146f6d537fd616b27083c0cf45 ] gpio_set_irq_type() can be called concurrently for different pins on the same port. The IRQ core serializes per irq descriptor, but different pins have different descriptors, so on SMP systems two concurrent gpio_set_irq_type() calls for pins on the same port run without mutual exclusion. The read-modify-write of port->both_edges is performed outside the port-wide scoped_guard(gpio_generic_lock_irqsave) section, so concurrent updates for different pins can overwrite each other, causing missed interrupts or stuck IRQ lines on dual-edge triggered pins. The original uniprocessor MXC SoCs were not affected; the race became reachable on multi-core i.MX7 and i.MX8 SoCs that reuse this driver. Convert both_edges from u32 to unsigned long and use set_bit(), clear_bit(), and test_bit() to make the modifications atomic. Fixes: 910862ec092c ("mxc: emulate GPIO interrupt on both-edges") Reviewed-by: Frank Li Signed-off-by: Peng Fan Reviewed-by: Linus Walleij Reviewed-by: Andy Shevchenko Link: https://patch.msgid.link/20261013-gpio-mxc-cleanup-v7-2-c4d769587d3e@nxp.com Signed-off-by: Bartosz Golaszewski Signed-off-by: Sasha Levin --- drivers/gpio/gpio-mxc.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/drivers/gpio/gpio-mxc.c b/drivers/gpio/gpio-mxc.c index e05f276a50e8d..7e17d7668980d 100644 --- a/drivers/gpio/gpio-mxc.c +++ b/drivers/gpio/gpio-mxc.c @@ -7,6 +7,7 @@ // Authors: Daniel Mack, Juergen Beisert. // Copyright (C) 2004-2010 Freescale Semiconductor, Inc. All Rights Reserved. +#include #include #include #include @@ -68,7 +69,7 @@ struct mxc_gpio_port { struct irq_domain *domain; struct gpio_generic_chip gen_gc; struct device *dev; - u32 both_edges; + unsigned long both_edges; struct mxc_gpio_reg_saved gpio_saved_reg; bool power_off; u32 wakeup_pads; @@ -168,7 +169,7 @@ static int gpio_set_irq_type(struct irq_data *d, u32 type) int edge; void __iomem *reg = port->base; - port->both_edges &= ~(1 << gpio_idx); + clear_bit(gpio_idx, &port->both_edges); switch (type) { case IRQ_TYPE_EDGE_RISING: edge = GPIO_INT_RISE_EDGE; @@ -188,7 +189,7 @@ static int gpio_set_irq_type(struct irq_data *d, u32 type) edge = GPIO_INT_HIGH_LEV; pr_debug("mxc: set GPIO %d to high trigger\n", gpio_idx); } - port->both_edges |= 1 << gpio_idx; + set_bit(gpio_idx, &port->both_edges); } break; case IRQ_TYPE_LEVEL_LOW: @@ -259,7 +260,7 @@ static void mxc_gpio_irq_handler(struct mxc_gpio_port *port, u32 irq_stat) while (irq_stat != 0) { int irqoffset = fls(irq_stat) - 1; - if (port->both_edges & (1 << irqoffset)) + if (test_bit(irqoffset, &port->both_edges)) mxc_flip_edge(port, irqoffset); generic_handle_domain_irq(port->domain, irqoffset); -- 2.53.0