From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.31]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 414AF30CE9 for ; Fri, 15 Sep 2023 14:51:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1694789474; x=1726325474; h=date:from:to:cc:subject:in-reply-to:message-id: references:mime-version; bh=ZhU/YBjNOOPe5s3iZG0OgiJEfBTYLPIc8dia6attIks=; b=Oj8SeQ1p3D5QjbJv8HZ9bS0r7JYrbfemlfQxR9njDaqUMVI/aK4J+rvv 4ag/mTD9wvpD1Go8owcaiXuB4vFtH2p1DdPJCVW4ZuUQDwBDoeJ9BE7RA D0ZHU9Iyk0KLwNR7siHXM0dptncWKm171lNhkXUlNGPXDCcKn71p4RYAm IcXn5I/N64ud+Om1YvtQAp3Ohl9Sbd6vBkEgIxDG1CsxHL0aYcJjwJHHk WuQFO5L5BsQ1xEA7Duknd5ba9wBml/oNtQWYimYYP5j7aQp7dloUQ2UmO bI6j+SwTkk+V5ofe1QDHOcigleSaU1/qxVmbYFusve09SOlORr8XBrspV Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10834"; a="443326474" X-IronPort-AV: E=Sophos;i="6.02,149,1688454000"; d="scan'208";a="443326474" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Sep 2023 07:49:58 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10834"; a="860181871" X-IronPort-AV: E=Sophos;i="6.02,149,1688454000"; d="scan'208";a="860181871" Received: from srdoo-mobl1.ger.corp.intel.com ([10.252.38.99]) by fmsmga002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Sep 2023 07:49:55 -0700 Date: Fri, 15 Sep 2023 17:49:53 +0300 (EEST) From: =?ISO-8859-15?Q?Ilpo_J=E4rvinen?= To: Stephen Boyd cc: Mika Westerberg , Hans de Goede , Mark Gross , LKML , patches@lists.linux.dev, platform-driver-x86@vger.kernel.org, Andy Shevchenko , Kuppuswamy Sathyanarayanan , Prashant Malani Subject: Re: [PATCH v4 4/4] platform/x86: intel_scu_ipc: Fail IPC send if still busy In-Reply-To: <20230913212723.3055315-5-swboyd@chromium.org> Message-ID: <3e17994a-9481-acc5-dfac-3878929b7038@linux.intel.com> References: <20230913212723.3055315-1-swboyd@chromium.org> <20230913212723.3055315-5-swboyd@chromium.org> Precedence: bulk X-Mailing-List: patches@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="8323329-496999276-1694789398=:2347" This message is in MIME format. The first part should be readable text, while the remaining parts are likely unreadable without MIME-aware tools. --8323329-496999276-1694789398=:2347 Content-Type: text/plain; charset=ISO-8859-15 Content-Transfer-Encoding: 8BIT On Wed, 13 Sep 2023, Stephen Boyd wrote: > It's possible for interrupts to get significantly delayed to the point > that callers of intel_scu_ipc_dev_command() and friends can call the > function once, hit a timeout, and call it again while the interrupt > still hasn't been processed. This driver will get seriously confused if > the interrupt is finally processed after the second IPC has been sent > with ipc_command(). It won't know which IPC has been completed. This > could be quite disastrous if calling code assumes something has happened > upon return from intel_scu_ipc_dev_simple_command() when it actually > hasn't. > > Let's avoid this scenario by simply returning -EBUSY in this case. > Hopefully higher layers will know to back off or fail gracefully when > this happens. It's all highly unlikely anyway, but it's better to be > correct here as we have no way to know which IPC the status register is > telling us about if we send a second IPC while the previous IPC is still > processing. > > Cc: Prashant Malani > Cc: Kuppuswamy Sathyanarayanan > Reviewed-by: Andy Shevchenko > Reviewed-by: Mika Westerberg > Fixes: ed12f295bfd5 ("ipc: Added support for IPC interrupt mode") > Signed-off-by: Stephen Boyd Reviewed-by: Ilpo Järvinen -- i. > --- > drivers/platform/x86/intel_scu_ipc.c | 40 +++++++++++++++++++--------- > 1 file changed, 28 insertions(+), 12 deletions(-) > > diff --git a/drivers/platform/x86/intel_scu_ipc.c b/drivers/platform/x86/intel_scu_ipc.c > index 3271f81a9c00..a68df4133403 100644 > --- a/drivers/platform/x86/intel_scu_ipc.c > +++ b/drivers/platform/x86/intel_scu_ipc.c > @@ -265,6 +265,24 @@ static int intel_scu_ipc_check_status(struct intel_scu_ipc_dev *scu) > return scu->irq > 0 ? ipc_wait_for_interrupt(scu) : busy_loop(scu); > } > > +static struct intel_scu_ipc_dev *intel_scu_ipc_get(struct intel_scu_ipc_dev *scu) > +{ > + u8 status; > + > + if (!scu) > + scu = ipcdev; > + if (!scu) > + return ERR_PTR(-ENODEV); > + > + status = ipc_read_status(scu); > + if (status & IPC_STATUS_BUSY) { > + dev_dbg(&scu->dev, "device is busy\n"); > + return ERR_PTR(-EBUSY); > + } > + > + return scu; > +} > + > /* Read/Write power control(PMIC in Langwell, MSIC in PenWell) registers */ > static int pwr_reg_rdwr(struct intel_scu_ipc_dev *scu, u16 *addr, u8 *data, > u32 count, u32 op, u32 id) > @@ -278,11 +296,10 @@ static int pwr_reg_rdwr(struct intel_scu_ipc_dev *scu, u16 *addr, u8 *data, > memset(cbuf, 0, sizeof(cbuf)); > > mutex_lock(&ipclock); > - if (!scu) > - scu = ipcdev; > - if (!scu) { > + scu = intel_scu_ipc_get(scu); > + if (IS_ERR(scu)) { > mutex_unlock(&ipclock); > - return -ENODEV; > + return PTR_ERR(scu); > } > > for (nc = 0; nc < count; nc++, offset += 2) { > @@ -437,12 +454,12 @@ int intel_scu_ipc_dev_simple_command(struct intel_scu_ipc_dev *scu, int cmd, > int err; > > mutex_lock(&ipclock); > - if (!scu) > - scu = ipcdev; > - if (!scu) { > + scu = intel_scu_ipc_get(scu); > + if (IS_ERR(scu)) { > mutex_unlock(&ipclock); > - return -ENODEV; > + return PTR_ERR(scu); > } > + > cmdval = sub << 12 | cmd; > ipc_command(scu, cmdval); > err = intel_scu_ipc_check_status(scu); > @@ -482,11 +499,10 @@ int intel_scu_ipc_dev_command_with_size(struct intel_scu_ipc_dev *scu, int cmd, > return -EINVAL; > > mutex_lock(&ipclock); > - if (!scu) > - scu = ipcdev; > - if (!scu) { > + scu = intel_scu_ipc_get(scu); > + if (IS_ERR(scu)) { > mutex_unlock(&ipclock); > - return -ENODEV; > + return PTR_ERR(scu); > } > > memcpy(inbuf, in, inlen); > --8323329-496999276-1694789398=:2347--