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[34.140.83.185]) by smtp.gmail.com with ESMTPSA id un6-20020a170907cb8600b00a3cfb02c12bsm829998ejc.79.2024.02.13.07.43.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 13 Feb 2024 07:43:44 -0800 (PST) Date: Tue, 13 Feb 2024 15:43:40 +0000 From: Mostafa Saleh To: Jason Gunthorpe Cc: iommu@lists.linux.dev, Joerg Roedel , linux-arm-kernel@lists.infradead.org, Robin Murphy , Will Deacon , Lu Baolu , Jean-Philippe Brucker , Joerg Roedel , Moritz Fischer , Moritz Fischer , Michael Shavit , Nicolin Chen , patches@lists.linux.dev, Shameer Kolothum , Zhangfei Gao Subject: Re: [PATCH v5 10/17] iommu/arm-smmu-v3: Pass smmu_domain to arm_enable/disable_ats() Message-ID: References: <0-v5-cd1be8dd9c71+3fa-smmuv3_newapi_p1_jgg@nvidia.com> <10-v5-cd1be8dd9c71+3fa-smmuv3_newapi_p1_jgg@nvidia.com> Precedence: bulk X-Mailing-List: patches@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <10-v5-cd1be8dd9c71+3fa-smmuv3_newapi_p1_jgg@nvidia.com> On Tue, Feb 06, 2024 at 11:12:47AM -0400, Jason Gunthorpe wrote: > The caller already has the domain, just pass it in. A following patch will > remove master->domain. > > Tested-by: Shameer Kolothum > Tested-by: Nicolin Chen > Tested-by: Moritz Fischer > Reviewed-by: Nicolin Chen > Signed-off-by: Jason Gunthorpe > --- > drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 13 ++++++------- > 1 file changed, 6 insertions(+), 7 deletions(-) > > diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > index 2a6ac0af932c54..133f13f33df124 100644 > --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > @@ -2474,12 +2474,12 @@ static bool arm_smmu_ats_supported(struct arm_smmu_master *master) > return dev_is_pci(dev) && pci_ats_supported(to_pci_dev(dev)); > } > > -static void arm_smmu_enable_ats(struct arm_smmu_master *master) > +static void arm_smmu_enable_ats(struct arm_smmu_master *master, > + struct arm_smmu_domain *smmu_domain) > { > size_t stu; > struct pci_dev *pdev; > struct arm_smmu_device *smmu = master->smmu; > - struct arm_smmu_domain *smmu_domain = master->domain; > > /* Don't enable ATS at the endpoint if it's not enabled in the STE */ > if (!master->ats_enabled) > @@ -2495,10 +2495,9 @@ static void arm_smmu_enable_ats(struct arm_smmu_master *master) > dev_err(master->dev, "Failed to enable ATS (STU %zu)\n", stu); > } > > -static void arm_smmu_disable_ats(struct arm_smmu_master *master) > +static void arm_smmu_disable_ats(struct arm_smmu_master *master, > + struct arm_smmu_domain *smmu_domain) > { > - struct arm_smmu_domain *smmu_domain = master->domain; > - > if (!master->ats_enabled) > return; > > @@ -2567,7 +2566,7 @@ static void arm_smmu_detach_dev(struct arm_smmu_master *master) > if (!smmu_domain) > return; > > - arm_smmu_disable_ats(master); > + arm_smmu_disable_ats(master, smmu_domain); > > spin_lock_irqsave(&smmu_domain->devices_lock, flags); > list_del(&master->domain_head); > @@ -2689,7 +2688,7 @@ static int arm_smmu_attach_dev(struct iommu_domain *domain, struct device *dev) > break; > } > > - arm_smmu_enable_ats(master); > + arm_smmu_enable_ats(master, smmu_domain); > goto out_unlock; > > out_list_del: > -- > 2.43.0 > Reviewed-by: Mostafa Saleh Thanks, Mostafa