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Fri, 10 May 2024 19:32:19 -0700 Date: Fri, 10 May 2024 19:32:16 -0700 From: Nicolin Chen To: Jason Gunthorpe CC: , Joerg Roedel , , Robin Murphy , Will Deacon , Eric Auger , Jean-Philippe Brucker , Moritz Fischer , Michael Shavit , , Shameerali Kolothum Thodi Subject: Re: [PATCH v7 02/14] iommu/arm-smmu-v3: Start building a generic PASID layer Message-ID: References: <0-v7-9597c885796c+d2-smmuv3_newapi_p2b_jgg@nvidia.com> <2-v7-9597c885796c+d2-smmuv3_newapi_p2b_jgg@nvidia.com> Precedence: bulk X-Mailing-List: patches@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <2-v7-9597c885796c+d2-smmuv3_newapi_p2b_jgg@nvidia.com> X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MN1PEPF0000F0E5:EE_|DM6PR12MB4105:EE_ X-MS-Office365-Filtering-Correlation-Id: 8672b4bb-465d-4ac9-4682-08dc71629dbc X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230031|36860700004|376005|82310400017|1800799015|7416005; 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 May 2024 02:32:34.4675 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 8672b4bb-465d-4ac9-4682-08dc71629dbc X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: MN1PEPF0000F0E5.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB4105 On Wed, May 08, 2024 at 03:57:10PM -0300, Jason Gunthorpe wrote: > @@ -611,10 +599,9 @@ void arm_smmu_sva_remove_dev_pasid(struct iommu_domain *domain, > struct arm_smmu_bond *bond = NULL, *t; > struct arm_smmu_master *master = dev_iommu_priv_get(dev); > > + arm_smmu_remove_pasid(master, to_smmu_domain(domain), id); > + > mutex_lock(&sva_lock); > - > - arm_smmu_clear_cd(master, id); > - Should the new arm_smmu_remove_pasid() be inside the sva_lock as the arm_smmu_clear_cd() previously? This would also seem to match with the arm_smmu_set_pasid() that's inside the sva_lock too. With that, arm_smmu_remove_pasid() seems to be removed entirely by a following change, though its function declare still exists in arm-smmu-v3.h (I probably should find what following patch and comment there..) > --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > @@ -2412,6 +2412,10 @@ static void arm_smmu_install_ste_for_dev(struct arm_smmu_master *master, > int i, j; > struct arm_smmu_device *smmu = master->smmu; > > + master->cd_table.in_ste = > + FIELD_GET(STRTAB_STE_0_CFG, le64_to_cpu(target->data[0])) == > + STRTAB_STE_0_CFG_S1_TRANS; > + > +int arm_smmu_set_pasid(struct arm_smmu_master *master, > + struct arm_smmu_domain *smmu_domain, ioasid_t pasid, > + const struct arm_smmu_cd *cd) > +{ > + struct arm_smmu_cd *cdptr; > + > + /* The core code validates pasid */ > + > + if (!master->cd_table.in_ste) > + return -ENODEV; > + > + cdptr = arm_smmu_alloc_cd_ptr(master, pasid); > + if (!cdptr) > + return -ENOMEM; Though I might be missing some piece, the in_ste is set in the arm_smmu_install_ste_for_dev() when STE.Config=S1_TRANS, in which case cdptr is already allocated? If so, do we still need to call arm_smmu_alloc_cd_ptr()? Or just arm_smmu_get_cd_ptr() instead? Thanks Nicolin