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[34.126.98.232]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-23c8431a381sm1926105ad.20.2025.07.03.11.48.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Jul 2025 11:48:51 -0700 (PDT) Date: Thu, 3 Jul 2025 18:48:42 +0000 From: Pranjal Shrivastava To: Jason Gunthorpe Cc: Nicolin Chen , kevin.tian@intel.com, corbet@lwn.net, will@kernel.org, bagasdotme@gmail.com, robin.murphy@arm.com, joro@8bytes.org, thierry.reding@gmail.com, vdumpa@nvidia.com, jonathanh@nvidia.com, shuah@kernel.org, jsnitsel@redhat.com, nathan@kernel.org, peterz@infradead.org, yi.l.liu@intel.com, mshavit@google.com, zhangzekun11@huawei.com, iommu@lists.linux.dev, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-tegra@vger.kernel.org, linux-kselftest@vger.kernel.org, patches@lists.linux.dev, mochs@nvidia.com, alok.a.tiwari@oracle.com, vasant.hegde@amd.com, dwmw2@infradead.org, baolu.lu@linux.intel.com Subject: Re: [PATCH v7 27/28] iommu/tegra241-cmdqv: Add user-space use support Message-ID: References: <20250702180541.GD1139770@nvidia.com> <20250703175532.GF1209783@nvidia.com> Precedence: bulk X-Mailing-List: patches@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20250703175532.GF1209783@nvidia.com> On Thu, Jul 03, 2025 at 02:55:32PM -0300, Jason Gunthorpe wrote: > On Thu, Jul 03, 2025 at 02:46:03PM +0000, Pranjal Shrivastava wrote: > > > Right.. I was however hoping we'd also trap commands like CMD_PRI_RESP > > and CMD_RESUME...I'm not sure if they should be accelerated via CMDQV.. > > I guess I'll need to look and understand a little more if they are.. > > Right now these commands are not supported by vSMMUv3 in Linux. > > They probably should be trapped, but completing a PRI (or resuming a > stall which we will treat the same) will go through the PRI/page fault > logic in iommufd not the cache invalidate. > Ahh, thanks for this, that saved a lot of my time! And yes, I see some functions in eventq.c calling the iopf_group_response which settles the CMD_RESUME. So.. I assume these resume commands would be trapped and *actually* executed through this or a similar path for vPRI. Meh, I had been putting off reading up the fault parts of iommufd, I guess I'll go through that too, now :) > > > The goal of the SMMU driver when it detects CMDQV support is to route > > > all supported invalidations to CMDQV queues and then balance those > > > queues across CPUs to reduce lock contention. > > > > I see.. that makes sense.. so it's a relatively small gain (but a nice > > one). Thanks for clarifying! > > On bare metal the gain is small (due to locking and balancing), while > on virtualization the gain is huge (due to no trapping). > Ohh yes, I meant the bare metal gains here.. for virtualization, it's definitely huge (as reported too). > Regardless the SMMU driver uses cmdqv support if the HW says it is > there. > > Jason > Thanks! Praan