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[34.124.234.44]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2baf1eac3afsm14480765ad.71.2026.05.08.01.27.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 May 2026 01:27:32 -0700 (PDT) Date: Fri, 8 May 2026 08:27:26 +0000 From: Pranjal Shrivastava To: Jason Gunthorpe Cc: iommu@lists.linux.dev, Jonathan Hunter , Joerg Roedel , linux-arm-kernel@lists.infradead.org, linux-tegra@vger.kernel.org, Robin Murphy , Thierry Reding , Krishna Reddy , Will Deacon , David Matlack , Pasha Tatashin , patches@lists.linux.dev, Samiullah Khawaja , Mostafa Saleh Subject: Re: [PATCH 3/9] iommu/arm-smmu-v3: Use the HW arm_smmu_cmd in cmdq submission functions Message-ID: References: <0-v1-b7dc0a0d4aa0+3723d-smmu_no_cmdq_ent_jgg@nvidia.com> <3-v1-b7dc0a0d4aa0+3723d-smmu_no_cmdq_ent_jgg@nvidia.com> Precedence: bulk X-Mailing-List: patches@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <3-v1-b7dc0a0d4aa0+3723d-smmu_no_cmdq_ent_jgg@nvidia.com> On Fri, May 01, 2026 at 11:29:12AM -0300, Jason Gunthorpe wrote: > Continue removing struct arm_smmu_cmdq_ent in favour of the HW based > struct arm_smmu_cmd. Switch the lower level issue commands to work on > the native struct by lifting arm_smmu_cmdq_build_cmd() into all the > callers. > > Following patches will revise each of the arm_smmu_cmdq_build_cmd() > call sites to replace it with the HW struct. > > Signed-off-by: Jason Gunthorpe > --- > drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 53 ++++++++++++--------- > 1 file changed, 30 insertions(+), 23 deletions(-) > [----- >8 ------] > /* Should be installed after arm_smmu_install_ste_for_dev() */ > @@ -4823,7 +4826,8 @@ static int arm_smmu_device_reset(struct arm_smmu_device *smmu) > { > int ret; > u32 reg, enables; > - struct arm_smmu_cmdq_ent cmd; > + struct arm_smmu_cmdq_ent ent; This shouldn't be uninitialized, we only seem to be setting ent.opcode later in the function. Since arm_smmu_cmdq_build_cmd reads other fields of ent to build the cmd, we are potentially sending stack garbage in ent At all other places we're correctly initializing ent. So, I believe only in device_reset we must change it to struct arm_smmu_cmdq_ent ent = {}; > + struct arm_smmu_cmd cmd; > > /* Clear CR0 and sync (disables SMMU and queue processing) */ > reg = readl_relaxed(smmu->base + ARM_SMMU_CR0); > @@ -4870,16 +4874,19 @@ static int arm_smmu_device_reset(struct arm_smmu_device *smmu) > } > > /* Invalidate any cached configuration */ > - cmd.opcode = CMDQ_OP_CFGI_ALL; > + ent.opcode = CMDQ_OP_CFGI_ALL; > + arm_smmu_cmdq_build_cmd(cmd.data, &ent); > arm_smmu_cmdq_issue_cmd_with_sync(smmu, &cmd); > > /* Invalidate any stale TLB entries */ > if (smmu->features & ARM_SMMU_FEAT_HYP) { > - cmd.opcode = CMDQ_OP_TLBI_EL2_ALL; > + ent.opcode = CMDQ_OP_TLBI_EL2_ALL; > + arm_smmu_cmdq_build_cmd(cmd.data, &ent); > arm_smmu_cmdq_issue_cmd_with_sync(smmu, &cmd); > } > > - cmd.opcode = CMDQ_OP_TLBI_NSNH_ALL; > + ent.opcode = CMDQ_OP_TLBI_NSNH_ALL; > + arm_smmu_cmdq_build_cmd(cmd.data, &ent); > arm_smmu_cmdq_issue_cmd_with_sync(smmu, &cmd); > > /* Event queue */ With ent initialization in device_reset addressed. Reviewed-by: Pranjal Shrivastava Thanks, Praan