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Thu, 14 May 2026 20:35:14 -0700 Date: Thu, 14 May 2026 20:35:13 -0700 From: Nicolin Chen To: Jason Gunthorpe CC: , Jonathan Hunter , "Joerg Roedel" , , , Robin Murphy , "Thierry Reding" , Krishna Reddy , "Will Deacon" , David Matlack , Pasha Tatashin , , Pranjal Shrivastava , Samiullah Khawaja , Mostafa Saleh Subject: Re: [PATCH v2 0/9] Remove SMMUv3 struct arm_smmu_cmdq_ent Message-ID: References: <0-v2-47b2bf710ad5+716ac-smmu_no_cmdq_ent_jgg@nvidia.com> Precedence: bulk X-Mailing-List: patches@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <0-v2-47b2bf710ad5+716ac-smmu_no_cmdq_ent_jgg@nvidia.com> X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS3PEPF0000C37F:EE_|CH3PR12MB9453:EE_ X-MS-Office365-Filtering-Correlation-Id: 05eb3162-3187-4bd2-8a6c-08deb233026e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|82310400026|376014|36860700016|7416014|22082099003|11063799003|13003099007|56012099003|3023799003|18002099003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: kCtJQteg6R5vItujmBcsPAehZzqy1qGyMfBKluu47PWt/8M1EAr72++FaylyWFotJrvr3DeVWBp8eKJ19YGT/g+rH/HKyAxiWhwFIaKZl6fSIVb8udMx2v1jfyodLQOd6byMFtoEYBgt1TPgRoJJY7168fPAWbSQUwjTB6JwofvCmArX2YyTuj3+80r8o8j6jn/I4FSPKtiqyHIH5Y3yZpNZGAZMPUw3oSZzIc4brP+F5cHGz385tqGo4l8BfRzg8/zYWROGUC0kgjw9iks2+CzzZ3ocjwFztisUxJV4zmohJjlkFiQdul7eYUWQNUmgCBHSaEqsIx9AnME1gHHCJOZ7mAlUFpwHY8YFciSE1j6rjq1ySVqAb8EHJ7IuV4yZQlzUPHWvd+XRR73jh/psUm/3SGXq5/SSTSafoYxMqlNgZgUFJfPQvtX3YgAA7Ew8 X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 May 2026 03:35:28.5496 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 05eb3162-3187-4bd2-8a6c-08deb233026e X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.233];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DS3PEPF0000C37F.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH3PR12MB9453 On Wed, May 13, 2026 at 08:57:39PM -0300, Jason Gunthorpe wrote: > [ This is part of the patch pile to move SMMUv3 over to the generic page > table: > 1) Introduction of new gather items and RISCV usage > https://patch.msgid.link/r/0-v2-b5156f657dc1+25f-iommu_riscv_inv_jgg@nvidia.com > 2) Remove SMMUv3 struct arm_smmu_cmdq_ent > 3) Organize the SMMUv3 invalidation flow so iommupt can use it > 4) Use the generic iommu page table for SMMUv3 > > The whole branch is here: > https://github.com/jgunthorpe/linux/commits/iommu_pt_arm64/ > ] > > The invalidation logic has this multi-step process where it first > writes the command into a 32 byte struct arm_smmu_cmdq_ent, then it > calls a function which converts it into a 16 byte HW struct, and > sometimes it then edits the HW struct a little bit before passing it > off to the batch or submission functions. > > Instead just generate the HW struct directly by moving the FIELD_PREP > blocks out of the big case statement and into helper functions. Call the > right function in all the places that were building arm_smmu_cmdq_ent. > > Add a type for the CMDQ entry similar to the STE/CD types that wraps the > two u64s for clarity and use it everywhere. > > This is intended to have no functional change. It makes the following > patches work better and removes a bunch of LOC. I've run several AI tools > with instruction to look for functional changes, which did find one subtle > mistake in PRI response. > > The removal of arm_smmu_cmdq_build_cmd() also achieves what Mostafa is > doing in the pkvm series by making the command formation entirely header > based with the arm_smmu_make_cmd_*() mini inlines. > > This series has no dependencies. Several people have already tested this > on various ARM systems along with the full iommupt conversion. > > v2: Sanity tested with SVA and nesting cases. Tested-by: Nicolin Chen