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[34.76.60.220]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-496b4ed5f93sm11566705e9.1.2026.07.24.12.26.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 24 Jul 2026 12:26:12 -0700 (PDT) Date: Fri, 24 Jul 2026 19:26:08 +0000 From: Mostafa Saleh To: Jason Gunthorpe Cc: iommu@lists.linux.dev, "Joerg Roedel (AMD)" , Jean-Philippe Brucker , linux-arm-kernel@lists.infradead.org, Robin Murphy , Will Deacon , David Matlack , Pasha Tatashin , patches@lists.linux.dev, Pranjal Shrivastava , Samiullah Khawaja Subject: Re: [PATCH 4/7] iommu/arm-smmu-v3: Remove io-pgtable-arm from sva.c Message-ID: References: <0-v1-807e2d1a5efb+e1-iommupt_armv8_jgg@nvidia.com> <4-v1-807e2d1a5efb+e1-iommupt_armv8_jgg@nvidia.com> Precedence: bulk X-Mailing-List: patches@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <4-v1-807e2d1a5efb+e1-iommupt_armv8_jgg@nvidia.com> On Mon, Jul 06, 2026 at 01:29:10PM -0300, Jason Gunthorpe wrote: > This is only being used to get some STE constants. Put local > constants along side the register definitions instead. > > Signed-off-by: Jason Gunthorpe > --- > drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c | 13 ++++++------- > drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 7 +++++++ > 2 files changed, 13 insertions(+), 7 deletions(-) > > diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c > index 0e670c92469b2f..f82a513ede09c9 100644 > --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c > +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c > @@ -11,7 +11,6 @@ > #include > > #include "arm-smmu-v3.h" > -#include "../../io-pgtable-arm.h" > > static void __maybe_unused > arm_smmu_update_s1_domain_cd_entry(struct arm_smmu_domain *smmu_domain) > @@ -41,10 +40,10 @@ static u64 page_size_to_cd(void) > static_assert(PAGE_SIZE == SZ_4K || PAGE_SIZE == SZ_16K || > PAGE_SIZE == SZ_64K); > if (PAGE_SIZE == SZ_64K) > - return ARM_LPAE_TCR_TG0_64K; > + return ARM_SMMU_TCR_TG0_64K; > if (PAGE_SIZE == SZ_16K) > - return ARM_LPAE_TCR_TG0_16K; > - return ARM_LPAE_TCR_TG0_4K; > + return ARM_SMMU_TCR_TG0_16K; > + return ARM_SMMU_TCR_TG0_4K; > } > > VISIBLE_IF_KUNIT > @@ -85,10 +84,10 @@ void arm_smmu_make_sva_cd(struct arm_smmu_cd *target, > 64ULL - vabits_actual) | > FIELD_PREP(CTXDESC_CD_0_TCR_TG0, page_size_to_cd()) | > FIELD_PREP(CTXDESC_CD_0_TCR_IRGN0, > - ARM_LPAE_TCR_RGN_WBWA) | > + ARM_SMMU_TCR_RGN_WBWA) | > FIELD_PREP(CTXDESC_CD_0_TCR_ORGN0, > - ARM_LPAE_TCR_RGN_WBWA) | > - FIELD_PREP(CTXDESC_CD_0_TCR_SH0, ARM_LPAE_TCR_SH_IS)); > + ARM_SMMU_TCR_RGN_WBWA) | > + FIELD_PREP(CTXDESC_CD_0_TCR_SH0, ARM_SMMU_TCR_SH_IS)); > > target->data[1] = cpu_to_le64(virt_to_phys(mm->pgd) & > CTXDESC_CD_1_TTB0_MASK); > diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h > index 95186cf84e9abb..99ca96db0d0401 100644 > --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h > +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h > @@ -203,6 +203,13 @@ struct arm_vsmmu; > #define Q_MAX_SZ_SHIFT (PAGE_SHIFT + MAX_PAGE_ORDER) > #endif > > +/* Constants used for CD TCR and STE VTCR fields */ > +#define ARM_SMMU_TCR_TG0_4K 0 > +#define ARM_SMMU_TCR_TG0_64K 1 > +#define ARM_SMMU_TCR_TG0_16K 2 > +#define ARM_SMMU_TCR_RGN_WBWA 1 > +#define ARM_SMMU_TCR_SH_IS 3 Can the driver use the ones in generic_pt/armv.h instead of re-defining them? Thanks, Mostafa > + > /* > * Stream table. > * > -- > 2.43.0 >