Re: [PATCH v2 9/9] selftests/resctrl: Reduce L2 impact on CAT test

Ilpo Järvinen
2026-03-06T10:35:14Z

On Tue, 3 Mar 2026, Reinette Chatre wrote:

> The L3 CAT test loads a buffer into cache that is proportional to the L3
> size allocated for the workload and measures cache misses when accessing
> the buffer as a test of L3 occupancy. When loading the buffer it can be
> assumed that a portion of the buffer will be loaded into the L2 cache and
> depending on cache design may not be present in L3. It is thus possible
> for data to not be in L3 but also not trigger an L3 cache miss when
> accessed.
>
> Reduce impact of L2 on the L3 CAT test by, if L2 allocation is supported,
> minimizing the portion of L2 that the workload can allocate into. This
> encourages most of buffer to be loaded into L3 and support better
> comparison between buffer size, cache portion, and cache misses when
> accessing the buffer.
>
> Signed-off-by: Reinette Chatre <reinette.chatre@intel.com>
> ---
> tools/testing/selftests/resctrl/cat_test.c | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/tools/testing/selftests/resctrl/cat_test.c b/tools/testing/selftests/resctrl/cat_test.c
> index 6aac03147d41..26062684a9f4 100644
> --- a/tools/testing/selftests/resctrl/cat_test.c
> +++ b/tools/testing/selftests/resctrl/cat_test.c
> @@ -157,6 +157,12 @@ static int cat_test(const struct resctrl_test *test,
> if (ret)
> goto reset_affinity;
>
> + if (!strcmp(test->resource, "L3") && resctrl_resource_exists("L2")) {
> + ret = write_schemata(param->ctrlgrp, "0x1", uparams->cpu, "L2");
> + if (ret)
> + goto reset_affinity;
> + }

This looks similar to what you did in the CMT test. Maybe add a common
function for minimizing L2 cache size so it doesn't have to duplicated to
all L3 related tests.

> +
> perf_event_attr_initialize(&pea, PERF_COUNT_HW_CACHE_MISSES);
> pe_fd = perf_open(&pea, bm_pid, uparams->cpu);
> if (pe_fd < 0) {
>

--
i.