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From: Baolu Lu <baolu.lu@linux.intel.com>
To: Jason Gunthorpe <jgg@nvidia.com>
Cc: David Woodhouse <dwmw2@infradead.org>,
	iommu@lists.linux.dev, Joerg Roedel <joro@8bytes.org>,
	Robin Murphy <robin.murphy@arm.com>,
	Will Deacon <will@kernel.org>, Kevin Tian <kevin.tian@intel.com>,
	patches@lists.linux.dev, Tina Zhang <tina.zhang@intel.com>,
	Wei Wang <wei.w.wang@intel.com>
Subject: Re: [PATCH v2 04/10] iommupt: Flush the CPU cache after any writes to the page table
Date: Wed, 24 Sep 2025 10:30:52 +0800	[thread overview]
Message-ID: <ed99ad0c-f5df-4c3c-a9ec-b271bd59c0b3@linux.intel.com> (raw)
In-Reply-To: <20250923141010.GN1391379@nvidia.com>

On 9/23/25 22:10, Jason Gunthorpe wrote:
> On Tue, Sep 23, 2025 at 10:17:49AM +0800, Baolu Lu wrote:
>> diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c
>> index dff2d895b8ab..563ded2eb3b3 100644
>> --- a/drivers/iommu/intel/iommu.c
>> +++ b/drivers/iommu/intel/iommu.c
>> @@ -3370,7 +3370,7 @@ intel_iommu_domain_alloc_second_stage(struct device
>> *dev,
>>          if (((flags & IOMMU_HWPT_ALLOC_NEST_PARENT) &&
>>               !nested_supported(iommu)) ||
>>              ((flags & IOMMU_HWPT_ALLOC_DIRTY_TRACKING) &&
>> -            !ssads_supported(iommu)))
>> +            (!ssads_supported(iommu) || !ecap_smpwc(iommu->ecap))))
>>                  return ERR_PTR(-EOPNOTSUPP);
> Also in the compatible check function!

Yes.

> It is an existing issue, please send a formal patch?

Sure. I will follow up with a formal patch.

Thanks,
baolu

  reply	other threads:[~2025-09-24  2:33 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-08-26 17:26 [PATCH v2 00/10] Convert Intel VT-D to use the generic iommu page table Jason Gunthorpe
2025-08-26 17:26 ` [PATCH v2 01/10] iommu/pages: Add support for a incoherent IOMMU page walker Jason Gunthorpe
2025-09-21  9:54   ` Baolu Lu
2025-09-22 16:32     ` Jason Gunthorpe
2025-10-14  7:41   ` Tian, Kevin
2025-08-26 17:26 ` [PATCH v2 02/10] iommupt: Add basic support for SW bits in the page table Jason Gunthorpe
2025-09-21 10:21   ` Baolu Lu
2025-10-14  7:45   ` Tian, Kevin
2025-10-21 13:18     ` Jason Gunthorpe
2025-08-26 17:26 ` [PATCH v2 03/10] iommupt: Use the incoherent start/stop functions for PT_FEAT_DMA_INCOHERENT Jason Gunthorpe
2025-09-21 13:29   ` Baolu Lu
2025-10-14  7:51   ` Tian, Kevin
2025-10-21 13:20     ` Jason Gunthorpe
2025-08-26 17:26 ` [PATCH v2 04/10] iommupt: Flush the CPU cache after any writes to the page table Jason Gunthorpe
2025-09-22  2:12   ` Baolu Lu
2025-09-22 14:42     ` Jason Gunthorpe
2025-09-23  2:17       ` Baolu Lu
2025-09-23 14:10         ` Jason Gunthorpe
2025-09-24  2:30           ` Baolu Lu [this message]
2025-09-22  2:31   ` Baolu Lu
2025-09-22 14:44     ` Jason Gunthorpe
2025-09-23  2:29       ` Baolu Lu
2025-09-23 14:13         ` Jason Gunthorpe
2025-09-24  3:05           ` Baolu Lu
2025-10-14  7:53   ` Tian, Kevin
2025-10-21 13:50     ` Jason Gunthorpe
2025-08-26 17:26 ` [PATCH v2 05/10] iommupt: Add the Intel VT-D second stage page table format Jason Gunthorpe
2025-09-22  3:06   ` Baolu Lu
2025-10-14  7:54   ` Tian, Kevin
2025-10-21 13:58     ` Jason Gunthorpe
2025-08-26 17:26 ` [PATCH v2 06/10] iommupt/x86: Set the dirty bit only for writable PTEs Jason Gunthorpe
2025-10-14  7:55   ` Tian, Kevin
2025-08-26 17:26 ` [PATCH v2 07/10] iommupt/x86: Support SW bits and permit PT_FEAT_DMA_INCOHERENT Jason Gunthorpe
2025-10-14  7:55   ` Tian, Kevin
2025-08-26 17:26 ` [PATCH v2 08/10] iommu/vt-d: Use the generic iommu page table Jason Gunthorpe
2025-09-22 11:17   ` Baolu Lu
2025-10-14  7:55   ` Tian, Kevin
2025-08-26 17:26 ` [PATCH v2 09/10] iommu/vt-d: Follow PT_FEAT_DMA_INCOHERENT into the PASID entry Jason Gunthorpe
2025-09-22 13:00   ` Baolu Lu
2025-10-14  7:58   ` Tian, Kevin
2025-08-26 17:26 ` [PATCH v2 10/10] iommupt: Add a kunit test for the SW bits Jason Gunthorpe
2025-10-14  7:58   ` Tian, Kevin

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