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[93.39.149.95]) by smtp.gmail.com with ESMTPSA id k6sm8640821ejr.104.2020.09.14.15.02.08 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Mon, 14 Sep 2020 15:02:09 -0700 (PDT) From: To: "'Ilia Mirkin'" Cc: , "'Linux PCI'" References: <20200907011238.3401-1-imirkin@alum.mit.edu> <018401d684b4$d31162c0$79342840$@gmail.com> In-Reply-To: Subject: R: [PATCH] PCI: qcom: don't clear out PHY_REFCLK_USE_PAD Date: Tue, 15 Sep 2020 00:02:00 +0200 Message-ID: <000001d68ae2$b0ad55c0$12080140$@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Mailer: Microsoft Outlook 16.0 Thread-Index: AQHY0SUK+QbXAY/uJVDw58GDK9a3NgHRG3jUAX2gsWypPhCRQA== Content-Language: it Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org > -----Messaggio originale----- > Da: Ilia Mirkin > Inviato: luned=C3=AC 7 settembre 2020 05:29 > A: Ansuel Smith > Cc: linux-arm-msm@vger.kernel.org; Linux PCI = > Oggetto: Re: [PATCH] PCI: qcom: don't clear out PHY_REFCLK_USE_PAD >=20 > On Sun, Sep 6, 2020 at 9:18 PM wrote: > > > > > > > > > -----Messaggio originale----- > > > Da: Ilia Mirkin Per conto di Ilia Mirkin > > > Inviato: luned=C3=AC 7 settembre 2020 03:13 > > > A: ansuelsmth@gmail.com > > > Cc: linux-arm-msm@vger.kernel.org; linux-pci@vger.kernel.org; Ilia > Mirkin > > > > > > Oggetto: [PATCH] PCI: qcom: don't clear out PHY_REFCLK_USE_PAD > > > > > > This makes PCIe links come up again on ifc6410 (apq8064). > > > > > > Fixes: de3c4bf6489 ("PCI: qcom: Add support for tx term offset for = rev > > > 2.1.0") > > > Signed-off-by: Ilia Mirkin > > > --- > > > drivers/pci/controller/dwc/pcie-qcom.c | 1 - > > > 1 file changed, 1 deletion(-) > > > > > > diff --git a/drivers/pci/controller/dwc/pcie-qcom.c > > > b/drivers/pci/controller/dwc/pcie-qcom.c > > > index 3aac77a295ba..985b11cf6481 100644 > > > --- a/drivers/pci/controller/dwc/pcie-qcom.c > > > +++ b/drivers/pci/controller/dwc/pcie-qcom.c > > > @@ -387,7 +387,6 @@ static int qcom_pcie_init_2_1_0(struct > qcom_pcie > > > *pcie) > > > > > > /* enable external reference clock */ > > > val =3D readl(pcie->parf + PCIE20_PARF_PHY_REFCLK); > > > - val &=3D ~PHY_REFCLK_USE_PAD; > > > > To make sure this doesn't brake ipq806x, why not limit the &=3D to = the > ipq806x > > compatible like we do up in the code? (or use the use_pad only if > apq8064 > > compatible is not detected, to address ipq8064-v2 added later?) >=20 > Do you mean something like >=20 > if (!of_device_is_compatible(node, "qcom,pcie-apq8064")) > val &=3D ~PHY_REFCLK_USE_PAD; >=20 > I'm not sure what's considered acceptable in these cases. It does seem > odd that this bit should not be cleared on apq8064 but should be on > ipq8064 -- perhaps there's more going on there? Unfortunately I > haven't the faintest clue as to what it is... >=20 > -ilia Ok i did some test... Can confirm that the condition is needed. ipq806x needs the USE_PAD or the kernel just hangs.=20 When the pci interface is init the regs are 1019... For ipq806x this = need to change to 10019 (external ref clk enabled and something else disabled = that we don't know without documentation) So to sum up... without the condition this patch would cause a = regression for ipq8064/5.