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[76.251.167.31]) by smtp.gmail.com with ESMTPSA id vq10-20020a056871a08a00b0022eac68988esm3172220oab.20.2024.04.10.09.13.04 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 10 Apr 2024 09:13:04 -0700 (PDT) Message-ID: <037179a4-5e7e-47cf-b0c2-ed6035df6041@gmail.com> Date: Wed, 10 Apr 2024 11:13:03 -0500 Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] PCI: Add a quirk for preventing D3 on a bridge To: Mario Limonciello , Bjorn Helgaas Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Eric Heintzmann , Mika Westerberg References: <20240307163709.323-1-mario.limonciello@amd.com> Content-Language: en-US From: Mario Limonciello In-Reply-To: <20240307163709.323-1-mario.limonciello@amd.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 3/7/24 10:37, Mario Limonciello wrote: > Hewlett-Packard HP Pavilion 17 Notebook PC/1972 is an Intel Ivy Bridge > system with a muxless AMD Radeon dGPU. Attempting to use the dGPU fails > with the following sequence: > > ``` > ACPI Error: Aborting method \AMD3._ON due to previous error (AE_AML_LOOP_TIMEOUT) (20230628/psparse-529) > radeon 0000:01:00.0: not ready 1023ms after resume; waiting > radeon 0000:01:00.0: not ready 2047ms after resume; waiting > radeon 0000:01:00.0: not ready 4095ms after resume; waiting > radeon 0000:01:00.0: not ready 8191ms after resume; waiting > radeon 0000:01:00.0: not ready 16383ms after resume; waiting > radeon 0000:01:00.0: not ready 32767ms after resume; waiting > radeon 0000:01:00.0: not ready 65535ms after resume; giving up > radeon 0000:01:00.0: Unable to change power state from D3cold to D0, device inaccessible > radeon 0000:01:00.0: Unable to change power state from D3cold to D0, device inaccessible > ``` > > The issue is that the root port the dGPU is connected to can't handle > the transition from D3cold to D0 so the dGPU can't properly exit runpm. > > The existing logic in pci_bridge_d3_possible() checks for systems that > are newer than 2015 to decide that D3 is safe. This would nominally work > for an Ivy Bridge system (which was discontinued in 2015), but this system > appears to have continued to receive BIOS updates until 2017 and so this > existing logic doesn't appropriately capture it. > > Add the system to bridge_d3_blacklist to prevent port pm from being used. > > Reported-and-tested-by: Eric Heintzmann > Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3229 > Signed-off-by: Mario Limonciello > --- > drivers/pci/pci.c | 12 ++++++++++++ > 1 file changed, 12 insertions(+) > > diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c > index c3585229c12a..9d5d08a420f1 100644 > --- a/drivers/pci/pci.c > +++ b/drivers/pci/pci.c > @@ -3102,6 +3102,18 @@ static const struct dmi_system_id bridge_d3_blacklist[] = { > DMI_MATCH(DMI_BOARD_VERSION, "Continental Z2"), > }, > }, > + { > + /* > + * Changing power state of root port dGPU is connected fails > + * https://gitlab.freedesktop.org/drm/amd/-/issues/3229 > + */ > + .ident = "Hewlett-Packard HP Pavilion 17 Notebook PC/1972", > + .matches = { > + DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"), > + DMI_MATCH(DMI_BOARD_NAME, "1972"), > + DMI_MATCH(DMI_BOARD_VERSION, "95.33"), > + }, > + }, > #endif > { } > }; Bjorn, Ping on this quirk.