From: Sinan Kaya <okaya@codeaurora.org>
To: Bjorn Helgaas <helgaas@kernel.org>
Cc: Linux PCI <linux-pci@vger.kernel.org>,
Bjorn Helgaas <bhelgaas@google.com>,
Vikram Sethi <vikrams@codeaurora.org>
Subject: Re: PCI CRS Support
Date: Wed, 24 Aug 2016 15:28:51 -0400 [thread overview]
Message-ID: <046ebcb0-cb0d-65a5-d7f4-2805fe99199e@codeaurora.org> (raw)
In-Reply-To: <20160824191007.GD23914@localhost>
On 8/24/2016 3:10 PM, Bjorn Helgaas wrote:
>> Where do we go from here? I was thinking of putting something deep down into the reset secondary
>> > bus function but I'm afraid it will break things especially when we wait up to 60 seconds.
> I agree CRS handling after reset is probably all broken.
>
> I hate the fact that we reset devices without re-enumerating them. We
> have no assurance that the device is the same after reset (it could
> have loaded new firmware and been completely reconfigured).
>
> I don't have any good suggestions for you, so if you have some ideas
> and want to fix it, please go ahead.
I think I'll make a list of paths that reach to secondary bus reset function
and try to keep CRS loop as close as possible to the caller.
I'll focus on FLR later. I won't be heart-broken if somebody took a stab at the
FLR.
--
Sinan Kaya
Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm Technologies, Inc.
Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project.
next prev parent reply other threads:[~2016-08-24 19:28 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-08-24 15:56 PCI CRS Support Sinan Kaya
2016-08-24 19:10 ` Bjorn Helgaas
2016-08-24 19:28 ` Sinan Kaya [this message]
2016-08-25 8:44 ` Lorenzo Pieralisi
2016-08-28 17:57 ` Sinan Kaya
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