From: Stanimir Varbanov <svarbanov@suse.de>
To: Jim Quinlan <james.quinlan@broadcom.com>,
Stanimir Varbanov <svarbanov@suse.de>
Cc: linux-pci@vger.kernel.org,
"Nicolas Saenz Julienne" <nsaenz@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>,
"Cyril Brulebois" <kibi@debian.org>,
bcm-kernel-feedback-list@broadcom.com, jim2101024@gmail.com,
"Florian Fainelli" <florian.fainelli@broadcom.com>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Rob Herring" <robh@kernel.org>,
"Philipp Zabel" <p.zabel@pengutronix.de>,
"moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE"
<linux-rpi-kernel@lists.infradead.org>,
"moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE"
<linux-arm-kernel@lists.infradead.org>,
"open list" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v1 3/8] PCI: brcmstb: Use bridge reset if available
Date: Wed, 3 Jul 2024 16:09:46 +0300 [thread overview]
Message-ID: <055fe06c-58c3-42ad-a33e-c39de21f59b1@suse.de> (raw)
In-Reply-To: <CA+-6iNw3QziFzGuqrwzb8QsgY-B3uL9Z3z1rcTCBFG=6BW9MRQ@mail.gmail.com>
Hi Jim,
On 7/2/24 21:36, Jim Quinlan wrote:
> On Tue, Jul 2, 2024 at 8:59 AM Stanimir Varbanov <svarbanov@suse.de> wrote:
>>
>>
>>
>> On 6/28/24 23:54, Jim Quinlan wrote:
>>> The 7712 SOC has a bridge reset which can be described in the device tree.
>>> If it is present, use it. Otherwise, continue to use the legacy method to
>>> reset the bridge.
>>>
>>> Signed-off-by: Jim Quinlan <james.quinlan@broadcom.com>
>>> ---
>>> drivers/pci/controller/pcie-brcmstb.c | 24 +++++++++++++++++++-----
>>> 1 file changed, 19 insertions(+), 5 deletions(-)
>>>
>>> diff --git a/drivers/pci/controller/pcie-brcmstb.c b/drivers/pci/controller/pcie-brcmstb.c
>>> index c2eb29b886f7..4104c3668fdb 100644
>>> --- a/drivers/pci/controller/pcie-brcmstb.c
>>> +++ b/drivers/pci/controller/pcie-brcmstb.c
>>> @@ -265,6 +265,7 @@ struct brcm_pcie {
>>> enum pcie_type type;
>>> struct reset_control *rescal;
>>> struct reset_control *perst_reset;
>>> + struct reset_control *bridge;
>>> int num_memc;
>>> u64 memc_size[PCIE_BRCM_MAX_MEMC];
>>> u32 hw_rev;
>>> @@ -732,12 +733,19 @@ static void __iomem *brcm7425_pcie_map_bus(struct pci_bus *bus,
>>>
>>> static void brcm_pcie_bridge_sw_init_set_generic(struct brcm_pcie *pcie, u32 val)
>>> {
>>> - u32 tmp, mask = RGR1_SW_INIT_1_INIT_GENERIC_MASK;
>>> - u32 shift = RGR1_SW_INIT_1_INIT_GENERIC_SHIFT;
>>> + if (pcie->bridge) {
>>> + if (val)
>>> + reset_control_assert(pcie->bridge);
>>> + else
>>> + reset_control_deassert(pcie->bridge);
>>
>> Please check reset_control_assert/deassert() calls for error. This might
>> need to change the definition of brcm_pcie_bridge_sw_init_set_generic()
>> to return error.
>
> Hi Stan,
>
> Do you really think this is necessary? If you look at
> "drivers/reset/reset-brcmstb.c" there is no way for either of these
> calls to fail and I don't see that changing because it is just writing
> a bit into a register.
yes, I think there are kernel rules which we have to follow. We use
generic reset-control interface in pcie driver and we cannot rely on the
low-level implementation of this particular reset-controller driver
(reset-brcmstb.c).
regards,
~Stan
next prev parent reply other threads:[~2024-07-03 13:09 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-28 20:54 [PATCH v1 0/8] PCI: brcnstb: Enable STB 7712 SOC Jim Quinlan
2024-06-28 20:54 ` [PATCH v1 1/8] dt-bindings: PCI: Add Broadcom STB 7712 SOC, update maintainter Jim Quinlan
2024-07-01 9:12 ` Krzysztof Kozlowski
2024-07-02 21:57 ` Jim Quinlan
2024-07-03 4:33 ` Krzysztof Kozlowski
2024-07-01 19:47 ` Bjorn Helgaas
2024-06-28 20:54 ` [PATCH v1 2/8] PCI: brcmstb: Use "clk_out" error path label Jim Quinlan
2024-07-01 19:49 ` Bjorn Helgaas
2024-07-03 18:45 ` [PATCH " Markus Elfring
2024-06-28 20:54 ` [PATCH v1 3/8] PCI: brcmstb: Use bridge reset if available Jim Quinlan
2024-07-02 12:59 ` Stanimir Varbanov
2024-07-02 18:36 ` Jim Quinlan
2024-07-03 13:09 ` Stanimir Varbanov [this message]
2024-06-28 20:54 ` [PATCH v1 4/8] PCI: brcmstb: Use swinit " Jim Quinlan
2024-07-01 9:48 ` Philipp Zabel
2024-07-02 13:02 ` Stanimir Varbanov
2024-06-28 20:54 ` [PATCH v1 5/8] PCI: brcmstb: Two more register offsets vary by SOC Jim Quinlan
2024-07-01 3:23 ` kernel test robot
2024-07-01 17:32 ` Bjorn Helgaas
2024-06-28 20:54 ` [PATCH v1 6/8] PCI: brcmstb: Don't conflate the reset rescal with phy ctrl Jim Quinlan
2024-07-02 13:10 ` Stanimir Varbanov
2024-07-02 17:59 ` Jim Quinlan
2024-07-03 12:38 ` Stanimir Varbanov
2024-06-28 20:54 ` [PATCH v1 7/8] PCI: brcmstb: Refactor for chips with many regular inbound BARs Jim Quinlan
2024-06-28 20:54 ` [PATCH v1 8/8] PCI: brcmstb: Enable 7712 SOCs Jim Quinlan
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