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Fri, 1 Aug 2025 11:30:27 GMT Received: from smtpav06.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 5F31920040; Fri, 1 Aug 2025 11:30:27 +0000 (GMT) Received: from smtpav06.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 1FA6F2004D; Fri, 1 Aug 2025 11:30:27 +0000 (GMT) Received: from [9.152.224.87] (unknown [9.152.224.87]) by smtpav06.fra02v.mail.ibm.com (Postfix) with ESMTP; Fri, 1 Aug 2025 11:30:27 +0000 (GMT) Message-ID: <06f16b1a55eede3dc3e0bf31ff14eca89ab6f009.camel@linux.ibm.com> Subject: Re: [PATCH] PCI: Fix endianness issues in pci_bus_read_config() From: Gerd Bayer To: Manivannan Sadhasivam , Hans Zhang Cc: Arnd Bergmann , Bjorn Helgaas , Hans Zhang <18255117159@163.com>, bhelgaas@google.com, Alexander Gordeev , Christian Borntraeger , Ilpo =?ISO-8859-1?Q?J=E4rvinen?= , jingoohan1@gmail.com, Krzysztof =?UTF-8?Q?Wilczy=C5=84ski?= , linux-kernel@vger.kernel.org, linux-s390@vger.kernel.org, linux-next , linux-pci@vger.kernel.org, Lorenzo Pieralisi , Rob Herring , Niklas Schnelle , geert@linux-m68k.org Date: Fri, 01 Aug 2025 13:30:27 +0200 In-Reply-To: References: <20250731183944.GA3424583@bhelgaas> <6e34b4af-dff9-4360-b3da-c95ca7c740c9@app.fastmail.com> <9a155e45-f723-4eec-81d3-2547bfe9a4e9@cixtech.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.56.2 (3.56.2-1.fc42) Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwODAxMDA4NCBTYWx0ZWRfX70m2fojqcxai EICC7mib8QH9VDJkUZ4SKDtE+Y9f1Be75XYgtOXR9GG2j/ShFkGz/QvtZ2+qxN+i0fJCN4UJ6LH fXrkN23Gy2YDlzuy3VRLkXpyd8dBXQDfXMUzTrN0vyZHUwy2Id+loT96EzRs/71KBJIZC1Io6yR JSohIL3rdlOfMRGbztFshPp9VLlE0NzrrZCaXeje01dJ3z6w/PmePmURwQctkd2lGKkzg2CP1Xu FFc8iExD6/n/YHGlxtplPDw6qQSJ8MNU8oz9E8l7uam1YnY1C+YSfpWgD73D0g3Ij5WsK999O5b PB/QDGti1lLH1mcw1dIu9IYHFeuZveKXSqe4sGPrBCVuxMKLHOJHaKa1BlVxTPV2GVg2WmzGew1 qNUrnZfjbz5sOzT8LXLjHxHbppThbWizvhX7uc+xbfGF5YoEc8DfbHLxYudNDe11gBivBsN1 X-Proofpoint-ORIG-GUID: nYq4ES_YWcwOS98pyI2g0tFOHFjpKKjx X-Authority-Analysis: v=2.4 cv=Lp2Symdc c=1 sm=1 tr=0 ts=688ca558 cx=c_pps a=5BHTudwdYE3Te8bg5FgnPg==:117 a=5BHTudwdYE3Te8bg5FgnPg==:17 a=IkcTkHD0fZMA:10 a=2OwXVqhp2XgA:10 a=VwQbUJbxAAAA:8 a=pGLkceISAAAA:8 a=Y6fvskrGHag37onZn_kA:9 a=QEXdDO2ut3YA:10 X-Proofpoint-GUID: 1RwGEQaUpfVMdxhJNB9DVmx4MFTmS8XT X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-08-01_03,2025-07-31_03,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 bulkscore=0 impostorscore=0 mlxscore=0 priorityscore=1501 adultscore=0 clxscore=1011 lowpriorityscore=0 malwarescore=0 suspectscore=0 mlxlogscore=999 spamscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2505280000 definitions=main-2508010084 On Fri, 2025-08-01 at 16:24 +0530, Manivannan Sadhasivam wrote: <--- snip ---> > > > > > > The pci_bus_read_config() interface itself may have been a > > > > > > mistake, can't the callers just use the underlying helpers > > > > > > directly? > > > > > >=20 > > > > >=20 > > > > > They can! Since the callers of this API is mostly the macros, we = can easily > > > > > implement the logic to call relevant accessors based on the reque= sted size. > > > > >=20 > > > > > Hans, could you please respin the series based the feedback since= the series is > > > > > dropped for 6.17. > > > > >=20 > > > >=20 > > > > Dear all, > > > >=20 > > > > I am once again deeply sorry for the problems that occurred in this= series. > > > > I only test pulling the ARM platform. > > > >=20 > > > > Thank you very much, Gerd, for reporting the problem. no worries! > > > > Thank you all for your discussions and suggestions for revision. > > > >=20 > > > > Hi Mani, > > > >=20 > > > > Geert provided a solution. My patch based on this is as follows. Pl= ease > > > > check if there are any problems. > > > > https://lore.kernel.org/linux-pci/CAMuHMdVwFeV46oCid_sMHjXfP+yyGTpB= fs9t3uaa=3DwRxNcSOAQ@mail.gmail.com/ > > > >=20 > > > > Also, please ask Gerd to help test whether it works properly. Thank= you very > > > > much. > > > >=20 I found Geert's proposal intriguing for a quick resolution of the issue. Yet, I have not tried that proposal, though. Instead I spent some more cycles on Lukas' and Mani's question about the value of the pci_bus_read_config() helper. So I changed PCI_FIND_NEXT_CAP and PCI_FIND_NEXT_EXT_CAP to use size-aware versions of read_cfg accessor functions like this: diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h index ac954584d991..9e2f75ede95f 100644 --- a/drivers/pci/pci.h +++ b/drivers/pci/pci.h @@ -109,17 +109,17 @@ int pci_bus_read_config(void *priv, unsigned int devfn, int where, u32 size, ({ =20 \ int __ttl =3D PCI_FIND_CAP_TTL; =20 \ u8 __id, __found_pos =3D 0; =20 \ - u32 __pos =3D (start); =20 \ - u32 __ent; =20 \ + u8 __pos =3D (start); =20 \ + u16 __ent; =20 \ =20 \ - read_cfg(args, __pos, 1, &__pos); =20 \ + read_cfg##_byte(args, __pos, &__pos); =20 \ =20 \ while (__ttl--) { =20 \ if (__pos < PCI_STD_HEADER_SIZEOF) =20 \ break; =20 \ =20 \ __pos =3D ALIGN_DOWN(__pos, 4); =20 \ - read_cfg(args, __pos, 2, &__ent); =20 \ + read_cfg##_word(args, __pos, &__ent); =20 \ =20 \ __id =3D FIELD_GET(PCI_CAP_ID_MASK, __ent); =20 \ if (__id =3D=3D 0xff) = =20 \ @@ -158,7 +158,7 @@ int pci_bus_read_config(void *priv, unsigned int devfn, int where, u32 size, =20 \ __ttl =3D (PCI_CFG_SPACE_EXP_SIZE - PCI_CFG_SPACE_SIZE) / 8; =20 \ while (__ttl-- > 0 && __pos >=3D PCI_CFG_SPACE_SIZE) { =20 \ - __ret =3D read_cfg(args, __pos, 4, &__header); =20 \ + __ret =3D read_cfg##_dword(args, __pos, &__header); =20 \ if (__ret !=3D PCIBIOS_SUCCESSFUL) =20 \ break; =20 \ =20 \ This fixes the issue for s390's use-cases. With that pci_bus_read_config() becomes unused - and could be removed in further refinements. =20 However, this probably breaks your dwc and cdns use-cases. I think, with the accessor functions for dwc and cadence changed to follow the {_byte|_word|_dword} naming pattern they could be used straight out of PCI_FIND_NEXT_{EXT_}CAP, too. Then, dw_pcie_read_cfg() and cdns_pcie_read_cfg become obsolete as well. Thoughts?