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([2a02:810d:15c0:828:d0d5:7818:2f46:5e76]) by smtp.gmail.com with ESMTPSA id u11-20020a50eacb000000b0050bc7c882bfsm767121edp.65.2023.05.09.06.36.25 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 09 May 2023 06:36:26 -0700 (PDT) Message-ID: <0815c0b5-304b-568f-5a64-d19d7d2aeb93@linaro.org> Date: Tue, 9 May 2023 15:36:25 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.11.0 Subject: Re: [Patch v7 1/8] memory: tegra: add interconnect support for DRAM scaling in Tegra234 Content-Language: en-US To: Sumit Gupta , treding@nvidia.com, dmitry.osipenko@collabora.com, viresh.kumar@linaro.org, rafael@kernel.org, jonathanh@nvidia.com, robh+dt@kernel.org, lpieralisi@kernel.org, helgaas@kernel.org Cc: linux-kernel@vger.kernel.org, linux-tegra@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-pci@vger.kernel.org, mmaddireddy@nvidia.com, kw@linux.com, bhelgaas@google.com, vidyas@nvidia.com, sanjayc@nvidia.com, ksitaraman@nvidia.com, ishah@nvidia.com, bbasu@nvidia.com References: <20230424131337.20151-1-sumitg@nvidia.com> <20230424131337.20151-2-sumitg@nvidia.com> <7c6c6584-204a-ada1-d669-2e8bef50e5e5@linaro.org> <3071273b-b03b-5fc8-ffa1-9b18311a3a5d@nvidia.com> <5ab9687e-756d-f94b-b085-931d4ea534c1@nvidia.com> <10b32e55-4d28-5405-035e-c73a514c95e4@linaro.org> <14438cf9-ec78-afb5-107a-4ed954ac0eb7@nvidia.com> From: Krzysztof Kozlowski In-Reply-To: <14438cf9-ec78-afb5-107a-4ed954ac0eb7@nvidia.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org On 09/05/2023 15:17, Sumit Gupta wrote: >>>>>> + /* >>>>>> + * MC driver probe can't get BPMP reference as >>>>>> it gets probed >>>>>> + * earlier than BPMP. So, save the BPMP ref got >>>>>> from the EMC >>>>>> + * DT node in the mc->bpmp and use it in MC's >>>>>> icc_set hook. >>>>>> + */ >>>>>> + mc->bpmp = emc->bpmp; >>>>> >>>>> This (and ()) are called without any locking. You register first the >>>>> interconnect, so set() callback can be used, right? Then set() could be >>>>> called anytime between tegra_emc_interconnect_init() and assignment >>>>> above. How do you synchronize these? >>>>> >>>>> Best regards, >>>>> Krzysztof >>>>> >>>> >>>> Currently, the tegra234_mc_icc_set() has NULL check. So, it will give >>>> this error. >>>> if (!mc->bpmp) { >> >> How does it solve concurrent accesses and re-ordering of instructions by >> compiler or CPU? >> > > Now, the "mc->bpmp" is set before tegra_emc_interconnect_init(). > So, until the EMC interconnect initializes, set() won't be > called as the devm_of_icc_get() call will fail. What if compiler puts "mc->bpmp" assignment after tegra_emc_interconnect_init()? What if CPU executes above assignment also after tegra_emc_interconnect_init()? Considering amount of code inside tegra_emc_interconnect_init() second case is rather unlikely, but first possible, right? Best regards, Krzysztof