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([2600:1700:dfe0:49f0:98c0:b1b6:3436:9662]) by smtp.gmail.com with ESMTPSA id k5sm2350693oot.30.2020.12.06.19.25.07 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 06 Dec 2020 19:25:10 -0800 (PST) Subject: Re: [PATCH v6 1/5] PCI: Unify ECAM constants in native PCI Express drivers To: =?UTF-8?Q?Krzysztof_Wilczy=c5=84ski?= , Bjorn Helgaas , Jim Quinlan Cc: Rob Herring , Jonathan Cameron , Jonathan Chocron , Shawn Lin , Heiko Stuebner , Zhou Wang , Lorenzo Pieralisi , Will Deacon , Robert Richter , Michal Simek , Toan Le , Michael Ellerman , Benjamin Herrenschmidt , Paul Mackerras , Thomas Petazzoni , Nicolas Saenz Julienne , Ray Jui , Scott Branden , Jonathan Derrick , linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, linux-rockchip@lists.infradead.org, linux-rpi-kernel@lists.infradead.org, bcm-kernel-feedback-list@broadcom.com References: <20201129230743.3006978-1-kw@linux.com> <20201129230743.3006978-2-kw@linux.com> From: Florian Fainelli Message-ID: <094b314f-7f61-d0fd-fd63-c9c4da9e84a8@gmail.com> Date: Sun, 6 Dec 2020 19:25:06 -0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:78.0) Gecko/20100101 Firefox/78.0 Thunderbird/78.5.1 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org +JimQ, On 12/6/2020 12:16 PM, Krzysztof Wilczyński wrote: > Hello Nicolas, Florian and Florian, > > [...] >> -/* Configuration space read/write support */ >> -static inline int brcm_pcie_cfg_index(int busnr, int devfn, int reg) >> -{ >> - return ((PCI_SLOT(devfn) & 0x1f) << PCIE_EXT_SLOT_SHIFT) >> - | ((PCI_FUNC(devfn) & 0x07) << PCIE_EXT_FUNC_SHIFT) >> - | (busnr << PCIE_EXT_BUSNUM_SHIFT) >> - | (reg & ~3); >> -} >> - >> static void __iomem *brcm_pcie_map_conf(struct pci_bus *bus, unsigned int devfn, >> int where) >> { >> @@ -716,7 +704,7 @@ static void __iomem *brcm_pcie_map_conf(struct pci_bus *bus, unsigned int devfn, >> return PCI_SLOT(devfn) ? NULL : base + where; >> >> /* For devices, write to the config space index register */ >> - idx = brcm_pcie_cfg_index(bus->number, devfn, 0); >> + idx = PCIE_ECAM_OFFSET(bus->number, devfn, 0); >> writel(idx, pcie->base + PCIE_EXT_CFG_INDEX); >> return base + PCIE_EXT_CFG_DATA + where; >> } > [...] > > Passing the hard-coded 0 as the "reg" argument here never actually did > anything, thus the 32 bit alignment was never correctly enforced. > > My question would be: should this be 32 bit aligned? It seems like the > intention was to perhaps make the alignment? I am sadly not intimately > familiar with his hardware, so I am not sure if there is something to > fix here or not. > > Also, I wonder whether it would be safe to pass the offset (the "where" > variable) rather than hard-coded 0? > > Thank you for help in advance! > > Bjorn also asked the same question: > https://lore.kernel.org/linux-pci/20201120203428.GA272511@bjorn-Precision-5520/ > > Krzysztof > -- Florian