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Wed, 11 Dec 2024 11:45:53 +0000 (GMT) Received: from epsmgms1p1new.samsung.com (unknown [182.195.42.41]) by epsmtrp2.samsung.com (KnoxPortal) with ESMTP id 20241211114553epsmtrp25ad99902bb7ff3a73a990b2b1a73acc0~QHNQiM3co2253622536epsmtrp2T; Wed, 11 Dec 2024 11:45:53 +0000 (GMT) X-AuditID: b6c32a4b-fd1f170000004df4-05-67597b86c3ea Received: from epsmtip1.samsung.com ( [182.195.34.30]) by epsmgms1p1new.samsung.com (Symantec Messaging Gateway) with SMTP id B9.BF.18729.17B79576; Wed, 11 Dec 2024 20:45:53 +0900 (KST) Received: from FDSFTE462 (unknown [107.122.81.248]) by epsmtip1.samsung.com (KnoxPortal) with ESMTPA id 20241211114551epsmtip13981d505855900b7f1bd35b2240211b5~QHNOY8DTw0441004410epsmtip11; Wed, 11 Dec 2024 11:45:51 +0000 (GMT) From: "Shradha Todi" To: "'Bjorn Helgaas'" Cc: , , , , , , , , , , , , , , In-Reply-To: <20241206161314.GA3101322@bhelgaas> Subject: RE: [PATCH v4 1/2] PCI: dwc: Add support for vendor specific capability search Date: Wed, 11 Dec 2024 17:15:50 +0530 Message-ID: <0d6301db4bc2$3be58dc0$b3b0a940$@samsung.com> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Mailer: Microsoft Outlook 16.0 Content-Language: en-in Thread-Index: AQKqwUqkS3i3H+E5/iBI1vzIBNwqmAFi+xIzsTbfpjA= X-Brightmail-Tracker: H4sIAAAAAAAAA02Te0xTdxTH8+ttby8mkAvK/MEc6674AARbafGWFdwydGWdgjFbwtxSG3rX An3ltmUiYSECJmVMYQtBGoYPFKGTudQKFMpgPGUB2SZDSNbJtF2QycKwITHCXK8XNv77/L7n nN/3nN8DQyJ+QaOxPIOFog0qHYFu4rYPxMUlninO0QjHO2PJuoHXyCunteTpr708cqbPzSHn x9pQsiVQzycdl6ZQsrTqGY+829WAkuONIyhZvlLOJb3lNh55+VaAT87OFpG2hkGEfO7p5L+B y912L19+0WmVlw8u8OROhw2V/zrlQeW+yTqOvMbzqfysywHkT5wx2SEfFMi0lEpN0QLKkGtU 5xk0aYTimPItpSRFKEoUScn9hMCg0lNpRMa72YmH8nTBEQhBoUpnDUrZKrOZ2Jsuo41WCyXQ Gs2WNIIyqXUmsSnJrNKbrQZNkoGypIqEwn2SYOKJAq2/uw+YrsecvDHxM1IK6qMqQQgGcTH8 ab6JXwk2YRF4N4A1t5s4TCACXwLQ1a5meRnAf5rD1wu+86yibEEPgEMrvrXFHIC2hWWUyULx PdA3uYIwvAWPhyPf9/KYJAQ/j8Cx0WkeEwjBhdDvqACVAMM24zmw+Q8+I3PxHTDQVw0YDsWl 8Ln/DpflcDha73vBCP4q7FhoQNiOBPCpv5nH6lvh0NOqNd9U2PHtKmB8If4Yg+4eL4fxgngG HGjD2NrNcH7ExWc5Gj75qwdlWQNbb55f218Hl29e4bB8APZNNnCZbRA8Dt7o2svKr8DaH77h sC2Ewc+f+dbSQ2Fn4zpvh4FVD5flKNg4fJdXDQj7hsnsGyazb5jG/r/bRcB1gCjKZNZrKLPE lGygPvnvunONeid48b7jFZ3gwexiUj/gYKAfQAwhtoROH8jRRISqVUWnKNqopK06ytwPJMHj rkGiI3ONwQ9isChFYqlQnJKSIpYmp4iIraF/VnyljsA1KgtVQFEmil6v42Ah0aWc6t/KlE5T 7J6pEkmtJ//E4ZmKC/mt2/XC94raOwbTdxe/rCn5wtQos2ZmzbljpX78keRwsiDhaO6bBxNv bYs74z3kOaYePxo5mDi87+RnxTzLwyXX/e4jx6+NpMfwOrkl/KHhuXcuJVR1lcwIdxyUeJcG PgzHKkbrfm/Lylq97Q47h4qSdtKoeyW+ZVA57UnQv03ZWz6WvXTniEdxSjHujNzlqnlsm75W 0LR/RDFbJqC3jc1n0t3Hz6EXrn5ZW0Y7Ha/7CheHJnq5vR+FeaiHkvz3yZjY+1OWiUh769lH /NSdi/cQZSDv8o8ya80A8nebq9BxPdOdmzEW+8Byb5d2luCatSpRPEKbVf8CpYzCHmgEAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrPIsWRmVeSWpSXmKPExsWy7bCSnG5hdWS6waEt5hbTDytaLGnKsGha fZfV4uaBnUwWr86sZbNY8WUmu8WqhdfYLBp6frNaXN41h83i7LzjbBYtf1pYLO62dLJaLNr6 hd3iwYNKi845R5gt/u/Zwe4g4LFz1l12jwWbSj1ajrxl9di0qpPN4861PWweT65MZ/KYuKfO o2/LKkaPz5vkAjijuGxSUnMyy1KL9O0SuDKe7j7AWLBGrmL9+UvMDYwzJbsYOTkkBEwk9u35 y9bFyMUhJLCbUaLjSx8rREJS4vPFdUwQtrDEyn/P2SGKnjFKrHxxlxEkwSagI/Hkyh9mEFtE QEvi+MH9rCBFzAIrmCWO7HvKBNHRyChxq6sbrIpTwEDi6apWsG5hgXCJm1/OsIDYLAKqEl8O TACL8wpYSvx/eo4FwhaUODnzCZDNATRVT6JtI1gJs4C8xPa3c5ghrlOQ+Pl0GStEXFzi6M8e qIOsJLZv+Ms4gVF4FpJJsxAmzUIyaRaS7gWMLKsYJVMLinPTc4sNCwzzUsv1ihNzi0vz0vWS 83M3MYLjWEtzB+P2VR/0DjEycTAeYpTgYFYS4b1hH5kuxJuSWFmVWpQfX1Sak1p8iFGag0VJ nFf8RW+KkEB6YklqdmpqQWoRTJaJg1OqgSn15gaZ9dN457NnHK/9ulKCW2TTEteNdZwSTZz9 TS5V9t25+Z2lQQsOv17GzWwl8ariadjGOtZrU0p4dbx0/Gfmze4suGN5h3Eq74oUmyAbHYai XYyJ+0SOTjHc/kAxPmypo6DPgmmcyVflWL70fZ15KuRj5vzY3f/mtwf92sKvZSvJvOOIb1uj /MQLfnFacQ8233YQ2sQQ/DX582nGVxbinLJKuh/X5WTNWbXnE5/8AmYvvvtrjheltQcezbVw 5Ysruc6XvuGyS2z5+veH2qryJULij/16uajBZePCTcfP6nxcWfbp2KM1FcIBqwV2zK0/2y78 eq6CceW6/XNN90kuzM7gEl1/f+FcBgk9PSWW4oxEQy3mouJEAAlIJLxSAwAA X-CMS-MailID: 20241211114553epcas5p4e7566e44f0d65371d57def76851f7983 X-Msg-Generator: CA Content-Type: text/plain; charset="utf-8" X-Sendblock-Type: REQ_APPROVE CMS-TYPE: 105P DLP-Filter: Pass X-CFilter-Loop: Reflected X-CMS-RootMailID: 20241206161320epcas5p46ad6746fd2fdfd30a45de1a34393abf0 References: <20241206161314.GA3101322@bhelgaas> > -----Original Message----- > From: Bjorn Helgaas > Sent: 06 December 2024 21:43 > To: Shradha Todi > Cc: linux-kernel@vger.kernel.org; linux-pci@vger.kernel.org; manivannan.sadhasivam@linaro.org; lpieralisi@kernel.org; > kw@linux.com; robh@kernel.org; bhelgaas@google.com; jingoohan1@gmail.com; Jonathan.Cameron@huawei.com; > fan.ni@samsung.com; a.manzanares@samsung.com; pankaj.dubey@samsung.com; quic_nitegupt@quicinc.com; > quic_krichai@quicinc.com; gost.dev@samsung.com > Subject: Re: [PATCH v4 1/2] PCI: dwc: Add support for vendor specific capability search > > On Fri, Dec 06, 2024 at 01:14:55PM +0530, Shradha Todi wrote: > > Add vendor specific extended configuration space capability search API > > using struct dw_pcie pointer for DW controllers. > > > > Signed-off-by: Shradha Todi > > --- > > drivers/pci/controller/dwc/pcie-designware.c | 16 ++++++++++++++++ > > drivers/pci/controller/dwc/pcie-designware.h | 1 + > > 2 files changed, 17 insertions(+) > > > > diff --git a/drivers/pci/controller/dwc/pcie-designware.c > > b/drivers/pci/controller/dwc/pcie-designware.c > > index 6d6cbc8b5b2c..41230c5e4a53 100644 > > --- a/drivers/pci/controller/dwc/pcie-designware.c > > +++ b/drivers/pci/controller/dwc/pcie-designware.c > > @@ -277,6 +277,22 @@ static u16 dw_pcie_find_next_ext_capability(struct dw_pcie *pci, u16 start, > > return 0; > > } > > > > +u16 dw_pcie_find_vsec_capability(struct dw_pcie *pci, u8 vsec_cap) > > To make sure that we find a VSEC ID that corresponds to the expected vendor, I think this interface needs to be the same > as pci_find_vsec_capability(). In particular, it needs to take a "u16 vendor" As per my understanding, Synopsys is the vendor here when we talk about vsec capabilities. VSEC cap IDs are fixed for each vendor (eg: For Synopsys Designware controllers, 0x2 is always RAS CAP, 0x4 is always PTM responder and so on). So no matter if the DWC IP is being integrated by Samsung, NVDIA or Qcom, the vendor specific CAP IDs will remain constant. Now since this function is being written as part of designware file, the control will reach here only when the PCIe IP is DWC. So, we don't really require a vendor ID to be checked here. EG: If 0x2 VSEC ID is present in any DWC controller, it means RAS is supported. Please correct me if I'm wrong. >and a "u16 vsec_cap". > > (pci_find_vsec_capability() takes an "int cap", but I don't think that's quite right). > It should be u16 vsec_cap. You're right. I will fix this in the next patchset. Shradha > > +{ > > + u16 vsec = 0; > > + u32 header; > > + > > + while (vsec = dw_pcie_find_next_ext_capability(pci, vsec, > > + PCI_EXT_CAP_ID_VNDR)) { > > + header = dw_pcie_readl_dbi(pci, vsec + PCI_VNDR_HEADER); > > + if (PCI_VNDR_HEADER_ID(header) == vsec_cap) > > + return vsec; > > + } > > + > > + return 0; > > +} > > +EXPORT_SYMBOL_GPL(dw_pcie_find_vsec_capability); > > + > > u16 dw_pcie_find_ext_capability(struct dw_pcie *pci, u8 cap) { > > return dw_pcie_find_next_ext_capability(pci, 0, cap); diff --git > > a/drivers/pci/controller/dwc/pcie-designware.h > > b/drivers/pci/controller/dwc/pcie-designware.h > > index 347ab74ac35a..98a057820bc7 100644 > > --- a/drivers/pci/controller/dwc/pcie-designware.h > > +++ b/drivers/pci/controller/dwc/pcie-designware.h > > @@ -476,6 +476,7 @@ void dw_pcie_version_detect(struct dw_pcie *pci); > > > > u8 dw_pcie_find_capability(struct dw_pcie *pci, u8 cap); > > u16 dw_pcie_find_ext_capability(struct dw_pcie *pci, u8 cap); > > +u16 dw_pcie_find_vsec_capability(struct dw_pcie *pci, u8 vsec_cap); > > > > int dw_pcie_read(void __iomem *addr, int size, u32 *val); int > > dw_pcie_write(void __iomem *addr, int size, u32 val); > > -- > > 2.17.1 > >