From: Robin Murphy <robin.murphy@arm.com>
To: "Heiko Stübner" <heiko@sntech.de>, "Rob Herring" <robh+dt@kernel.org>
Cc: Johan Jonker <jbx6244@gmail.com>, Simon Xue <xxm@rock-chips.com>,
Bjorn Helgaas <bhelgaas@google.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
PCI <linux-pci@vger.kernel.org>,
devicetree <devicetree@vger.kernel.org>,
"open list:ARM/Rockchip SoC..."
<linux-rockchip@lists.infradead.org>
Subject: Re: [PATCH 2/3] dt-bindings: rockchip: Add DesignWare based PCIe controller
Date: Wed, 20 Jan 2021 16:20:03 +0000 [thread overview]
Message-ID: <0f83d344-c257-a576-ed38-8f9299047f73@arm.com> (raw)
In-Reply-To: <3792680.3daJWjYHZt@diego>
On 2021-01-20 14:54, Heiko Stübner wrote:
> Am Mittwoch, 20. Januar 2021, 15:16:25 CET schrieb Rob Herring:
>> On Tue, Jan 19, 2021 at 12:40 PM Robin Murphy <robin.murphy@arm.com> wrote:
>>>
>>> On 2021-01-19 15:11, Johan Jonker wrote:
>>>> Hi Simon, Heiko,
>>>>
>>>> On 1/19/21 2:14 PM, Heiko Stübner wrote:
>>>>> Hi Johan,
>>>>>
>>>>> Am Dienstag, 19. Januar 2021, 14:07:41 CET schrieb Johan Jonker:
>>>>>> Hi Simon,
>>>>>>
>>>>>> Thank you for this patch for rk3568 pcie.
>>>>>>
>>>>>> Include the Rockchip device tree maintainer and all other people/lists
>>>>>> to the CC list.
>>>>>>
>>>>>> ./scripts/checkpatch.pl --strict <patch1> <patch2>
>>>>>>
>>>>>> ./scripts/get_maintainer.pl --noroles --norolestats --nogit-fallback
>>>>>> --nogit <patch1> <patch2>
>>>>>>
>>>>>> git send-email --suppress-cc all --dry-run --annotate --to
>>>>>> heiko@sntech.de --cc <..> <patch1> <patch2>
>>>>>>
>>>>>> This SoC has no support in mainline linux kernel yet.
>>>>>> In all the following yaml documents for rk3568 we need headers with
>>>>>> defines for clocks and power domains, etc.
>>>>>>
>>>>>> For example:
>>>>>> #include <dt-bindings/clock/rk3568-cru.h>
>>>>>> #include <dt-bindings/power/rk3568-power.h>
>>>>>>
>>>>>> Could Rockchip submit first clocks and power drivers entries and a basic
>>>>>> rk3568.dtsi + evb dts?
>>>>>> Include a patch to this serie with 3 pcie nodes added to rk3568.dtsi.
>>>>>>
>>>>>> A dtbs_check only works with a complete dtsi and evb dts.
>>>>>>
>>>>>> make ARCH=arm64 dtbs_check
>>>>>> DT_SCHEMA_FILES=Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml
>>>>>>
>>>>>> On 1/18/21 10:17 AM, Simon Xue wrote:
>>>>>>> Signed-off-by: Simon Xue <xxm@rock-chips.com>
>>>>>>> ---
>>>>>>> .../bindings/pci/rockchip-dw-pcie.yaml | 101 ++++++++++++++++++
>>>>>>> 1 file changed, 101 insertions(+)
>>>>>>> create mode 100644 Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml
>>>>>>>
>>>>>>> diff --git a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml
>>>>>>> new file mode 100644
>>>>>>> index 000000000000..fa664cfffb29
>>>>>>> --- /dev/null
>>>>>>> +++ b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml
>>>>>>> @@ -0,0 +1,101 @@
>>>>>>> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
>>>>>>> +%YAML 1.2
>>>>>>> +---
>>>>>>> +$id: http://devicetree.org/schemas/pci/rockchip-dw-pcie.yaml#
>>>>>>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>>>>>>> +
>>>>>>> +title: DesignWare based PCIe RC controller on Rockchip SoCs
>>>>>>> +
>>>>>>
>>>>>>> +maintainers:
>>>>>>> + - Shawn Lin <shawn.lin@rock-chips.com>
>>>>>>> + - Simon Xue <xxm@rock-chips.com>
>>>>>>
>>>>>> maintainers:
>>>>>> - Heiko Stuebner <heiko@sntech.de>
>>>>>>
>>>>>> Add only people with maintainer rights.
>>>>>
>>>>> I'd disagree on this ;-)
>>>>
>>>> All roads leads to Heiko... ;)
>>>>
>>>> It takes long term commitment.
>>>> Year in, year out.
>>>> Keeping yourself up to date with the latest pcei development.
>>>> Communicate in English.
>>>> Be able to submit patches without errors... ;)
>>>> Review other peoples patches.
>>>> Respond in short time.
>>>> Bug fixing.
>>>
>>> Crikey, it's only a DT binding... :/
>>>
>>>> If that's what you really want, then you must include a patch to this
>>>> serie for MAINTAINERS.
>>>
>>> I think if Bjorn and Lorenzo want a specifically named sub-maintainer
>>> for the driver itself, we can let them say so rather than presume.
>>
>> For the binding it's my call. :)
>>
>> This should be someone who cares and knows the h/w. IOW, if I want to
>> delete the binding, someone who will object.
>>
>> Of course, I'd like that someone to have all the above qualities too.
>
> I guess that would be separate entites then ...
Yup, that's the point I was trying to clarify - binding maintainer and
driver maintainer are technically distinct roles. Of course if someone
is a driver maintainer then it's usual - and preferable - for them to
maintain the relevant bindings as well, so MAINTAINERS entries for
drivers typically also cover those for convenience and pre-schema
historical reasons. However, someone can take responsibility for a
binding without signing up to explicitly maintain a corresponding driver
(I know I have), and in that case the schema makes the binding
self-documenting already - we don't have MAINTAINERS entries that *only*
cover bindings, other than the top-level one that says Rob's in charge
overall :)
Robin.
> Shawn and Simon know the hardware way better, though I'm not sure if their
> work commitments will allow them to keep track of binding deletions
>
> So maybe all 3 of us ;-)
>
> Heiko
>
>
next prev parent reply other threads:[~2021-01-20 16:23 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-18 9:17 [PATCH 1/3] PCI: dwc: Skip allocating own MSI domain if using external MSI domain Simon Xue
2021-01-18 9:17 ` [PATCH 2/3] dt-bindings: rockchip: Add DesignWare based PCIe controller Simon Xue
2021-01-19 13:07 ` Johan Jonker
2021-01-19 13:14 ` Heiko Stübner
2021-01-19 15:11 ` Johan Jonker
2021-01-19 18:40 ` Robin Murphy
2021-01-20 14:16 ` Rob Herring
2021-01-20 14:54 ` Heiko Stübner
2021-01-20 16:20 ` Robin Murphy [this message]
2021-01-19 19:58 ` Robin Murphy
2021-01-20 10:06 ` xxm
2021-01-18 9:17 ` [PATCH 3/3] PCI: rockchip: add " Simon Xue
2021-01-19 20:28 ` Robin Murphy
2021-01-20 1:58 ` xxm
2021-01-19 19:47 ` [PATCH 1/3] PCI: dwc: Skip allocating own MSI domain if using external MSI domain Robin Murphy
2021-01-20 1:53 ` xxm
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=0f83d344-c257-a576-ed38-8f9299047f73@arm.com \
--to=robin.murphy@arm.com \
--cc=bhelgaas@google.com \
--cc=devicetree@vger.kernel.org \
--cc=heiko@sntech.de \
--cc=jbx6244@gmail.com \
--cc=linux-pci@vger.kernel.org \
--cc=linux-rockchip@lists.infradead.org \
--cc=lorenzo.pieralisi@arm.com \
--cc=robh+dt@kernel.org \
--cc=xxm@rock-chips.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox