[PATCH 0/5] PCI: make pci hotplug/rescan path to handle add_size list

[PATCH 0/5] PCI: make pci hotplug/rescan path to handle add_size list

[Yinghai Lu]

Resending.

will make hotplug path treat sriov and etc good have resources.

big change is: during allocation will try to allocation must_have plus good
 to have at same time, and then could fall back to must_have only.

Thanks

Yinghai

[PATCH 1/5] PCI : Calculate right add_size

[Yinghai Lu]

During debug one SRIOV enabled hotplug, found add_size is not passed properly.

the device have devices under two level bridges..

 +-[0000:80]-+-00.0-[81-8f]--
 |           +-01.0-[90-9f]--
 |           +-02.0-[a0-af]----00.0-[a1-a3]--+-02.0-[a2]--+-00.0  Oracle Corporation Device
 |           |                               \-03.0-[a3]--+-00.0  Oracle Corporation Device

so later parent bridge will not try to add big range.
[  557.455077] pci 0000:a0:00.0: BAR 14: assigned [mem 0xf9000000-0xf93fffff]
[  557.461974] pci 0000:a0:00.0: BAR 15: assigned [mem 0xf6000000-0xf61fffff pref]
[  557.469340] pci 0000:a1:02.0: BAR 14: assigned [mem 0xf9000000-0xf91fffff]
[  557.476231] pci 0000:a1:02.0: BAR 15: assigned [mem 0xf6000000-0xf60fffff pref]
[  557.483582] pci 0000:a1:03.0: BAR 14: assigned [mem 0xf9200000-0xf93fffff]
[  557.490468] pci 0000:a1:03.0: BAR 15: assigned [mem 0xf6100000-0xf61fffff pref]
[  557.497833] pci 0000:a1:03.0: BAR 14: can't assign mem (size 0x200000)
[  557.504378] pci 0000:a1:03.0: failed to add optional resources res=[mem 0xf9200000-0xf93fffff]
[  557.513026] pci 0000:a1:02.0: BAR 14: can't assign mem (size 0x200000)
[  557.519578] pci 0000:a1:02.0: failed to add optional resources res=[mem 0xf9000000-0xf91fffff]

it turns out We did not calculate size1 properly.

static resource_size_t calculate_memsize(resource_size_t size,
                resource_size_t min_size,
                resource_size_t size1,
                resource_size_t old_size,
                resource_size_t align)
{
        if (size < min_size)
                size = min_size;
        if (old_size == 1 )
                old_size = 0;
        if (size < old_size)
                size = old_size;
        size = ALIGN(size + size1, align);
        return size;
}

We should not pass add_size with min_size in calculate_memsize.
that will make add_size not contribute final add_size.

Just pass add_size with size1 to calculate_memsize()

With this change, We should have chance to remove extra addon in pci_reassign_resource...

Signed-off-by: Yinghai Lu <yinghai@kernel.org>

---
 drivers/pci/setup-bus.c |    4 ++--
 drivers/pci/setup-res.c |    5 +++--
 2 files changed, 5 insertions(+), 4 deletions(-)

Index: linux-2.6/drivers/pci/setup-bus.c
===================================================================
--- linux-2.6.orig/drivers/pci/setup-bus.c
+++ linux-2.6/drivers/pci/setup-bus.c
@@ -612,7 +612,7 @@ static void pbus_size_io(struct pci_bus
 	if (children_add_size > add_size)
 		add_size = children_add_size;
 	size1 = (!realloc_head || (realloc_head && !add_size)) ? size0 :
-		calculate_iosize(size, min_size+add_size, size1,
+		calculate_iosize(size, min_size, add_size + size1,
 			resource_size(b_res), 4096);
 	if (!size0 && !size1) {
 		if (b_res->start || b_res->end)
@@ -726,7 +726,7 @@ static int pbus_size_mem(struct pci_bus
 	if (children_add_size > add_size)
 		add_size = children_add_size;
 	size1 = (!realloc_head || (realloc_head && !add_size)) ? size0 :
-		calculate_memsize(size, min_size+add_size, 0,
+		calculate_memsize(size, min_size, add_size,
 				resource_size(b_res), min_align);
 	if (!size0 && !size1) {
 		if (b_res->start || b_res->end)
Index: linux-2.6/drivers/pci/setup-res.c
===================================================================
--- linux-2.6.orig/drivers/pci/setup-res.c
+++ linux-2.6/drivers/pci/setup-res.c
@@ -233,11 +233,12 @@ int pci_reassign_resource(struct pci_dev
 		return -EINVAL;
 	}
 
-	new_size = resource_size(res) + addsize + min_align;
+	/* already aligned with min_align */
+	new_size = resource_size(res) + addsize;
 	ret = _pci_assign_resource(dev, resno, new_size, min_align);
 	if (!ret) {
 		res->flags &= ~IORESOURCE_STARTALIGN;
-		dev_info(&dev->dev, "BAR %d: assigned %pR\n", resno, res);
+		dev_info(&dev->dev, "BAR %d: reassigned %pR\n", resno, res);
 		if (resno < PCI_BRIDGE_RESOURCES)
 			pci_update_resource(dev, resno);
 	}

Re: [PATCH 1/5] PCI : Calculate right add_size

[Jesse Barnes]

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On Wed,  7 Dec 2011 00:53:00 -0800
Yinghai Lu <yinghai@kernel.org> wrote:

> During debug one SRIOV enabled hotplug, found add_size is not passed properly.
> 
> the device have devices under two level bridges..
> 
>  +-[0000:80]-+-00.0-[81-8f]--
>  |           +-01.0-[90-9f]--
>  |           +-02.0-[a0-af]----00.0-[a1-a3]--+-02.0-[a2]--+-00.0  Oracle Corporation Device
>  |           |                               \-03.0-[a3]--+-00.0  Oracle Corporation Device
> 
> so later parent bridge will not try to add big range.
> [  557.455077] pci 0000:a0:00.0: BAR 14: assigned [mem 0xf9000000-0xf93fffff]
> [  557.461974] pci 0000:a0:00.0: BAR 15: assigned [mem 0xf6000000-0xf61fffff pref]
> [  557.469340] pci 0000:a1:02.0: BAR 14: assigned [mem 0xf9000000-0xf91fffff]
> [  557.476231] pci 0000:a1:02.0: BAR 15: assigned [mem 0xf6000000-0xf60fffff pref]
> [  557.483582] pci 0000:a1:03.0: BAR 14: assigned [mem 0xf9200000-0xf93fffff]
> [  557.490468] pci 0000:a1:03.0: BAR 15: assigned [mem 0xf6100000-0xf61fffff pref]
> [  557.497833] pci 0000:a1:03.0: BAR 14: can't assign mem (size 0x200000)
> [  557.504378] pci 0000:a1:03.0: failed to add optional resources res=[mem 0xf9200000-0xf93fffff]
> [  557.513026] pci 0000:a1:02.0: BAR 14: can't assign mem (size 0x200000)
> [  557.519578] pci 0000:a1:02.0: failed to add optional resources res=[mem 0xf9000000-0xf91fffff]
> 
> it turns out We did not calculate size1 properly.
> 
> static resource_size_t calculate_memsize(resource_size_t size,
>                 resource_size_t min_size,
>                 resource_size_t size1,
>                 resource_size_t old_size,
>                 resource_size_t align)
> {
>         if (size < min_size)
>                 size = min_size;
>         if (old_size == 1 )
>                 old_size = 0;
>         if (size < old_size)
>                 size = old_size;
>         size = ALIGN(size + size1, align);
>         return size;
> }
> 
> We should not pass add_size with min_size in calculate_memsize.
> that will make add_size not contribute final add_size.
> 
> Just pass add_size with size1 to calculate_memsize()
> 
> With this change, We should have chance to remove extra addon in pci_reassign_resource...

This one looks like a fairly standalone bug fix; it doesn't require
subtle changes in behavior from the later patches to work right does it?

Thanks,
-- 
Jesse Barnes, Intel Open Source Technology Center

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Re: [PATCH 1/5] PCI : Calculate right add_size

[Yinghai Lu]

On Fri, Jan 6, 2012 at 1:14 PM, Jesse Barnes <jbarnes@virtuousgeek.org> wrote:

>> We should not pass add_size with min_size in calculate_memsize.
>> that will make add_size not contribute final add_size.
>>
>> Just pass add_size with size1 to calculate_memsize()
>>
>> With this change, We should have chance to remove extra addon in pci_reassign_resource...
>
> This one looks like a fairly standalone bug fix; it doesn't require
> subtle changes in behavior from the later patches to work right does it?
>

yes.

Yinghai

[PATCH 2/5] PCI: Try to assign required+option size at first

[Yinghai Lu]

Found reassign can not find right range for one resource. even total range is enough.

bridge b1:02.0 will need 2M+3M
bridge b1:03.0 will need 2M+3M

so bridge b0:00.0 will get assigned: 4M : [f8000000-f83fffff]
   later is reassigned to 10M : [f8000000-f9ffffff]

b1:02.0 is assigned to 2M : [f8000000-f81fffff]
b1:03.0 is assigned to 2M : [f8200000-f83fffff]

after that b1:03.0 get chance to be reassigned to [f8200000-f86fffff]
but b1:02.0 will not have chance to expand, because b1:03.0 is using in middle one.

[  187.911401] pci 0000:b1:02.0: bridge window [mem 0x00100000-0x002fffff] to [bus b2-b2] add_size 300000
[  187.920764] pci 0000:b1:03.0: bridge window [mem 0x00100000-0x002fffff] to [bus b3-b3] add_size 300000
[  187.930129] pci 0000:b1:02.0: [mem 0x00100000-0x002fffff] get_res_add_size  add_size 300000
[  187.938500] pci 0000:b1:03.0: [mem 0x00100000-0x002fffff] get_res_add_size  add_size 300000
[  187.946857] pci 0000:b0:00.0: bridge window [mem 0x00100000-0x004fffff] to [bus b1-b3] add_size 600000
[  187.956206] pci 0000:b0:00.0: BAR 14: assigned [mem 0xf8000000-0xf83fffff]
[  187.963102] pci 0000:b0:00.0: BAR 15: assigned [mem 0xf5000000-0xf51fffff pref]
[  187.970434] pci 0000:b0:00.0: BAR 14: reassigned [mem 0xf8000000-0xf89fffff]
[  187.977497] pci 0000:b1:02.0: BAR 14: assigned [mem 0xf8000000-0xf81fffff]
[  187.984383] pci 0000:b1:02.0: BAR 15: assigned [mem 0xf5000000-0xf50fffff pref]
[  187.991695] pci 0000:b1:03.0: BAR 14: assigned [mem 0xf8200000-0xf83fffff]
[  187.998576] pci 0000:b1:03.0: BAR 15: assigned [mem 0xf5100000-0xf51fffff pref]
[  188.005888] pci 0000:b1:03.0: BAR 14: reassigned [mem 0xf8200000-0xf86fffff]
[  188.012939] pci 0000:b1:02.0: BAR 14: can't assign mem (size 0x200000)
[  188.019471] pci 0000:b1:02.0: failed to add 300000 to res=[mem 0xf8000000-0xf81fffff]
[  188.027326] pci 0000:b2:00.0: reg 184: [mem 0x00000000-0x00003fff 64bit]
[  188.034071] pci 0000:b2:00.0: reg 18c: [mem 0x00000000-0x000fffff 64bit]
[  188.040795] pci 0000:b2:00.0: BAR 2: assigned [mem 0xf8000000-0xf80fffff 64bit]
[  188.048119] pci 0000:b2:00.0: BAR 2: set to [mem 0xf8000000-0xf80fffff 64bit] (PCI address [0xf8000000-0xf80fffff])
[  188.058550] pci 0000:b2:00.0: BAR 6: assigned [mem 0xf5000000-0xf50fffff pref]
[  188.065802] pci 0000:b2:00.0: BAR 0: assigned [mem 0xf8100000-0xf8103fff 64bit]
[  188.073125] pci 0000:b2:00.0: BAR 0: set to [mem 0xf8100000-0xf8103fff 64bit] (PCI address [0xf8100000-0xf8103fff])
[  188.083596] pci 0000:b2:00.0: reg 18c: [mem 0x00000000-0x000fffff 64bit]
[  188.090310] pci 0000:b2:00.0: BAR 9: can't assign mem (size 0x300000)
[  188.096773] pci 0000:b2:00.0: reg 184: [mem 0x00000000-0x00003fff 64bit]
[  188.103479] pci 0000:b2:00.0: BAR 7: assigned [mem 0xf8104000-0xf810ffff 64bit]
[  188.110801] pci 0000:b2:00.0: BAR 7: set to [mem 0xf8104000-0xf810ffff 64bit] (PCI address [0xf8104000-0xf810ffff])
[  188.121256] pci 0000:b1:02.0: PCI bridge to [bus b2-b2]
[  188.126512] pci 0000:b1:02.0:   bridge window [mem 0xf8000000-0xf81fffff]
[  188.133328] pci 0000:b1:02.0:   bridge window [mem 0xf5000000-0xf50fffff pref]
[  188.140608] pci 0000:b3:00.0: reg 184: [mem 0x00000000-0x00003fff 64bit]
[  188.147341] pci 0000:b3:00.0: reg 18c: [mem 0x00000000-0x000fffff 64bit]
[  188.154076] pci 0000:b3:00.0: BAR 2: assigned [mem 0xf8200000-0xf82fffff 64bit]
[  188.161417] pci 0000:b3:00.0: BAR 2: set to [mem 0xf8200000-0xf82fffff 64bit] (PCI address [0xf8200000-0xf82fffff])
[  188.171865] pci 0000:b3:00.0: BAR 6: assigned [mem 0xf5100000-0xf51fffff pref]
[  188.179090] pci 0000:b3:00.0: BAR 0: assigned [mem 0xf8300000-0xf8303fff 64bit]
[  188.186431] pci 0000:b3:00.0: BAR 0: set to [mem 0xf8300000-0xf8303fff 64bit] (PCI address [0xf8300000-0xf8303fff])
[  188.196884] pci 0000:b3:00.0: reg 18c: [mem 0x00000000-0x000fffff 64bit]
[  188.203591] pci 0000:b3:00.0: BAR 9: assigned [mem 0xf8400000-0xf86fffff 64bit]
[  188.210909] pci 0000:b3:00.0: BAR 9: set to [mem 0xf8400000-0xf86fffff 64bit] (PCI address [0xf8400000-0xf86fffff])
[  188.221379] pci 0000:b3:00.0: reg 184: [mem 0x00000000-0x00003fff 64bit]
[  188.228089] pci 0000:b3:00.0: BAR 7: assigned [mem 0xf8304000-0xf830ffff 64bit]
[  188.235407] pci 0000:b3:00.0: BAR 7: set to [mem 0xf8304000-0xf830ffff 64bit] (PCI address [0xf8304000-0xf830ffff])
[  188.245843] pci 0000:b1:03.0: PCI bridge to [bus b3-b3]
[  188.251107] pci 0000:b1:03.0:   bridge window [mem 0xf8200000-0xf86fffff]
[  188.257922] pci 0000:b1:03.0:   bridge window [mem 0xf5100000-0xf51fffff pref]
[  188.265180] pci 0000:b0:00.0: PCI bridge to [bus b1-b3]
[  188.270443] pci 0000:b0:00.0:   bridge window [mem 0xf8000000-0xf89fffff]
[  188.277250] pci 0000:b0:00.0:   bridge window [mem 0xf5000000-0xf51fffff pref]
[  188.284512] pcieport 0000:80:02.2: PCI bridge to [bus b0-bf]
[  188.290184] pcieport 0000:80:02.2:   bridge window [io  0xa000-0xbfff]
[  188.296735] pcieport 0000:80:02.2:   bridge window [mem 0xf8000000-0xf8ffffff]
[  188.303963] pcieport 0000:80:02.2:   bridge window [mem 0xf5000000-0xf5ffffff 64bit pref]

b2:00.0 BAR 9 has not get assigned...

root cause:
b1:02.0 can not be added more range, because b1:03.0 is just after it.
not space between required ranges.

Solution:
Try to assign required + optional all together at first, and if it fails, go with required then reassign path.

Signed-off-by: Yinghai Lu <yinghai@kernel.org>

---
 drivers/pci/setup-bus.c |  113 +++++++++++++++++++++++++++++++++++++++++-------
 1 file changed, 97 insertions(+), 16 deletions(-)

Index: linux-2.6/drivers/pci/setup-bus.c
===================================================================
--- linux-2.6.orig/drivers/pci/setup-bus.c
+++ linux-2.6/drivers/pci/setup-bus.c
@@ -64,7 +64,7 @@ void pci_realloc(void)
  * @add_size:	additional size to be optionally added
  *              to the resource
  */
-static void add_to_list(struct resource_list_x *head,
+static int add_to_list(struct resource_list_x *head,
 		 struct pci_dev *dev, struct resource *res,
 		 resource_size_t add_size, resource_size_t min_align)
 {
@@ -75,7 +75,7 @@ static void add_to_list(struct resource_
 	tmp = kmalloc(sizeof(*tmp), GFP_KERNEL);
 	if (!tmp) {
 		pr_warning("add_to_list: kmalloc() failed!\n");
-		return;
+		return -ENOMEM;
 	}
 
 	tmp->next = ln;
@@ -87,6 +87,8 @@ static void add_to_list(struct resource_
 	tmp->add_size = add_size;
 	tmp->min_align = min_align;
 	list->next = tmp;
+
+	return 0;
 }
 
 static void add_to_failed_list(struct resource_list_x *head,
@@ -97,6 +99,42 @@ static void add_to_failed_list(struct re
 			0 /* dont care */);
 }
 
+static void remove_from_list(struct resource_list_x *realloc_head,
+				 struct resource *res)
+{
+	struct resource_list_x *prev, *tmp, *list;
+
+	prev = realloc_head;
+	for (list = realloc_head->next; list;) {
+		if (list->res != res) {
+			prev = list;
+			list = list->next;
+			continue;
+		}
+		tmp = list;
+		prev->next = list = list->next;
+		kfree(tmp);
+	}
+}
+
+static resource_size_t get_res_add_size(struct resource_list_x *realloc_head,
+					struct resource *res)
+{
+	struct resource_list_x *list;
+
+	/* check if it is in realloc_head list */
+	for (list = realloc_head->next; list; list = list->next) {
+		if (list->res != res)
+			continue;
+		dev_printk(KERN_DEBUG, &list->dev->dev,
+			 "%pR get_res_add_size  add_size %llx\n",
+			 list->res, (unsigned long long)list->add_size);
+		return list->add_size;
+	}
+
+	return 0;
+}
+
 static void __dev_sort_resources(struct pci_dev *dev,
 				 struct resource_list *head)
 {
@@ -221,6 +259,63 @@ static void __assign_resources_sorted(st
 				 struct resource_list_x *realloc_head,
 				 struct resource_list_x *fail_head)
 {
+	/*
+	 * Should not assign requested resources at first.
+	 *   they could be adjacent, so later reassign can not reallocate
+	 *   them one by one in parent resource window.
+	 * Try to assign requested + add_size at begining
+	 *  if could do that, could get out early.
+	 *  if could not do that, we still try to assign requested at first,
+	 *    then try to reassign add_size for some resources.
+	 */
+	struct resource_list_x save_head, local_fail_head, *list;
+	struct resource_list *l;
+
+	if (!realloc_head)
+		goto requested_and_reassign;
+
+	/* Save original start, end, flags etc */
+	save_head.next = NULL;
+	for (l = head->next; l; l = l->next)
+		if (add_to_list(&save_head, l->dev, l->res, 0, 0)) {
+			free_list(resource_list_x, &save_head);
+			goto requested_and_reassign;
+		}
+
+	/* Update res in head list with add_size in realloc_head list */
+	for (l = head->next; l; l = l->next)
+		l->res->end += get_res_add_size(realloc_head, l->res);
+
+	/* Try updated head list with add_size added */
+	local_fail_head.next = NULL;
+	assign_requested_resources_sorted(head, &local_fail_head);
+
+	/* all assigned with add_size ? */
+	if (!local_fail_head.next) {
+		/* Remove head list from realloc_head list */
+		for (l = head->next; l; l = l->next)
+			remove_from_list(realloc_head, l->res);
+		free_list(resource_list_x, &save_head);
+		free_list(resource_list, head);
+		return;
+	}
+
+	free_list(resource_list_x, &local_fail_head);
+	/* Release assigned resource */
+	for (l = head->next; l; l = l->next)
+		if (l->res->parent)
+			release_resource(l->res);
+	/* Restore start/end/flags from save list */
+	for (list = save_head.next; list; list = list->next) {
+		struct resource *res = list->res;
+
+		res->start = list->start;
+		res->end = list->end;
+		res->flags = list->flags;
+	}
+	free_list(resource_list_x, &save_head);
+
+requested_and_reassign:
 	/* Satisfy the must-have resource requests */
 	assign_requested_resources_sorted(head, fail_head);
 
@@ -548,20 +643,6 @@ static resource_size_t calculate_memsize
 	return size;
 }
 
-static resource_size_t get_res_add_size(struct resource_list_x *realloc_head,
-					struct resource *res)
-{
-	struct resource_list_x *list;
-
-	/* check if it is in realloc_head list */
-	for (list = realloc_head->next; list && list->res != res;
-			list = list->next);
-	if (list)
-		return list->add_size;
-
-	return 0;
-}
-
 /**
  * pbus_size_io() - size the io window of a given bus
  *

Re: [PATCH 2/5] PCI: Try to assign required+option size at first

[Jesse Barnes]

[-- Attachment #1: Type: text/plain, Size: 10916 bytes --]

Linus, can you please check this out too?  It seems like we're just
piling on heuristics here with code that's already pretty unreadable...

In general I like the idea of improving the resource reassignment code,
even with more heuristics, but I think we need some refactoring to make
them easier to follow.  Right now we re-use all this logic even for
simple device which seems like overkill.

Overall in looking at all this again I regret not asking for more
cleanups before it went in:
  1) resource_list_x?  really?
  2) why aren't we using list_head?
  3) realloc/fail_head don't communicate much either

Other comments below.

On Wed,  7 Dec 2011 00:53:01 -0800
Yinghai Lu <yinghai@kernel.org> wrote:

> Found reassign can not find right range for one resource. even total range is enough.
> 
> bridge b1:02.0 will need 2M+3M
> bridge b1:03.0 will need 2M+3M
> 
> so bridge b0:00.0 will get assigned: 4M : [f8000000-f83fffff]
>    later is reassigned to 10M : [f8000000-f9ffffff]
> 
> b1:02.0 is assigned to 2M : [f8000000-f81fffff]
> b1:03.0 is assigned to 2M : [f8200000-f83fffff]
> 
> after that b1:03.0 get chance to be reassigned to [f8200000-f86fffff]
> but b1:02.0 will not have chance to expand, because b1:03.0 is using in middle one.
> 
> [  187.911401] pci 0000:b1:02.0: bridge window [mem 0x00100000-0x002fffff] to [bus b2-b2] add_size 300000
> [  187.920764] pci 0000:b1:03.0: bridge window [mem 0x00100000-0x002fffff] to [bus b3-b3] add_size 300000
> [  187.930129] pci 0000:b1:02.0: [mem 0x00100000-0x002fffff] get_res_add_size  add_size 300000
> [  187.938500] pci 0000:b1:03.0: [mem 0x00100000-0x002fffff] get_res_add_size  add_size 300000
> [  187.946857] pci 0000:b0:00.0: bridge window [mem 0x00100000-0x004fffff] to [bus b1-b3] add_size 600000
> [  187.956206] pci 0000:b0:00.0: BAR 14: assigned [mem 0xf8000000-0xf83fffff]
> [  187.963102] pci 0000:b0:00.0: BAR 15: assigned [mem 0xf5000000-0xf51fffff pref]
> [  187.970434] pci 0000:b0:00.0: BAR 14: reassigned [mem 0xf8000000-0xf89fffff]
> [  187.977497] pci 0000:b1:02.0: BAR 14: assigned [mem 0xf8000000-0xf81fffff]
> [  187.984383] pci 0000:b1:02.0: BAR 15: assigned [mem 0xf5000000-0xf50fffff pref]
> [  187.991695] pci 0000:b1:03.0: BAR 14: assigned [mem 0xf8200000-0xf83fffff]
> [  187.998576] pci 0000:b1:03.0: BAR 15: assigned [mem 0xf5100000-0xf51fffff pref]
> [  188.005888] pci 0000:b1:03.0: BAR 14: reassigned [mem 0xf8200000-0xf86fffff]
> [  188.012939] pci 0000:b1:02.0: BAR 14: can't assign mem (size 0x200000)
> [  188.019471] pci 0000:b1:02.0: failed to add 300000 to res=[mem 0xf8000000-0xf81fffff]
> [  188.027326] pci 0000:b2:00.0: reg 184: [mem 0x00000000-0x00003fff 64bit]
> [  188.034071] pci 0000:b2:00.0: reg 18c: [mem 0x00000000-0x000fffff 64bit]
> [  188.040795] pci 0000:b2:00.0: BAR 2: assigned [mem 0xf8000000-0xf80fffff 64bit]
> [  188.048119] pci 0000:b2:00.0: BAR 2: set to [mem 0xf8000000-0xf80fffff 64bit] (PCI address [0xf8000000-0xf80fffff])
> [  188.058550] pci 0000:b2:00.0: BAR 6: assigned [mem 0xf5000000-0xf50fffff pref]
> [  188.065802] pci 0000:b2:00.0: BAR 0: assigned [mem 0xf8100000-0xf8103fff 64bit]
> [  188.073125] pci 0000:b2:00.0: BAR 0: set to [mem 0xf8100000-0xf8103fff 64bit] (PCI address [0xf8100000-0xf8103fff])
> [  188.083596] pci 0000:b2:00.0: reg 18c: [mem 0x00000000-0x000fffff 64bit]
> [  188.090310] pci 0000:b2:00.0: BAR 9: can't assign mem (size 0x300000)
> [  188.096773] pci 0000:b2:00.0: reg 184: [mem 0x00000000-0x00003fff 64bit]
> [  188.103479] pci 0000:b2:00.0: BAR 7: assigned [mem 0xf8104000-0xf810ffff 64bit]
> [  188.110801] pci 0000:b2:00.0: BAR 7: set to [mem 0xf8104000-0xf810ffff 64bit] (PCI address [0xf8104000-0xf810ffff])
> [  188.121256] pci 0000:b1:02.0: PCI bridge to [bus b2-b2]
> [  188.126512] pci 0000:b1:02.0:   bridge window [mem 0xf8000000-0xf81fffff]
> [  188.133328] pci 0000:b1:02.0:   bridge window [mem 0xf5000000-0xf50fffff pref]
> [  188.140608] pci 0000:b3:00.0: reg 184: [mem 0x00000000-0x00003fff 64bit]
> [  188.147341] pci 0000:b3:00.0: reg 18c: [mem 0x00000000-0x000fffff 64bit]
> [  188.154076] pci 0000:b3:00.0: BAR 2: assigned [mem 0xf8200000-0xf82fffff 64bit]
> [  188.161417] pci 0000:b3:00.0: BAR 2: set to [mem 0xf8200000-0xf82fffff 64bit] (PCI address [0xf8200000-0xf82fffff])
> [  188.171865] pci 0000:b3:00.0: BAR 6: assigned [mem 0xf5100000-0xf51fffff pref]
> [  188.179090] pci 0000:b3:00.0: BAR 0: assigned [mem 0xf8300000-0xf8303fff 64bit]
> [  188.186431] pci 0000:b3:00.0: BAR 0: set to [mem 0xf8300000-0xf8303fff 64bit] (PCI address [0xf8300000-0xf8303fff])
> [  188.196884] pci 0000:b3:00.0: reg 18c: [mem 0x00000000-0x000fffff 64bit]
> [  188.203591] pci 0000:b3:00.0: BAR 9: assigned [mem 0xf8400000-0xf86fffff 64bit]
> [  188.210909] pci 0000:b3:00.0: BAR 9: set to [mem 0xf8400000-0xf86fffff 64bit] (PCI address [0xf8400000-0xf86fffff])
> [  188.221379] pci 0000:b3:00.0: reg 184: [mem 0x00000000-0x00003fff 64bit]
> [  188.228089] pci 0000:b3:00.0: BAR 7: assigned [mem 0xf8304000-0xf830ffff 64bit]
> [  188.235407] pci 0000:b3:00.0: BAR 7: set to [mem 0xf8304000-0xf830ffff 64bit] (PCI address [0xf8304000-0xf830ffff])
> [  188.245843] pci 0000:b1:03.0: PCI bridge to [bus b3-b3]
> [  188.251107] pci 0000:b1:03.0:   bridge window [mem 0xf8200000-0xf86fffff]
> [  188.257922] pci 0000:b1:03.0:   bridge window [mem 0xf5100000-0xf51fffff pref]
> [  188.265180] pci 0000:b0:00.0: PCI bridge to [bus b1-b3]
> [  188.270443] pci 0000:b0:00.0:   bridge window [mem 0xf8000000-0xf89fffff]
> [  188.277250] pci 0000:b0:00.0:   bridge window [mem 0xf5000000-0xf51fffff pref]
> [  188.284512] pcieport 0000:80:02.2: PCI bridge to [bus b0-bf]
> [  188.290184] pcieport 0000:80:02.2:   bridge window [io  0xa000-0xbfff]
> [  188.296735] pcieport 0000:80:02.2:   bridge window [mem 0xf8000000-0xf8ffffff]
> [  188.303963] pcieport 0000:80:02.2:   bridge window [mem 0xf5000000-0xf5ffffff 64bit pref]
> 
> b2:00.0 BAR 9 has not get assigned...
> 
> root cause:
> b1:02.0 can not be added more range, because b1:03.0 is just after it.
> not space between required ranges.
> 
> Solution:
> Try to assign required + optional all together at first, and if it fails, go with required then reassign path.
> 
> Signed-off-by: Yinghai Lu <yinghai@kernel.org>
> 
> ---
>  drivers/pci/setup-bus.c |  113 +++++++++++++++++++++++++++++++++++++++++-------
>  1 file changed, 97 insertions(+), 16 deletions(-)
> 
> Index: linux-2.6/drivers/pci/setup-bus.c
> ===================================================================
> --- linux-2.6.orig/drivers/pci/setup-bus.c
> +++ linux-2.6/drivers/pci/setup-bus.c
> @@ -64,7 +64,7 @@ void pci_realloc(void)
>   * @add_size:	additional size to be optionally added
>   *              to the resource
>   */
> -static void add_to_list(struct resource_list_x *head,
> +static int add_to_list(struct resource_list_x *head,
>  		 struct pci_dev *dev, struct resource *res,
>  		 resource_size_t add_size, resource_size_t min_align)
>  {
> @@ -75,7 +75,7 @@ static void add_to_list(struct resource_
>  	tmp = kmalloc(sizeof(*tmp), GFP_KERNEL);
>  	if (!tmp) {
>  		pr_warning("add_to_list: kmalloc() failed!\n");
> -		return;
> +		return -ENOMEM;
>  	}
>  
>  	tmp->next = ln;
> @@ -87,6 +87,8 @@ static void add_to_list(struct resource_
>  	tmp->add_size = add_size;
>  	tmp->min_align = min_align;
>  	list->next = tmp;
> +
> +	return 0;
>  }

This looks like a separate bug fix; can you separate it out?  I assume
you ran into it at least once as you were adding more recursion and
occasionally not exiting it quickly. :)

At least a couple of the callers could use the return value...

> @@ -221,6 +259,63 @@ static void __assign_resources_sorted(st
>  				 struct resource_list_x *realloc_head,
>  				 struct resource_list_x *fail_head)
>  {
> +	/*
> +	 * Should not assign requested resources at first.
> +	 *   they could be adjacent, so later reassign can not reallocate
> +	 *   them one by one in parent resource window.
> +	 * Try to assign requested + add_size at begining
> +	 *  if could do that, could get out early.
> +	 *  if could not do that, we still try to assign requested at first,
> +	 *    then try to reassign add_size for some resources.
> +	 */
> +	struct resource_list_x save_head, local_fail_head, *list;
> +	struct resource_list *l;
> +
> +	if (!realloc_head)
> +		goto requested_and_reassign;

Should this also check for realloc_head existing but being empty?  Or
do we never get that case by the time we get here?

> +	/* Save original start, end, flags etc */
> +	save_head.next = NULL;
> +	for (l = head->next; l; l = l->next)
> +		if (add_to_list(&save_head, l->dev, l->res, 0, 0)) {
> +			free_list(resource_list_x, &save_head);
> +			goto requested_and_reassign;
> +		}

Maybe a small helper: copy_resource_list_x(struct resource_list_x *to,
struct resource_list *from)?  (Yay more helpful 'x' usage.)  Generally
a few small helpers would make this function a lot easier to follow...

> +
> +	/* Update res in head list with add_size in realloc_head list */
> +	for (l = head->next; l; l = l->next)
> +		l->res->end += get_res_add_size(realloc_head, l->res);

These loops might benefit from a for_each_resource_list macro (we have
lots of similar onese elsewhere in the kernel).

I also like the new get_res_add_size function better, but you moved it
and changed it at the same time and lumped it into this patch, so it
should be broken out.

> +
> +	/* Try updated head list with add_size added */
> +	local_fail_head.next = NULL;
> +	assign_requested_resources_sorted(head, &local_fail_head);
> +
> +	/* all assigned with add_size ? */
> +	if (!local_fail_head.next) {

list_empty would be slightly more readable.

> +		/* Remove head list from realloc_head list */
> +		for (l = head->next; l; l = l->next)
> +			remove_from_list(realloc_head, l->res);
> +		free_list(resource_list_x, &save_head);
> +		free_list(resource_list, head);
> +		return;
> +	}
> +
> +	free_list(resource_list_x, &local_fail_head);
> +	/* Release assigned resource */
> +	for (l = head->next; l; l = l->next)
> +		if (l->res->parent)
> +			release_resource(l->res);
> +	/* Restore start/end/flags from save list */
> +	for (list = save_head.next; list; list = list->next) {
> +		struct resource *res = list->res;
> +
> +		res->start = list->start;
> +		res->end = list->end;
> +		res->flags = list->flags;
> +	}
> +	free_list(resource_list_x, &save_head);
> +
> +requested_and_reassign:
>  	/* Satisfy the must-have resource requests */
>  	assign_requested_resources_sorted(head, fail_head);
>  
> @@ -548,20 +643,6 @@ static resource_size_t calculate_memsize
>  	return size;
>  }

Thanks,
-- 
Jesse Barnes, Intel Open Source Technology Center

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Re: [PATCH 2/5] PCI: Try to assign required+option size at first

[Yinghai Lu]

On Fri, Jan 6, 2012 at 1:49 PM, Jesse Barnes <jbarnes@virtuousgeek.org> wrote:
> Linus, can you please check this out too?  It seems like we're just
> piling on heuristics here with code that's already pretty unreadable...

related patches could be found:
http://git.kernel.org/?p=linux/kernel/git/yinghai/linux-yinghai.git;a=shortlog;h=refs/heads/for-pci

>
> In general I like the idea of improving the resource reassignment code,
> even with more heuristics, but I think we need some refactoring to make
> them easier to follow.  Right now we re-use all this logic even for
> simple device which seems like overkill.
>
> Overall in looking at all this again I regret not asking for more
> cleanups before it went in:
>  1) resource_list_x?  really?
>  2) why aren't we using list_head?

will check that later, and could address that in another patch.

>  3) realloc/fail_head don't communicate much either
>
> Other comments below.
>
> On Wed,  7 Dec 2011 00:53:01 -0800
> Yinghai Lu <yinghai@kernel.org> wrote:
>
>> Found reassign can not find right range for one resource. even total range is enough.
>>
>> bridge b1:02.0 will need 2M+3M
>> bridge b1:03.0 will need 2M+3M
>>
>> so bridge b0:00.0 will get assigned: 4M : [f8000000-f83fffff]
>>    later is reassigned to 10M : [f8000000-f9ffffff]
>>
>> b1:02.0 is assigned to 2M : [f8000000-f81fffff]
>> b1:03.0 is assigned to 2M : [f8200000-f83fffff]
>>
>> after that b1:03.0 get chance to be reassigned to [f8200000-f86fffff]
>> but b1:02.0 will not have chance to expand, because b1:03.0 is using in middle one.
>>
>> [  187.911401] pci 0000:b1:02.0: bridge window [mem 0x00100000-0x002fffff] to [bus b2-b2] add_size 300000
>> [  187.920764] pci 0000:b1:03.0: bridge window [mem 0x00100000-0x002fffff] to [bus b3-b3] add_size 300000
>> [  187.930129] pci 0000:b1:02.0: [mem 0x00100000-0x002fffff] get_res_add_size  add_size 300000
>> [  187.938500] pci 0000:b1:03.0: [mem 0x00100000-0x002fffff] get_res_add_size  add_size 300000
>> [  187.946857] pci 0000:b0:00.0: bridge window [mem 0x00100000-0x004fffff] to [bus b1-b3] add_size 600000
>> [  187.956206] pci 0000:b0:00.0: BAR 14: assigned [mem 0xf8000000-0xf83fffff]
>> [  187.963102] pci 0000:b0:00.0: BAR 15: assigned [mem 0xf5000000-0xf51fffff pref]
>> [  187.970434] pci 0000:b0:00.0: BAR 14: reassigned [mem 0xf8000000-0xf89fffff]
>> [  187.977497] pci 0000:b1:02.0: BAR 14: assigned [mem 0xf8000000-0xf81fffff]
>> [  187.984383] pci 0000:b1:02.0: BAR 15: assigned [mem 0xf5000000-0xf50fffff pref]
>> [  187.991695] pci 0000:b1:03.0: BAR 14: assigned [mem 0xf8200000-0xf83fffff]
>> [  187.998576] pci 0000:b1:03.0: BAR 15: assigned [mem 0xf5100000-0xf51fffff pref]
>> [  188.005888] pci 0000:b1:03.0: BAR 14: reassigned [mem 0xf8200000-0xf86fffff]
>> [  188.012939] pci 0000:b1:02.0: BAR 14: can't assign mem (size 0x200000)
>> [  188.019471] pci 0000:b1:02.0: failed to add 300000 to res=[mem 0xf8000000-0xf81fffff]
>> [  188.027326] pci 0000:b2:00.0: reg 184: [mem 0x00000000-0x00003fff 64bit]
>> [  188.034071] pci 0000:b2:00.0: reg 18c: [mem 0x00000000-0x000fffff 64bit]
>> [  188.040795] pci 0000:b2:00.0: BAR 2: assigned [mem 0xf8000000-0xf80fffff 64bit]
>> [  188.048119] pci 0000:b2:00.0: BAR 2: set to [mem 0xf8000000-0xf80fffff 64bit] (PCI address [0xf8000000-0xf80fffff])
>> [  188.058550] pci 0000:b2:00.0: BAR 6: assigned [mem 0xf5000000-0xf50fffff pref]
>> [  188.065802] pci 0000:b2:00.0: BAR 0: assigned [mem 0xf8100000-0xf8103fff 64bit]
>> [  188.073125] pci 0000:b2:00.0: BAR 0: set to [mem 0xf8100000-0xf8103fff 64bit] (PCI address [0xf8100000-0xf8103fff])
>> [  188.083596] pci 0000:b2:00.0: reg 18c: [mem 0x00000000-0x000fffff 64bit]
>> [  188.090310] pci 0000:b2:00.0: BAR 9: can't assign mem (size 0x300000)
>> [  188.096773] pci 0000:b2:00.0: reg 184: [mem 0x00000000-0x00003fff 64bit]
>> [  188.103479] pci 0000:b2:00.0: BAR 7: assigned [mem 0xf8104000-0xf810ffff 64bit]
>> [  188.110801] pci 0000:b2:00.0: BAR 7: set to [mem 0xf8104000-0xf810ffff 64bit] (PCI address [0xf8104000-0xf810ffff])
>> [  188.121256] pci 0000:b1:02.0: PCI bridge to [bus b2-b2]
>> [  188.126512] pci 0000:b1:02.0:   bridge window [mem 0xf8000000-0xf81fffff]
>> [  188.133328] pci 0000:b1:02.0:   bridge window [mem 0xf5000000-0xf50fffff pref]
>> [  188.140608] pci 0000:b3:00.0: reg 184: [mem 0x00000000-0x00003fff 64bit]
>> [  188.147341] pci 0000:b3:00.0: reg 18c: [mem 0x00000000-0x000fffff 64bit]
>> [  188.154076] pci 0000:b3:00.0: BAR 2: assigned [mem 0xf8200000-0xf82fffff 64bit]
>> [  188.161417] pci 0000:b3:00.0: BAR 2: set to [mem 0xf8200000-0xf82fffff 64bit] (PCI address [0xf8200000-0xf82fffff])
>> [  188.171865] pci 0000:b3:00.0: BAR 6: assigned [mem 0xf5100000-0xf51fffff pref]
>> [  188.179090] pci 0000:b3:00.0: BAR 0: assigned [mem 0xf8300000-0xf8303fff 64bit]
>> [  188.186431] pci 0000:b3:00.0: BAR 0: set to [mem 0xf8300000-0xf8303fff 64bit] (PCI address [0xf8300000-0xf8303fff])
>> [  188.196884] pci 0000:b3:00.0: reg 18c: [mem 0x00000000-0x000fffff 64bit]
>> [  188.203591] pci 0000:b3:00.0: BAR 9: assigned [mem 0xf8400000-0xf86fffff 64bit]
>> [  188.210909] pci 0000:b3:00.0: BAR 9: set to [mem 0xf8400000-0xf86fffff 64bit] (PCI address [0xf8400000-0xf86fffff])
>> [  188.221379] pci 0000:b3:00.0: reg 184: [mem 0x00000000-0x00003fff 64bit]
>> [  188.228089] pci 0000:b3:00.0: BAR 7: assigned [mem 0xf8304000-0xf830ffff 64bit]
>> [  188.235407] pci 0000:b3:00.0: BAR 7: set to [mem 0xf8304000-0xf830ffff 64bit] (PCI address [0xf8304000-0xf830ffff])
>> [  188.245843] pci 0000:b1:03.0: PCI bridge to [bus b3-b3]
>> [  188.251107] pci 0000:b1:03.0:   bridge window [mem 0xf8200000-0xf86fffff]
>> [  188.257922] pci 0000:b1:03.0:   bridge window [mem 0xf5100000-0xf51fffff pref]
>> [  188.265180] pci 0000:b0:00.0: PCI bridge to [bus b1-b3]
>> [  188.270443] pci 0000:b0:00.0:   bridge window [mem 0xf8000000-0xf89fffff]
>> [  188.277250] pci 0000:b0:00.0:   bridge window [mem 0xf5000000-0xf51fffff pref]
>> [  188.284512] pcieport 0000:80:02.2: PCI bridge to [bus b0-bf]
>> [  188.290184] pcieport 0000:80:02.2:   bridge window [io  0xa000-0xbfff]
>> [  188.296735] pcieport 0000:80:02.2:   bridge window [mem 0xf8000000-0xf8ffffff]
>> [  188.303963] pcieport 0000:80:02.2:   bridge window [mem 0xf5000000-0xf5ffffff 64bit pref]
>>
>> b2:00.0 BAR 9 has not get assigned...
>>
>> root cause:
>> b1:02.0 can not be added more range, because b1:03.0 is just after it.
>> not space between required ranges.
>>
>> Solution:
>> Try to assign required + optional all together at first, and if it fails, go with required then reassign path.
>>
>> Signed-off-by: Yinghai Lu <yinghai@kernel.org>
>>
>> ---
>>  drivers/pci/setup-bus.c |  113 +++++++++++++++++++++++++++++++++++++++++-------
>>  1 file changed, 97 insertions(+), 16 deletions(-)
>>
>> Index: linux-2.6/drivers/pci/setup-bus.c
>> ===================================================================
>> --- linux-2.6.orig/drivers/pci/setup-bus.c
>> +++ linux-2.6/drivers/pci/setup-bus.c
>> @@ -64,7 +64,7 @@ void pci_realloc(void)
>>   * @add_size:        additional size to be optionally added
>>   *              to the resource
>>   */
>> -static void add_to_list(struct resource_list_x *head,
>> +static int add_to_list(struct resource_list_x *head,
>>                struct pci_dev *dev, struct resource *res,
>>                resource_size_t add_size, resource_size_t min_align)
>>  {
>> @@ -75,7 +75,7 @@ static void add_to_list(struct resource_
>>       tmp = kmalloc(sizeof(*tmp), GFP_KERNEL);
>>       if (!tmp) {
>>               pr_warning("add_to_list: kmalloc() failed!\n");
>> -             return;
>> +             return -ENOMEM;
>>       }
>>
>>       tmp->next = ln;
>> @@ -87,6 +87,8 @@ static void add_to_list(struct resource_
>>       tmp->add_size = add_size;
>>       tmp->min_align = min_align;
>>       list->next = tmp;
>> +
>> +     return 0;
>>  }
>
> This looks like a separate bug fix; can you separate it out?  I assume
> you ran into it at least once as you were adding more recursion and
> occasionally not exiting it quickly. :)

ok, will separate that to another patch.

>
> At least a couple of the callers could use the return value...
>
>> @@ -221,6 +259,63 @@ static void __assign_resources_sorted(st
>>                                struct resource_list_x *realloc_head,
>>                                struct resource_list_x *fail_head)
>>  {
>> +     /*
>> +      * Should not assign requested resources at first.
>> +      *   they could be adjacent, so later reassign can not reallocate
>> +      *   them one by one in parent resource window.
>> +      * Try to assign requested + add_size at begining
>> +      *  if could do that, could get out early.
>> +      *  if could not do that, we still try to assign requested at first,
>> +      *    then try to reassign add_size for some resources.
>> +      */
>> +     struct resource_list_x save_head, local_fail_head, *list;
>> +     struct resource_list *l;
>> +
>> +     if (!realloc_head)
>> +             goto requested_and_reassign;
>
> Should this also check for realloc_head existing but being empty?  Or
> do we never get that case by the time we get here?

yes, will add that check.

>
>> +     /* Save original start, end, flags etc */
>> +     save_head.next = NULL;
>> +     for (l = head->next; l; l = l->next)
>> +             if (add_to_list(&save_head, l->dev, l->res, 0, 0)) {
>> +                     free_list(resource_list_x, &save_head);
>> +                     goto requested_and_reassign;
>> +             }
>
> Maybe a small helper: copy_resource_list_x(struct resource_list_x *to,
> struct resource_list *from)?  (Yay more helpful 'x' usage.)  Generally
> a few small helpers would make this function a lot easier to follow...

ok, will add that helper.

>
>> +
>> +     /* Update res in head list with add_size in realloc_head list */
>> +     for (l = head->next; l; l = l->next)
>> +             l->res->end += get_res_add_size(realloc_head, l->res);
>
> These loops might benefit from a for_each_resource_list macro (we have
> lots of similar onese elsewhere in the kernel).
>
> I also like the new get_res_add_size function better, but you moved it
> and changed it at the same time and lumped it into this patch, so it
> should be broken out.

ok, will break out get_res_add_size moving to another patch.

>
>> +
>> +     /* Try updated head list with add_size added */
>> +     local_fail_head.next = NULL;
>> +     assign_requested_resources_sorted(head, &local_fail_head);
>> +
>> +     /* all assigned with add_size ? */
>> +     if (!local_fail_head.next) {
>
> list_empty would be slightly more readable.

later after change resource_list_x to regular list...

Thanks

Yinghai

Re: [PATCH 2/5] PCI: Try to assign required+option size at first

[Yinghai Lu]

On Fri, Jan 6, 2012 at 7:46 PM, Yinghai Lu <yinghai@kernel.org> wrote:
>> This looks like a separate bug fix; can you separate it out?  I assume
>> you ran into it at least once as you were adding more recursion and
>> occasionally not exiting it quickly. :)

hi,  the patch has been separated into three patches.

please check attached.

please let me know if you like me to resend the whole patch set.

Thanks

Yinghai Lu

Re: [PATCH 2/5] PCI: Try to assign required+option size at first

[Yinghai Lu]

[-- Attachment #1: Type: text/plain, Size: 530 bytes --]

On Fri, Jan 6, 2012 at 9:51 PM, Yinghai Lu <yinghai@kernel.org> wrote:
> On Fri, Jan 6, 2012 at 7:46 PM, Yinghai Lu <yinghai@kernel.org> wrote:
>>> This looks like a separate bug fix; can you separate it out?  I assume
>>> you ran into it at least once as you were adding more recursion and
>>> occasionally not exiting it quickly. :)
>
> hi,  the patch has been separated into three patches.
>
> please check attached.
>
> please let me know if you like me to resend the whole patch set.
>
> Thanks
>
> Yinghai Lu

[-- Attachment #2: pci_003_fix_reassign_fail_1.patch --]
[-- Type: text/x-patch, Size: 1309 bytes --]

Subject: [PATCH 2/5 -1] PCI: Make add_to_list() return status

will be used for resource_list_x duplication for try requested+optional at first.

Signed-off-by: Yinghai Lu <yinghai@kernel.org>

---
 drivers/pci/setup-bus.c |  113 +++++++++++++++++++++++++++++++++++++++++-------
 1 file changed, 97 insertions(+), 16 deletions(-)

Index: linux-2.6/drivers/pci/setup-bus.c
===================================================================
--- linux-2.6.orig/drivers/pci/setup-bus.c
+++ linux-2.6/drivers/pci/setup-bus.c
@@ -64,7 +64,7 @@ void pci_realloc(void)
  * @add_size:	additional size to be optionally added
  *              to the resource
  */
-static void add_to_list(struct resource_list_x *head,
+static int add_to_list(struct resource_list_x *head,
 		 struct pci_dev *dev, struct resource *res,
 		 resource_size_t add_size, resource_size_t min_align)
 {
@@ -75,7 +75,7 @@ static void add_to_list(struct resource_
 	tmp = kmalloc(sizeof(*tmp), GFP_KERNEL);
 	if (!tmp) {
 		pr_warning("add_to_list: kmalloc() failed!\n");
-		return;
+		return -ENOMEM;
 	}
 
 	tmp->next = ln;
@@ -87,6 +87,8 @@ static void add_to_list(struct resource_
 	tmp->add_size = add_size;
 	tmp->min_align = min_align;
 	list->next = tmp;
+
+	return 0;
 }
 
 static void add_to_failed_list(struct resource_list_x *head,

[-- Attachment #3: pci_003_fix_reassign_fail_2.patch --]
[-- Type: text/x-patch, Size: 1462 bytes --]

Subject: [PATCH 2/5 -2] PCI: Move get_res_add_size() early

Need to call it from __assign_resources_sorted() later.

Signed-off-by: Yinghai Lu <yinghai@kernel.org>

---
 drivers/pci/setup-bus.c |   29 +++++++++++++++--------------
 1 file changed, 15 insertions(+), 14 deletions(-)

Index: linux-2.6/drivers/pci/setup-bus.c
===================================================================
--- linux-2.6.orig/drivers/pci/setup-bus.c
+++ linux-2.6/drivers/pci/setup-bus.c
@@ -99,6 +99,21 @@ static void add_to_failed_list(struct re
 			0 /* dont care */);
 }
 
+static resource_size_t get_res_add_size(struct resource_list_x *realloc_head,
+					struct resource *res)
+{
+	struct resource_list_x *list;
+
+	/* check if it is in realloc_head list */
+	for (list = realloc_head->next; list && list->res != res;
+			list = list->next)
+		;
+	if (list)
+		return list->add_size;
+
+	return 0;
+}
+
 static void __dev_sort_resources(struct pci_dev *dev,
 				 struct resource_list *head)
 {
@@ -550,20 +565,6 @@ static resource_size_t calculate_memsize
 	return size;
 }
 
-static resource_size_t get_res_add_size(struct resource_list_x *realloc_head,
-					struct resource *res)
-{
-	struct resource_list_x *list;
-
-	/* check if it is in realloc_head list */
-	for (list = realloc_head->next; list && list->res != res;
-			list = list->next);
-	if (list)
-		return list->add_size;
-
-	return 0;
-}
-
 /**
  * pbus_size_io() - size the io window of a given bus
  *

[-- Attachment #4: pci_003_fix_reassign_fail_3.patch --]
[-- Type: text/x-patch, Size: 9173 bytes --]

Subject: [PATCH 2/5 -3] PCI: Try to assign required+option size at first

Found reassign can not find right range for one resource. even total range is enough.

bridge b1:02.0 will need 2M+3M
bridge b1:03.0 will need 2M+3M

so bridge b0:00.0 will get assigned: 4M : [f8000000-f83fffff]
   later is reassigned to 10M : [f8000000-f9ffffff]

b1:02.0 is assigned to 2M : [f8000000-f81fffff]
b1:03.0 is assigned to 2M : [f8200000-f83fffff]

after that b1:03.0 get chance to be reassigned to [f8200000-f86fffff]
but b1:02.0 will not have chance to expand, because b1:03.0 is using in middle one.

[  187.911401] pci 0000:b1:02.0: bridge window [mem 0x00100000-0x002fffff] to [bus b2-b2] add_size 300000
[  187.920764] pci 0000:b1:03.0: bridge window [mem 0x00100000-0x002fffff] to [bus b3-b3] add_size 300000
[  187.930129] pci 0000:b1:02.0: [mem 0x00100000-0x002fffff] get_res_add_size  add_size 300000
[  187.938500] pci 0000:b1:03.0: [mem 0x00100000-0x002fffff] get_res_add_size  add_size 300000
[  187.946857] pci 0000:b0:00.0: bridge window [mem 0x00100000-0x004fffff] to [bus b1-b3] add_size 600000
[  187.956206] pci 0000:b0:00.0: BAR 14: assigned [mem 0xf8000000-0xf83fffff]
[  187.963102] pci 0000:b0:00.0: BAR 15: assigned [mem 0xf5000000-0xf51fffff pref]
[  187.970434] pci 0000:b0:00.0: BAR 14: reassigned [mem 0xf8000000-0xf89fffff]
[  187.977497] pci 0000:b1:02.0: BAR 14: assigned [mem 0xf8000000-0xf81fffff]
[  187.984383] pci 0000:b1:02.0: BAR 15: assigned [mem 0xf5000000-0xf50fffff pref]
[  187.991695] pci 0000:b1:03.0: BAR 14: assigned [mem 0xf8200000-0xf83fffff]
[  187.998576] pci 0000:b1:03.0: BAR 15: assigned [mem 0xf5100000-0xf51fffff pref]
[  188.005888] pci 0000:b1:03.0: BAR 14: reassigned [mem 0xf8200000-0xf86fffff]
[  188.012939] pci 0000:b1:02.0: BAR 14: can't assign mem (size 0x200000)
[  188.019471] pci 0000:b1:02.0: failed to add 300000 to res=[mem 0xf8000000-0xf81fffff]
[  188.027326] pci 0000:b2:00.0: reg 184: [mem 0x00000000-0x00003fff 64bit]
[  188.034071] pci 0000:b2:00.0: reg 18c: [mem 0x00000000-0x000fffff 64bit]
[  188.040795] pci 0000:b2:00.0: BAR 2: assigned [mem 0xf8000000-0xf80fffff 64bit]
[  188.048119] pci 0000:b2:00.0: BAR 2: set to [mem 0xf8000000-0xf80fffff 64bit] (PCI address [0xf8000000-0xf80fffff])
[  188.058550] pci 0000:b2:00.0: BAR 6: assigned [mem 0xf5000000-0xf50fffff pref]
[  188.065802] pci 0000:b2:00.0: BAR 0: assigned [mem 0xf8100000-0xf8103fff 64bit]
[  188.073125] pci 0000:b2:00.0: BAR 0: set to [mem 0xf8100000-0xf8103fff 64bit] (PCI address [0xf8100000-0xf8103fff])
[  188.083596] pci 0000:b2:00.0: reg 18c: [mem 0x00000000-0x000fffff 64bit]
[  188.090310] pci 0000:b2:00.0: BAR 9: can't assign mem (size 0x300000)
[  188.096773] pci 0000:b2:00.0: reg 184: [mem 0x00000000-0x00003fff 64bit]
[  188.103479] pci 0000:b2:00.0: BAR 7: assigned [mem 0xf8104000-0xf810ffff 64bit]
[  188.110801] pci 0000:b2:00.0: BAR 7: set to [mem 0xf8104000-0xf810ffff 64bit] (PCI address [0xf8104000-0xf810ffff])
[  188.121256] pci 0000:b1:02.0: PCI bridge to [bus b2-b2]
[  188.126512] pci 0000:b1:02.0:   bridge window [mem 0xf8000000-0xf81fffff]
[  188.133328] pci 0000:b1:02.0:   bridge window [mem 0xf5000000-0xf50fffff pref]
[  188.140608] pci 0000:b3:00.0: reg 184: [mem 0x00000000-0x00003fff 64bit]
[  188.147341] pci 0000:b3:00.0: reg 18c: [mem 0x00000000-0x000fffff 64bit]
[  188.154076] pci 0000:b3:00.0: BAR 2: assigned [mem 0xf8200000-0xf82fffff 64bit]
[  188.161417] pci 0000:b3:00.0: BAR 2: set to [mem 0xf8200000-0xf82fffff 64bit] (PCI address [0xf8200000-0xf82fffff])
[  188.171865] pci 0000:b3:00.0: BAR 6: assigned [mem 0xf5100000-0xf51fffff pref]
[  188.179090] pci 0000:b3:00.0: BAR 0: assigned [mem 0xf8300000-0xf8303fff 64bit]
[  188.186431] pci 0000:b3:00.0: BAR 0: set to [mem 0xf8300000-0xf8303fff 64bit] (PCI address [0xf8300000-0xf8303fff])
[  188.196884] pci 0000:b3:00.0: reg 18c: [mem 0x00000000-0x000fffff 64bit]
[  188.203591] pci 0000:b3:00.0: BAR 9: assigned [mem 0xf8400000-0xf86fffff 64bit]
[  188.210909] pci 0000:b3:00.0: BAR 9: set to [mem 0xf8400000-0xf86fffff 64bit] (PCI address [0xf8400000-0xf86fffff])
[  188.221379] pci 0000:b3:00.0: reg 184: [mem 0x00000000-0x00003fff 64bit]
[  188.228089] pci 0000:b3:00.0: BAR 7: assigned [mem 0xf8304000-0xf830ffff 64bit]
[  188.235407] pci 0000:b3:00.0: BAR 7: set to [mem 0xf8304000-0xf830ffff 64bit] (PCI address [0xf8304000-0xf830ffff])
[  188.245843] pci 0000:b1:03.0: PCI bridge to [bus b3-b3]
[  188.251107] pci 0000:b1:03.0:   bridge window [mem 0xf8200000-0xf86fffff]
[  188.257922] pci 0000:b1:03.0:   bridge window [mem 0xf5100000-0xf51fffff pref]
[  188.265180] pci 0000:b0:00.0: PCI bridge to [bus b1-b3]
[  188.270443] pci 0000:b0:00.0:   bridge window [mem 0xf8000000-0xf89fffff]
[  188.277250] pci 0000:b0:00.0:   bridge window [mem 0xf5000000-0xf51fffff pref]
[  188.284512] pcieport 0000:80:02.2: PCI bridge to [bus b0-bf]
[  188.290184] pcieport 0000:80:02.2:   bridge window [io  0xa000-0xbfff]
[  188.296735] pcieport 0000:80:02.2:   bridge window [mem 0xf8000000-0xf8ffffff]
[  188.303963] pcieport 0000:80:02.2:   bridge window [mem 0xf5000000-0xf5ffffff 64bit pref]

b2:00.0 BAR 9 has not get assigned...

root cause:
b1:02.0 can not be added more range, because b1:03.0 is just after it.
not space between required ranges.

Solution:
Try to assign required + optional all together at first, and if it fails, go with required then reassign path.

-v2: seperate add_to_list change() to another patch according to Jesse.
     seperate get_res_add_size() moving to another patch according to Jesse.
     add !realloc_head->next check if the list is empty to bail early according to Jesse.

Signed-off-by: Yinghai Lu <yinghai@kernel.org>

---
 drivers/pci/setup-bus.c |   83 +++++++++++++++++++++++++++++++++++++++++++++++-
 1 file changed, 82 insertions(+), 1 deletion(-)

Index: linux-2.6/drivers/pci/setup-bus.c
===================================================================
--- linux-2.6.orig/drivers/pci/setup-bus.c
+++ linux-2.6/drivers/pci/setup-bus.c
@@ -99,6 +99,24 @@ static void add_to_failed_list(struct re
 			0 /* dont care */);
 }
 
+static void remove_from_list(struct resource_list_x *realloc_head,
+				 struct resource *res)
+{
+	struct resource_list_x *prev, *tmp, *list;
+
+	prev = realloc_head;
+	for (list = realloc_head->next; list;) {
+		if (list->res != res) {
+			prev = list;
+			list = list->next;
+			continue;
+		}
+		tmp = list;
+		prev->next = list = list->next;
+		kfree(tmp);
+	}
+}
+
 static resource_size_t get_res_add_size(struct resource_list_x *realloc_head,
 					struct resource *res)
 {
@@ -108,8 +126,13 @@ static resource_size_t get_res_add_size(
 	for (list = realloc_head->next; list && list->res != res;
 			list = list->next)
 		;
-	if (list)
+
+	if (list) {
+		dev_printk(KERN_DEBUG, &list->dev->dev,
+			 "%pR get_res_add_size  add_size %llx\n",
+			 list->res, (unsigned long long)list->add_size);
 		return list->add_size;
+	}
 
 	return 0;
 }
@@ -238,6 +261,64 @@ static void __assign_resources_sorted(st
 				 struct resource_list_x *realloc_head,
 				 struct resource_list_x *fail_head)
 {
+	/*
+	 * Should not assign requested resources at first.
+	 *   they could be adjacent, so later reassign can not reallocate
+	 *   them one by one in parent resource window.
+	 * Try to assign requested + add_size at begining
+	 *  if could do that, could get out early.
+	 *  if could not do that, we still try to assign requested at first,
+	 *    then try to reassign add_size for some resources.
+	 */
+	struct resource_list_x save_head, local_fail_head, *list;
+	struct resource_list *l;
+
+	/* Check if optional add_size is there */
+	if (!realloc_head || !realloc_head->next)
+		goto requested_and_reassign;
+
+	/* Save original start, end, flags etc at first */
+	save_head.next = NULL;
+	for (l = head->next; l; l = l->next)
+		if (add_to_list(&save_head, l->dev, l->res, 0, 0)) {
+			free_list(resource_list_x, &save_head);
+			goto requested_and_reassign;
+		}
+
+	/* Update res in head list with add_size in realloc_head list */
+	for (l = head->next; l; l = l->next)
+		l->res->end += get_res_add_size(realloc_head, l->res);
+
+	/* Try updated head list with add_size added */
+	local_fail_head.next = NULL;
+	assign_requested_resources_sorted(head, &local_fail_head);
+
+	/* all assigned with add_size ? */
+	if (!local_fail_head.next) {
+		/* Remove head list from realloc_head list */
+		for (l = head->next; l; l = l->next)
+			remove_from_list(realloc_head, l->res);
+		free_list(resource_list_x, &save_head);
+		free_list(resource_list, head);
+		return;
+	}
+
+	free_list(resource_list_x, &local_fail_head);
+	/* Release assigned resource */
+	for (l = head->next; l; l = l->next)
+		if (l->res->parent)
+			release_resource(l->res);
+	/* Restore start/end/flags from saved list */
+	for (list = save_head.next; list; list = list->next) {
+		struct resource *res = list->res;
+
+		res->start = list->start;
+		res->end = list->end;
+		res->flags = list->flags;
+	}
+	free_list(resource_list_x, &save_head);
+
+requested_and_reassign:
 	/* Satisfy the must-have resource requests */
 	assign_requested_resources_sorted(head, fail_head);
 

Re: [PATCH 2/5] PCI: Try to assign required+option size at first

[Yinghai Lu]

On Fri, Jan 6, 2012 at 9:53 PM, Yinghai Lu <yinghai@kernel.org> wrote:
> On Fri, Jan 6, 2012 at 9:51 PM, Yinghai Lu <yinghai@kernel.org> wrote:
>> On Fri, Jan 6, 2012 at 7:46 PM, Yinghai Lu <yinghai@kernel.org> wrote:
>>>> This looks like a separate bug fix; can you separate it out?  I assume
>>>> you ran into it at least once as you were adding more recursion and
>>>> occasionally not exiting it quickly. :)
>>
>> hi,  the patch has been separated into three patches.
>>
>> please check attached.
>>
>> please let me know if you like me to resend the whole patch set.

just rebase my for-pci branch. please check them at

git://git.kernel.org/pub/scm/linux/kernel/git/yinghai/linux-yinghai.git for-pci

5007278: pciehp: Checking pci conf reading to new added device instead
of sleep 1s
f390f69: PCI: Make sriov work with hotplug remove
93acbd6: PCI: Fixing multiple retrying with pci resource optional
resources allocation under multi bridges
7f5dac3: PCI: Make pci_rescan_bus handle add_list
18dd9be: PCI: Make rescan bus could increase bridge resource size if needed
52e0afc: PCI: Using add_list in pcie hotplug path.
2b6542d: PCI: Try to assign required+option size at first
4beb962: PCI: Move get_res_add_size() early
8cb9020: PCI: Make add_to_list() return status
8535f21: PCI : Calculate right add_size

after those patches get into your tree, I will try do clean up as
linus pointed in another mail.

Thanks

Yinghai

Re: [PATCH 2/5] PCI: Try to assign required+option size at first

[Linus Torvalds]

On Fri, Jan 6, 2012 at 1:49 PM, Jesse Barnes <jbarnes@virtuousgeek.org> wrote:
>
> Overall in looking at all this again I regret not asking for more
> cleanups before it went in:
>  1) resource_list_x?  really?
>  2) why aren't we using list_head?

Ugh. It's an abomination based on the 'struct resource_list' that
exists in <linux/ioport.h>. Which also has just a "next" pointer.

But that should actually be entirely private to
drivers/pci/setup-bus.c, except it is *also* used by
drivers/pci/setup-res.c: pdev_sort_resources().

I suspect that it would be a good idea to clean this up by

 (a) moving that pdev_sort_resources() to setup-bus.c (only user) and
making it static, and removing the declaration for <linux/pci.h>

 (b) moving 'struct resource_list' to also be local to setup-bus.c

 (c) just extending the resource_list with the few extra firlds that
'struct resource_list_x' has now, and getting rid of the stupid _x
version.

 (d) make it use 'struct list_head'. This patch adds those
'remove_from_list()' helpers exactly because the code isn't using the
list_head, so it does the stupid "walk the singly linked list to find
the entry" and as far as I can tell, it does it *wrong* (first entry
case?).

All of those cleanups are independent of this particular patch,
though, so should not be mixed up with this. They all look entirely
mechanical, though. And getting rid of that totally broken
"remove_from_list()" would be good (but requires that you do the
list_head cleanup first).

I dunno. It doesn't look all that horrible apart from the fairly
cosmetic issues, though.

                      Linus

Re: [PATCH 2/5] PCI: Try to assign required+option size at first

[Yinghai Lu]

[-- Attachment #1: Type: text/plain, Size: 2045 bytes --]

On Fri, Jan 6, 2012 at 8:49 PM, Linus Torvalds
<torvalds@linux-foundation.org> wrote:
> On Fri, Jan 6, 2012 at 1:49 PM, Jesse Barnes <jbarnes@virtuousgeek.org> wrote:
>>
>> Overall in looking at all this again I regret not asking for more
>> cleanups before it went in:
>>  1) resource_list_x?  really?
>>  2) why aren't we using list_head?
>
> Ugh. It's an abomination based on the 'struct resource_list' that
> exists in <linux/ioport.h>. Which also has just a "next" pointer.
>
> But that should actually be entirely private to
> drivers/pci/setup-bus.c, except it is *also* used by
> drivers/pci/setup-res.c: pdev_sort_resources().
>
> I suspect that it would be a good idea to clean this up by
>
>  (a) moving that pdev_sort_resources() to setup-bus.c (only user) and
> making it static, and removing the declaration for <linux/pci.h>
>
>  (b) moving 'struct resource_list' to also be local to setup-bus.c
>
>  (c) just extending the resource_list with the few extra firlds that
> 'struct resource_list_x' has now, and getting rid of the stupid _x
> version.
>
>  (d) make it use 'struct list_head'. This patch adds those
> 'remove_from_list()' helpers exactly because the code isn't using the
> list_head, so it does the stupid "walk the singly linked list to find
> the entry" and as far as I can tell, it does it *wrong* (first entry
> case?).
>
> All of those cleanups are independent of this particular patch,
> though, so should not be mixed up with this. They all look entirely
> mechanical, though. And getting rid of that totally broken
> "remove_from_list()" would be good (but requires that you do the
> list_head cleanup first).
>

Spent some time today, try to produce some patches according to your direction.

Please check them to see if it is with your thoughts.

Need to apply on top of patches i sent recently.

	git://git.kernel.org/pub/scm/linux/kernel/git/yinghai/linux-yinghai.git for-pci

Later will merge pci_dev_resource and pci_dev_resource_x.

Thanks

Yinghai

[-- Attachment #2: move_resource_list.patch --]
[-- Type: text/x-patch, Size: 4698 bytes --]

Subject: [PATCH 1/3] PCI: move resource_list to setup-bus.c

move pdev_sort_resources() from setup_res.c to setup_bus.c

So we don't need to declare resource_list struct out of setup_bus.c

later could convert resource_list to regular list.

Suggested-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Yinghai Lu <yinghai@kernel.org>

---
 drivers/pci/setup-bus.c |   52 ++++++++++++++++++++++++++++++++++++++++++++++++
 drivers/pci/setup-res.c |   47 -------------------------------------------
 include/linux/ioport.h  |    6 -----
 include/linux/pci.h     |    1 
 4 files changed, 52 insertions(+), 54 deletions(-)

Index: linux-2.6/drivers/pci/setup-bus.c
===================================================================
--- linux-2.6.orig/drivers/pci/setup-bus.c
+++ linux-2.6/drivers/pci/setup-bus.c
@@ -27,6 +27,12 @@
 #include <linux/slab.h>
 #include "pci.h"
 
+struct resource_list {
+	struct resource_list *next;
+	struct resource *res;
+	struct pci_dev *dev;
+};
+
 struct resource_list_x {
 	struct resource_list_x *next;
 	struct resource *res;
@@ -137,6 +143,52 @@ static resource_size_t get_res_add_size(
 	return 0;
 }
 
+/* Sort resources by alignment */
+static void pdev_sort_resources(struct pci_dev *dev, struct resource_list *head)
+{
+	int i;
+
+	for (i = 0; i < PCI_NUM_RESOURCES; i++) {
+		struct resource *r;
+		struct resource_list *list, *tmp;
+		resource_size_t r_align;
+
+		r = &dev->resource[i];
+
+		if (r->flags & IORESOURCE_PCI_FIXED)
+			continue;
+
+		if (!(r->flags) || r->parent)
+			continue;
+
+		r_align = pci_resource_alignment(dev, r);
+		if (!r_align) {
+			dev_warn(&dev->dev, "BAR %d: %pR has bogus alignment\n",
+				 i, r);
+			continue;
+		}
+		for (list = head; ; list = list->next) {
+			resource_size_t align = 0;
+			struct resource_list *ln = list->next;
+
+			if (ln)
+				align = pci_resource_alignment(ln->dev, ln->res);
+
+			if (r_align > align) {
+				tmp = kmalloc(sizeof(*tmp), GFP_KERNEL);
+				if (!tmp)
+					panic("pdev_sort_resources(): "
+					      "kmalloc() failed!\n");
+				tmp->next = ln;
+				tmp->res = r;
+				tmp->dev = dev;
+				list->next = tmp;
+				break;
+			}
+		}
+	}
+}
+
 static void __dev_sort_resources(struct pci_dev *dev,
 				 struct resource_list *head)
 {
Index: linux-2.6/drivers/pci/setup-res.c
===================================================================
--- linux-2.6.orig/drivers/pci/setup-res.c
+++ linux-2.6/drivers/pci/setup-res.c
@@ -280,53 +280,6 @@ int pci_assign_resource(struct pci_dev *
 	return ret;
 }
 
-
-/* Sort resources by alignment */
-void pdev_sort_resources(struct pci_dev *dev, struct resource_list *head)
-{
-	int i;
-
-	for (i = 0; i < PCI_NUM_RESOURCES; i++) {
-		struct resource *r;
-		struct resource_list *list, *tmp;
-		resource_size_t r_align;
-
-		r = &dev->resource[i];
-
-		if (r->flags & IORESOURCE_PCI_FIXED)
-			continue;
-
-		if (!(r->flags) || r->parent)
-			continue;
-
-		r_align = pci_resource_alignment(dev, r);
-		if (!r_align) {
-			dev_warn(&dev->dev, "BAR %d: %pR has bogus alignment\n",
-				 i, r);
-			continue;
-		}
-		for (list = head; ; list = list->next) {
-			resource_size_t align = 0;
-			struct resource_list *ln = list->next;
-
-			if (ln)
-				align = pci_resource_alignment(ln->dev, ln->res);
-
-			if (r_align > align) {
-				tmp = kmalloc(sizeof(*tmp), GFP_KERNEL);
-				if (!tmp)
-					panic("pdev_sort_resources(): "
-					      "kmalloc() failed!\n");
-				tmp->next = ln;
-				tmp->res = r;
-				tmp->dev = dev;
-				list->next = tmp;
-				break;
-			}
-		}
-	}
-}
-
 int pci_enable_resources(struct pci_dev *dev, int mask)
 {
 	u16 cmd, old_cmd;
Index: linux-2.6/include/linux/ioport.h
===================================================================
--- linux-2.6.orig/include/linux/ioport.h
+++ linux-2.6/include/linux/ioport.h
@@ -23,12 +23,6 @@ struct resource {
 	struct resource *parent, *sibling, *child;
 };
 
-struct resource_list {
-	struct resource_list *next;
-	struct resource *res;
-	struct pci_dev *dev;
-};
-
 /*
  * IO resources have these defined flags.
  */
Index: linux-2.6/include/linux/pci.h
===================================================================
--- linux-2.6.orig/include/linux/pci.h
+++ linux-2.6/include/linux/pci.h
@@ -898,7 +898,6 @@ int pci_claim_resource(struct pci_dev *,
 void pci_assign_unassigned_resources(void);
 void pci_assign_unassigned_bridge_resources(struct pci_dev *bridge);
 void pdev_enable_device(struct pci_dev *);
-void pdev_sort_resources(struct pci_dev *, struct resource_list *);
 int pci_enable_resources(struct pci_dev *, int mask);
 void pci_fixup_irqs(u8 (*)(struct pci_dev *, u8 *),
 		    int (*)(const struct pci_dev *, u8, u8));

[-- Attachment #3: list_insert_before.patch --]
[-- Type: text/x-patch, Size: 918 bytes --]

Subject: [PATCH 2/3] list: add list_insert_before

will use it with generic list replace resource_list

Signed-off-by: Yinghai Lu <yinghai@kernel.org>

---
 include/linux/list.h |   17 +++++++++++++++++
 1 file changed, 17 insertions(+)

Index: linux-2.6/include/linux/list.h
===================================================================
--- linux-2.6.orig/include/linux/list.h
+++ linux-2.6/include/linux/list.h
@@ -207,6 +207,23 @@ static inline int list_empty_careful(con
 	return (next == head) && (next == head->prev);
 }
 
+static inline void list_insert_before(struct list_head *old,
+				      struct list_head *new)
+{
+	struct list_head *prev;
+
+	if (list_empty(old)) {
+		list_add(new, old);
+		return;
+	}
+
+	prev = old->prev;
+	old->prev = new;
+	new->next = old;
+	new->prev = prev;
+	prev->next = new;
+}
+
 /**
  * list_rotate_left - rotate the list to the left
  * @head: the head of the list

[-- Attachment #4: convert_resource_list_to_list_head.patch --]
[-- Type: text/x-patch, Size: 22259 bytes --]

[PATCH 3/3] PCI: Replace resource_list with generic list

So we can use helper functions for generic list.

Suggested-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Yinghai Lu <yinghai@kernel.org>

---
 drivers/pci/setup-bus.c |  379 +++++++++++++++++++++++-------------------------
 1 file changed, 188 insertions(+), 191 deletions(-)

Index: linux-2.6/drivers/pci/setup-bus.c
===================================================================
--- linux-2.6.orig/drivers/pci/setup-bus.c
+++ linux-2.6/drivers/pci/setup-bus.c
@@ -27,14 +27,14 @@
 #include <linux/slab.h>
 #include "pci.h"
 
-struct resource_list {
-	struct resource_list *next;
+struct pci_dev_resource {
+	struct list_head list;
 	struct resource *res;
 	struct pci_dev *dev;
 };
 
-struct resource_list_x {
-	struct resource_list_x *next;
+struct pci_dev_resource_x {
+	struct list_head list;
 	struct resource *res;
 	struct pci_dev *dev;
 	resource_size_t start;
@@ -44,14 +44,12 @@ struct resource_list_x {
 	unsigned long flags;
 };
 
-#define free_list(type, head) do {                      \
-	struct type *list, *tmp;			\
-	for (list = (head)->next; list;) {		\
-		tmp = list;				\
-		list = list->next;			\
-		kfree(tmp);				\
-	}						\
-	(head)->next = NULL;				\
+#define free_list(type, head) do {				\
+	struct type *dev_res, *tmp;				\
+	list_for_each_entry_safe(dev_res, tmp, head, list) {	\
+		list_del(&dev_res->list);			\
+		kfree(dev_res);					\
+	}							\
 } while (0)
 
 int pci_realloc_enable = 1;
@@ -70,21 +68,18 @@ void pci_realloc(void)
  * @add_size:	additional size to be optionally added
  *              to the resource
  */
-static int add_to_list(struct resource_list_x *head,
+static int add_to_list(struct list_head *head,
 		 struct pci_dev *dev, struct resource *res,
 		 resource_size_t add_size, resource_size_t min_align)
 {
-	struct resource_list_x *list = head;
-	struct resource_list_x *ln = list->next;
-	struct resource_list_x *tmp;
+	struct pci_dev_resource_x *tmp;
 
-	tmp = kmalloc(sizeof(*tmp), GFP_KERNEL);
+	tmp = kzalloc(sizeof(*tmp), GFP_KERNEL);
 	if (!tmp) {
 		pr_warning("add_to_list: kmalloc() failed!\n");
 		return -ENOMEM;
 	}
 
-	tmp->next = ln;
 	tmp->res = res;
 	tmp->dev = dev;
 	tmp->start = res->start;
@@ -92,12 +87,13 @@ static int add_to_list(struct resource_l
 	tmp->flags = res->flags;
 	tmp->add_size = add_size;
 	tmp->min_align = min_align;
-	list->next = tmp;
+
+	list_add(&tmp->list, head);
 
 	return 0;
 }
 
-static void add_to_failed_list(struct resource_list_x *head,
+static void add_to_failed_list(struct list_head *head,
 				struct pci_dev *dev, struct resource *res)
 {
 	add_to_list(head, dev, res,
@@ -105,53 +101,48 @@ static void add_to_failed_list(struct re
 			0 /* dont care */);
 }
 
-static void remove_from_list(struct resource_list_x *realloc_head,
+static void remove_from_list(struct list_head *realloc_head,
 				 struct resource *res)
 {
-	struct resource_list_x *prev, *tmp, *list;
+	struct pci_dev_resource_x *dev_res_x, *tmp;
 
-	prev = realloc_head;
-	for (list = realloc_head->next; list;) {
-		if (list->res != res) {
-			prev = list;
-			list = list->next;
-			continue;
+	list_for_each_entry_safe(dev_res_x, tmp, realloc_head, list) {
+		if (dev_res_x->res == res) {
+			list_del(&dev_res_x->list);
+			kfree(dev_res_x);
+			break;
 		}
-		tmp = list;
-		prev->next = list = list->next;
-		kfree(tmp);
 	}
 }
 
-static resource_size_t get_res_add_size(struct resource_list_x *realloc_head,
+static resource_size_t get_res_add_size(struct list_head *realloc_head,
 					struct resource *res)
 {
-	struct resource_list_x *list;
+	struct pci_dev_resource_x *dev_res_x;
 
-	/* check if it is in realloc_head list */
-	for (list = realloc_head->next; list && list->res != res;
-			list = list->next)
-		;
-
-	if (list) {
-		dev_printk(KERN_DEBUG, &list->dev->dev,
-			 "%pR get_res_add_size  add_size %llx\n",
-			 list->res, (unsigned long long)list->add_size);
-		return list->add_size;
+	list_for_each_entry(dev_res_x, realloc_head, list) {
+		if (dev_res_x->res == res) {
+			dev_printk(KERN_DEBUG, &dev_res_x->dev->dev,
+				 "%pR get_res_add_size  add_size %llx\n",
+				 dev_res_x->res,
+				 (unsigned long long)dev_res_x->add_size);
+			return dev_res_x->add_size;
+		}
 	}
 
 	return 0;
 }
 
 /* Sort resources by alignment */
-static void pdev_sort_resources(struct pci_dev *dev, struct resource_list *head)
+static void pdev_sort_resources(struct pci_dev *dev, struct list_head *head)
 {
 	int i;
 
 	for (i = 0; i < PCI_NUM_RESOURCES; i++) {
 		struct resource *r;
-		struct resource_list *list, *tmp;
+		struct pci_dev_resource *dev_res, *tmp;
 		resource_size_t r_align;
+		bool inserted = false;
 
 		r = &dev->resource[i];
 
@@ -167,30 +158,41 @@ static void pdev_sort_resources(struct p
 				 i, r);
 			continue;
 		}
-		for (list = head; ; list = list->next) {
-			resource_size_t align = 0;
-			struct resource_list *ln = list->next;
 
-			if (ln)
-				align = pci_resource_alignment(ln->dev, ln->res);
+		tmp = kzalloc(sizeof(*tmp), GFP_KERNEL);
+		if (!tmp)
+			panic("pdev_sort_resources(): "
+			      "kmalloc() failed!\n");
+		tmp->res = r;
+		tmp->dev = dev;
+
+		/* First one ? */
+		if (list_empty(head)) {
+			list_add(&tmp->list, head);
+			continue;
+		}
+
+		list_for_each_entry(dev_res, head, list) {
+			resource_size_t align;
+
+			align = pci_resource_alignment(dev_res->dev,
+							 dev_res->res);
 
 			if (r_align > align) {
-				tmp = kmalloc(sizeof(*tmp), GFP_KERNEL);
-				if (!tmp)
-					panic("pdev_sort_resources(): "
-					      "kmalloc() failed!\n");
-				tmp->next = ln;
-				tmp->res = r;
-				tmp->dev = dev;
-				list->next = tmp;
+				list_insert_before(&dev_res->list, &tmp->list);
+				inserted = true;
 				break;
 			}
 		}
+
+		/* Could be smallest one */
+		if (!inserted)
+			list_add_tail(&tmp->list, head);
 	}
 }
 
 static void __dev_sort_resources(struct pci_dev *dev,
-				 struct resource_list *head)
+				 struct list_head *head)
 {
 	u16 class = dev->class >> 8;
 
@@ -228,49 +230,53 @@ static inline void reset_resource(struct
  * additional resources for the element, provided the element
  * is in the head list.
  */
-static void reassign_resources_sorted(struct resource_list_x *realloc_head,
-		struct resource_list *head)
+static void reassign_resources_sorted(struct list_head *realloc_head,
+		struct list_head *head)
 {
 	struct resource *res;
-	struct resource_list_x *list, *tmp, *prev;
-	struct resource_list *hlist;
+	struct pci_dev_resource_x *dev_res_x, *tmp;
+	struct pci_dev_resource *dev_res;
 	resource_size_t add_size;
 	int idx;
 
-	prev = realloc_head;
-	for (list = realloc_head->next; list;) {
-		res = list->res;
+	list_for_each_entry_safe(dev_res_x, tmp, realloc_head, list) {
+		bool found_match = false;
+
+		res = dev_res_x->res;
 		/* skip resource that has been reset */
 		if (!res->flags)
 			goto out;
 
 		/* skip this resource if not found in head list */
-		for (hlist = head->next; hlist && hlist->res != res;
-				hlist = hlist->next);
-		if (!hlist) { /* just skip */
-			prev = list;
-			list = list->next;
-			continue;
+		list_for_each_entry(dev_res, head, list) {
+			if (dev_res->res == res) {
+				found_match = true;
+				break;
+			}
 		}
+		if (!found_match)/* just skip */
+			continue;
 
-		idx = res - &list->dev->resource[0];
-		add_size=list->add_size;
+		idx = res - &dev_res_x->dev->resource[0];
+		add_size = dev_res_x->add_size;
 		if (!resource_size(res)) {
-			res->start = list->start;
+			res->start = dev_res_x->start;
 			res->end = res->start + add_size - 1;
-			if(pci_assign_resource(list->dev, idx))
+			if (pci_assign_resource(dev_res_x->dev, idx))
 				reset_resource(res);
 		} else {
-			resource_size_t align = list->min_align;
-			res->flags |= list->flags & (IORESOURCE_STARTALIGN|IORESOURCE_SIZEALIGN);
-			if (pci_reassign_resource(list->dev, idx, add_size, align))
-				dev_printk(KERN_DEBUG, &list->dev->dev, "failed to add optional resources res=%pR\n",
+			resource_size_t align = dev_res_x->min_align;
+			res->flags |= dev_res_x->flags &
+				 (IORESOURCE_STARTALIGN|IORESOURCE_SIZEALIGN);
+			if (pci_reassign_resource(dev_res_x->dev, idx,
+						  add_size, align))
+				dev_printk(KERN_DEBUG, &dev_res_x->dev->dev,
+				   "failed to add optional resources res=%pR\n",
 							res);
 		}
 out:
-		tmp = list;
-		prev->next = list = list->next;
-		kfree(tmp);
+		list_del(&dev_res_x->list);
+		kfree(dev_res_x);
 	}
 }
 
@@ -284,34 +290,36 @@ out:
  * Satisfy resource requests of each element in the list. Add
  * requests that could not satisfied to the failed_list.
  */
-static void assign_requested_resources_sorted(struct resource_list *head,
-				 struct resource_list_x *fail_head)
+static void assign_requested_resources_sorted(struct list_head *head,
+				 struct list_head *fail_head)
 {
 	struct resource *res;
-	struct resource_list *list;
+	struct pci_dev_resource *dev_res;
 	int idx;
 
-	for (list = head->next; list; list = list->next) {
-		res = list->res;
-		idx = res - &list->dev->resource[0];
-		if (resource_size(res) && pci_assign_resource(list->dev, idx)) {
-			if (fail_head && !pci_is_root_bus(list->dev->bus)) {
+	list_for_each_entry(dev_res, head, list) {
+		res = dev_res->res;
+		idx = res - &dev_res->dev->resource[0];
+		if (resource_size(res) &&
+		    pci_assign_resource(dev_res->dev, idx)) {
+			if (fail_head && !pci_is_root_bus(dev_res->dev->bus)) {
 				/*
 				 * if the failed res is for ROM BAR, and it will
 				 * be enabled later, don't add it to the list
 				 */
 				if (!((idx == PCI_ROM_RESOURCE) &&
 				      (!(res->flags & IORESOURCE_ROM_ENABLE))))
-					add_to_failed_list(fail_head, list->dev, res);
+					add_to_failed_list(fail_head,
+							   dev_res->dev, res);
 			}
 			reset_resource(res);
 		}
 	}
 }
 
-static void __assign_resources_sorted(struct resource_list *head,
-				 struct resource_list_x *realloc_head,
-				 struct resource_list_x *fail_head)
+static void __assign_resources_sorted(struct list_head *head,
+				 struct list_head *realloc_head,
+				 struct list_head *fail_head)
 {
 	/*
 	 * Should not assign requested resources at first.
@@ -322,53 +330,55 @@ static void __assign_resources_sorted(st
 	 *  if could not do that, we still try to assign requested at first,
 	 *    then try to reassign add_size for some resources.
 	 */
-	struct resource_list_x save_head, local_fail_head, *list;
-	struct resource_list *l;
+	LIST_HEAD(save_head);
+	LIST_HEAD(local_fail_head);
+	struct pci_dev_resource_x *dev_res_x;
+	struct pci_dev_resource *dev_res;
 
 	/* Check if optional add_size is there */
-	if (!realloc_head || !realloc_head->next)
+	if (!realloc_head || list_empty(realloc_head))
 		goto requested_and_reassign;
 
 	/* Save original start, end, flags etc at first */
-	save_head.next = NULL;
-	for (l = head->next; l; l = l->next)
-		if (add_to_list(&save_head, l->dev, l->res, 0, 0)) {
-			free_list(resource_list_x, &save_head);
+	list_for_each_entry(dev_res, head, list) {
+		if (add_to_list(&save_head, dev_res->dev, dev_res->res, 0, 0)) {
+			free_list(pci_dev_resource_x, &save_head);
 			goto requested_and_reassign;
 		}
+	}
 
 	/* Update res in head list with add_size in realloc_head list */
-	for (l = head->next; l; l = l->next)
-		l->res->end += get_res_add_size(realloc_head, l->res);
+	list_for_each_entry(dev_res, head, list)
+		dev_res->res->end += get_res_add_size(realloc_head,
+							dev_res->res);
 
 	/* Try updated head list with add_size added */
-	local_fail_head.next = NULL;
 	assign_requested_resources_sorted(head, &local_fail_head);
 
 	/* all assigned with add_size ? */
-	if (!local_fail_head.next) {
+	if (list_empty(&local_fail_head)) {
 		/* Remove head list from realloc_head list */
-		for (l = head->next; l; l = l->next)
-			remove_from_list(realloc_head, l->res);
-		free_list(resource_list_x, &save_head);
-		free_list(resource_list, head);
+		list_for_each_entry(dev_res, head, list)
+			remove_from_list(realloc_head, dev_res->res);
+		free_list(pci_dev_resource_x, &save_head);
+		free_list(pci_dev_resource, head);
 		return;
 	}
 
-	free_list(resource_list_x, &local_fail_head);
+	free_list(pci_dev_resource_x, &local_fail_head);
 	/* Release assigned resource */
-	for (l = head->next; l; l = l->next)
-		if (l->res->parent)
-			release_resource(l->res);
+	list_for_each_entry(dev_res, head, list)
+		if (dev_res->res->parent)
+			release_resource(dev_res->res);
 	/* Restore start/end/flags from saved list */
-	for (list = save_head.next; list; list = list->next) {
-		struct resource *res = list->res;
+	list_for_each_entry(dev_res_x, &save_head, list) {
+		struct resource *res = dev_res_x->res;
 
-		res->start = list->start;
-		res->end = list->end;
-		res->flags = list->flags;
+		res->start = dev_res_x->start;
+		res->end = dev_res_x->end;
+		res->flags = dev_res_x->flags;
 	}
-	free_list(resource_list_x, &save_head);
+	free_list(pci_dev_resource_x, &save_head);
 
 requested_and_reassign:
 	/* Satisfy the must-have resource requests */
@@ -378,29 +388,27 @@ requested_and_reassign:
 		requests */
 	if (realloc_head)
 		reassign_resources_sorted(realloc_head, head);
-	free_list(resource_list, head);
+	free_list(pci_dev_resource, head);
 }
 
 static void pdev_assign_resources_sorted(struct pci_dev *dev,
-				 struct resource_list_x *add_head,
-				 struct resource_list_x *fail_head)
+				 struct list_head *add_head,
+				 struct list_head *fail_head)
 {
-	struct resource_list head;
+	LIST_HEAD(head);
 
-	head.next = NULL;
 	__dev_sort_resources(dev, &head);
 	__assign_resources_sorted(&head, add_head, fail_head);
 
 }
 
 static void pbus_assign_resources_sorted(const struct pci_bus *bus,
-					 struct resource_list_x *realloc_head,
-					 struct resource_list_x *fail_head)
+					 struct list_head *realloc_head,
+					 struct list_head *fail_head)
 {
 	struct pci_dev *dev;
-	struct resource_list head;
+	LIST_HEAD(head);
 
-	head.next = NULL;
 	list_for_each_entry(dev, &bus->devices, bus_list)
 		__dev_sort_resources(dev, &head);
 
@@ -713,7 +721,7 @@ static resource_size_t calculate_memsize
  * We must be careful with the ISA aliasing though.
  */
 static void pbus_size_io(struct pci_bus *bus, resource_size_t min_size,
-		resource_size_t add_size, struct resource_list_x *realloc_head)
+		resource_size_t add_size, struct list_head *realloc_head)
 {
 	struct pci_dev *dev;
 	struct resource *b_res = find_free_bus_resource(bus, IORESOURCE_IO);
@@ -781,7 +789,7 @@ static void pbus_size_io(struct pci_bus
 static int pbus_size_mem(struct pci_bus *bus, unsigned long mask,
 			 unsigned long type, resource_size_t min_size,
 			resource_size_t add_size,
-			struct resource_list_x *realloc_head)
+			struct list_head *realloc_head)
 {
 	struct pci_dev *dev;
 	resource_size_t min_align, align, size, size0, size1;
@@ -891,7 +899,7 @@ unsigned long pci_cardbus_resource_align
 }
 
 static void pci_bus_size_cardbus(struct pci_bus *bus,
-			struct resource_list_x *realloc_head)
+			struct list_head *realloc_head)
 {
 	struct pci_dev *bridge = bus->self;
 	struct resource *b_res = &bridge->resource[PCI_BRIDGE_RESOURCES];
@@ -953,7 +961,7 @@ static void pci_bus_size_cardbus(struct
 }
 
 void __ref __pci_bus_size_bridges(struct pci_bus *bus,
-			struct resource_list_x *realloc_head)
+			struct list_head *realloc_head)
 {
 	struct pci_dev *dev;
 	unsigned long mask, prefmask;
@@ -1024,8 +1032,8 @@ void __ref pci_bus_size_bridges(struct p
 EXPORT_SYMBOL(pci_bus_size_bridges);
 
 static void __ref __pci_bus_assign_resources(const struct pci_bus *bus,
-					 struct resource_list_x *realloc_head,
-					 struct resource_list_x *fail_head)
+					 struct list_head *realloc_head,
+					 struct list_head *fail_head)
 {
 	struct pci_bus *b;
 	struct pci_dev *dev;
@@ -1064,8 +1072,8 @@ void __ref pci_bus_assign_resources(cons
 EXPORT_SYMBOL(pci_bus_assign_resources);
 
 static void __ref __pci_bridge_assign_resources(const struct pci_dev *bridge,
-					 struct resource_list_x *add_head,
-					 struct resource_list_x *fail_head)
+					 struct list_head *add_head,
+					 struct list_head *fail_head)
 {
 	struct pci_bus *b;
 
@@ -1249,20 +1257,18 @@ void __init
 pci_assign_unassigned_resources(void)
 {
 	struct pci_bus *bus;
-	struct resource_list_x realloc_list; /* list of resources that
+	LIST_HEAD(realloc_head); /* list of resources that
 					want additional resources */
-	struct resource_list_x *add_list = NULL;
+	struct list_head *add_list = NULL;
 	int tried_times = 0;
 	enum release_type rel_type = leaf_only;
-	struct resource_list_x head, *list;
+	LIST_HEAD(fail_head);
+	struct pci_dev_resource_x *dev_res_x;
 	unsigned long type_mask = IORESOURCE_IO | IORESOURCE_MEM |
 				  IORESOURCE_PREFETCH;
 	unsigned long failed_type;
 	int pci_try_num = 1;
 
-	head.next = NULL;
-	realloc_list.next = NULL;
-
 	/* don't realloc if asked to do so */
 	if (pci_realloc_enabled()) {
 		int max_depth = pci_get_max_depth();
@@ -1278,7 +1284,7 @@ again:
 	 * must have, so can realloc parent bridge resource
 	 */
 	if (tried_times + 1 == pci_try_num)
-		add_list = &realloc_list;
+		add_list = &realloc_head;
 	/* Depth first, calculate sizes and alignments of all
 	   subordinate buses. */
 	list_for_each_entry(bus, &pci_root_buses, node)
@@ -1286,27 +1292,26 @@ again:
 
 	/* Depth last, allocate resources and update the hardware. */
 	list_for_each_entry(bus, &pci_root_buses, node)
-		__pci_bus_assign_resources(bus, add_list, &head);
+		__pci_bus_assign_resources(bus, add_list, &fail_head);
 	if (add_list)
-		BUG_ON(add_list->next);
+		BUG_ON(!list_empty(add_list));
 	tried_times++;
 
 	/* any device complain? */
-	if (!head.next)
+	if (list_empty(&fail_head))
 		goto enable_and_dump;
 
 	failed_type = 0;
-	for (list = head.next; list;) {
-		failed_type |= list->flags;
-		list = list->next;
-	}
+	list_for_each_entry(dev_res_x, &fail_head, list)
+		failed_type |= dev_res_x->flags;
+
 	/*
 	 * io port are tight, don't try extra
 	 * or if reach the limit, don't want to try more
 	 */
 	failed_type &= type_mask;
 	if ((failed_type == IORESOURCE_IO) || (tried_times >= pci_try_num)) {
-		free_list(resource_list_x, &head);
+		free_list(pci_dev_resource_x, &fail_head);
 		goto enable_and_dump;
 	}
 
@@ -1321,25 +1326,23 @@ again:
 	 * Try to release leaf bridge's resources that doesn't fit resource of
 	 * child device under that bridge
 	 */
-	for (list = head.next; list;) {
-		bus = list->dev->bus;
-		pci_bus_release_bridge_resources(bus, list->flags & type_mask,
-						  rel_type);
-		list = list->next;
+	list_for_each_entry(dev_res_x, &fail_head, list) {
+		bus = dev_res_x->dev->bus;
+		pci_bus_release_bridge_resources(bus,
+						 dev_res_x->flags & type_mask,
+						 rel_type);
 	}
 	/* restore size and flags */
-	for (list = head.next; list;) {
-		struct resource *res = list->res;
+	list_for_each_entry(dev_res_x, &fail_head, list) {
+		struct resource *res = dev_res_x->res;
 
-		res->start = list->start;
-		res->end = list->end;
-		res->flags = list->flags;
-		if (list->dev->subordinate)
+		res->start = dev_res_x->start;
+		res->end = dev_res_x->end;
+		res->flags = dev_res_x->flags;
+		if (dev_res_x->dev->subordinate)
 			res->flags = 0;
-
-		list = list->next;
 	}
-	free_list(resource_list_x, &head);
+	free_list(pci_dev_resource_x, &fail_head);
 
 	goto again;
 
@@ -1356,29 +1359,27 @@ enable_and_dump:
 void pci_assign_unassigned_bridge_resources(struct pci_dev *bridge)
 {
 	struct pci_bus *parent = bridge->subordinate;
-	struct resource_list_x add_list; /* list of resources that
+	LIST_HEAD(add_list); /* list of resources that
 					want additional resources */
 	int tried_times = 0;
-	struct resource_list_x head, *list;
+	LIST_HEAD(fail_head);
+	struct pci_dev_resource_x *dev_res_x;
 	int retval;
 	unsigned long type_mask = IORESOURCE_IO | IORESOURCE_MEM |
 				  IORESOURCE_PREFETCH;
 
-	head.next = NULL;
-	add_list.next = NULL;
-
 again:
 	__pci_bus_size_bridges(parent, &add_list);
-	__pci_bridge_assign_resources(bridge, &add_list, &head);
-	BUG_ON(add_list.next);
+	__pci_bridge_assign_resources(bridge, &add_list, &fail_head);
+	BUG_ON(!list_empty(&add_list));
 	tried_times++;
 
-	if (!head.next)
+	if (list_empty(&fail_head))
 		goto enable_all;
 
 	if (tried_times >= 2) {
 		/* still fail, don't need to try more */
-		free_list(resource_list_x, &head);
+		free_list(pci_dev_resource_x, &fail_head);
 		goto enable_all;
 	}
 
@@ -1389,27 +1390,24 @@ again:
 	 * Try to release leaf bridge's resources that doesn't fit resource of
 	 * child device under that bridge
 	 */
-	for (list = head.next; list;) {
-		struct pci_bus *bus = list->dev->bus;
-		unsigned long flags = list->flags;
+	list_for_each_entry(dev_res_x, &fail_head, list) {
+		struct pci_bus *bus = dev_res_x->dev->bus;
+		unsigned long flags = dev_res_x->flags;
 
 		pci_bus_release_bridge_resources(bus, flags & type_mask,
 						 whole_subtree);
-		list = list->next;
 	}
 	/* restore size and flags */
-	for (list = head.next; list;) {
-		struct resource *res = list->res;
+	list_for_each_entry(dev_res_x, &fail_head, list) {
+		struct resource *res = dev_res_x->res;
 
-		res->start = list->start;
-		res->end = list->end;
-		res->flags = list->flags;
-		if (list->dev->subordinate)
+		res->start = dev_res_x->start;
+		res->end = dev_res_x->end;
+		res->flags = dev_res_x->flags;
+		if (dev_res_x->dev->subordinate)
 			res->flags = 0;
-
-		list = list->next;
 	}
-	free_list(resource_list_x, &head);
+	free_list(pci_dev_resource_x, &fail_head);
 
 	goto again;
 
@@ -1434,12 +1432,11 @@ unsigned int __ref pci_rescan_bus(struct
 {
 	unsigned int max;
 	struct pci_dev *dev;
-	struct resource_list_x add_list; /* list of resources that
+	LIST_HEAD(add_list); /* list of resources that
 					want additional resources */
 
 	max = pci_scan_child_bus(bus);
 
-	add_list.next = NULL;
 	down_read(&pci_bus_sem);
 	list_for_each_entry(dev, &bus->devices, bus_list)
 		if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE ||
@@ -1449,7 +1446,7 @@ unsigned int __ref pci_rescan_bus(struct
 							 &add_list);
 	up_read(&pci_bus_sem);
 	__pci_bus_assign_resources(bus, &add_list, NULL);
-	BUG_ON(add_list.next);
+	BUG_ON(!list_empty(&add_list));
 
 	pci_enable_bridges(bus);
 	pci_bus_add_devices(bus);

Re: [PATCH 2/5] PCI: Try to assign required+option size at first

[Linus Torvalds]

On Sun, Jan 8, 2012 at 10:01 PM, Yinghai Lu <yinghai@kernel.org> wrote:
>
> Spent some time today, try to produce some patches according to your direction.
>
> Please check them to see if it is with your thoughts.

Get rid of "insert_list_before()". That's a particularly bad
implementation of "list_add_tail()", which we already have. And
list_add_tail() generates better code, and supports the proper full
list debugging.

(Think about it: adding something "before" an entry in a doubly-linked
circular list is the same as adding it at the tail of the list - it's
circular!)

The other patches look reasonable, but I only gave them a quick look.
Although why is "free_list()" a #define rather than a real function
(apart from the obvious reason that it used to be that before too..)

Oh, and I just noticed that you fixed that in the "merge struct"
patch, which is good, except I think it would be much better to aim to
do *one* thing per patch, instead of mixing them up like that.

.. and when you merged the "_x" resource struct, you still left the
variables with the "_x" names.. Do you really need dev_res and
dev_res_x variables?

               Linus

Re: [PATCH 2/5] PCI: Try to assign required+option size at first

[Yinghai Lu]

On Tue, Jan 10, 2012 at 10:20 PM, Linus Torvalds
<torvalds@linux-foundation.org> wrote:
> On Sun, Jan 8, 2012 at 10:01 PM, Yinghai Lu <yinghai@kernel.org> wrote:
>>
>> Spent some time today, try to produce some patches according to your direction.
>>
>> Please check them to see if it is with your thoughts.
>
> Get rid of "insert_list_before()". That's a particularly bad
> implementation of "list_add_tail()", which we already have. And
> list_add_tail() generates better code, and supports the proper full
> list debugging.
>
> (Think about it: adding something "before" an entry in a doubly-linked
> circular list is the same as adding it at the tail of the list - it's
> circular!)

Indeed.  could just use list_add_tail instead.

>
> The other patches look reasonable, but I only gave them a quick look.


> Although why is "free_list()" a #define rather than a real function
> (apart from the obvious reason that it used to be that before too..)
>
> Oh, and I just noticed that you fixed that in the "merge struct"
> patch, which is good, except I think it would be much better to aim to
> do *one* thing per patch, instead of mixing them up like that.

ok, will separate to another patch about free_list changes.

>
> .. and when you merged the "_x" resource struct, you still left the
> variables with the "_x" names.. Do you really need dev_res and
> dev_res_x variables?

sure,  will drop _x.

Thanks

Yinghai

Re: [PATCH 2/5] PCI: Try to assign required+option size at first

[Ram Pai]

On Wed, Dec 07, 2011 at 12:53:01AM -0800, Yinghai Lu wrote:
> Found reassign can not find right range for one resource. even total range is enough.
> 
> bridge b1:02.0 will need 2M+3M
> bridge b1:03.0 will need 2M+3M
> 
> so bridge b0:00.0 will get assigned: 4M : [f8000000-f83fffff]
>    later is reassigned to 10M : [f8000000-f9ffffff]
> 
> b1:02.0 is assigned to 2M : [f8000000-f81fffff]
> b1:03.0 is assigned to 2M : [f8200000-f83fffff]
> 
> after that b1:03.0 get chance to be reassigned to [f8200000-f86fffff]
> but b1:02.0 will not have chance to expand, because b1:03.0 is using in middle one.
> 
> [  187.911401] pci 0000:b1:02.0: bridge window [mem 0x00100000-0x002fffff] to [bus b2-b2] add_size 300000
> [  187.920764] pci 0000:b1:03.0: bridge window [mem 0x00100000-0x002fffff] to [bus b3-b3] add_size 300000
> [  187.930129] pci 0000:b1:02.0: [mem 0x00100000-0x002fffff] get_res_add_size  add_size 300000
> [  187.938500] pci 0000:b1:03.0: [mem 0x00100000-0x002fffff] get_res_add_size  add_size 300000
> [  187.946857] pci 0000:b0:00.0: bridge window [mem 0x00100000-0x004fffff] to [bus b1-b3] add_size 600000
> [  187.956206] pci 0000:b0:00.0: BAR 14: assigned [mem 0xf8000000-0xf83fffff]
> [  187.963102] pci 0000:b0:00.0: BAR 15: assigned [mem 0xf5000000-0xf51fffff pref]
> [  187.970434] pci 0000:b0:00.0: BAR 14: reassigned [mem 0xf8000000-0xf89fffff]
> [  187.977497] pci 0000:b1:02.0: BAR 14: assigned [mem 0xf8000000-0xf81fffff]
> [  187.984383] pci 0000:b1:02.0: BAR 15: assigned [mem 0xf5000000-0xf50fffff pref]
> [  187.991695] pci 0000:b1:03.0: BAR 14: assigned [mem 0xf8200000-0xf83fffff]
> [  187.998576] pci 0000:b1:03.0: BAR 15: assigned [mem 0xf5100000-0xf51fffff pref]
> [  188.005888] pci 0000:b1:03.0: BAR 14: reassigned [mem 0xf8200000-0xf86fffff]
> [  188.012939] pci 0000:b1:02.0: BAR 14: can't assign mem (size 0x200000)
> [  188.019471] pci 0000:b1:02.0: failed to add 300000 to res=[mem 0xf8000000-0xf81fffff]
> [  188.027326] pci 0000:b2:00.0: reg 184: [mem 0x00000000-0x00003fff 64bit]
> [  188.034071] pci 0000:b2:00.0: reg 18c: [mem 0x00000000-0x000fffff 64bit]
> [  188.040795] pci 0000:b2:00.0: BAR 2: assigned [mem 0xf8000000-0xf80fffff 64bit]
> [  188.048119] pci 0000:b2:00.0: BAR 2: set to [mem 0xf8000000-0xf80fffff 64bit] (PCI address [0xf8000000-0xf80fffff])
> [  188.058550] pci 0000:b2:00.0: BAR 6: assigned [mem 0xf5000000-0xf50fffff pref]
> [  188.065802] pci 0000:b2:00.0: BAR 0: assigned [mem 0xf8100000-0xf8103fff 64bit]
> [  188.073125] pci 0000:b2:00.0: BAR 0: set to [mem 0xf8100000-0xf8103fff 64bit] (PCI address [0xf8100000-0xf8103fff])
> [  188.083596] pci 0000:b2:00.0: reg 18c: [mem 0x00000000-0x000fffff 64bit]
> [  188.090310] pci 0000:b2:00.0: BAR 9: can't assign mem (size 0x300000)
> [  188.096773] pci 0000:b2:00.0: reg 184: [mem 0x00000000-0x00003fff 64bit]
> [  188.103479] pci 0000:b2:00.0: BAR 7: assigned [mem 0xf8104000-0xf810ffff 64bit]
> [  188.110801] pci 0000:b2:00.0: BAR 7: set to [mem 0xf8104000-0xf810ffff 64bit] (PCI address [0xf8104000-0xf810ffff])
> [  188.121256] pci 0000:b1:02.0: PCI bridge to [bus b2-b2]
> [  188.126512] pci 0000:b1:02.0:   bridge window [mem 0xf8000000-0xf81fffff]
> [  188.133328] pci 0000:b1:02.0:   bridge window [mem 0xf5000000-0xf50fffff pref]
> [  188.140608] pci 0000:b3:00.0: reg 184: [mem 0x00000000-0x00003fff 64bit]
> [  188.147341] pci 0000:b3:00.0: reg 18c: [mem 0x00000000-0x000fffff 64bit]
> [  188.154076] pci 0000:b3:00.0: BAR 2: assigned [mem 0xf8200000-0xf82fffff 64bit]
> [  188.161417] pci 0000:b3:00.0: BAR 2: set to [mem 0xf8200000-0xf82fffff 64bit] (PCI address [0xf8200000-0xf82fffff])
> [  188.171865] pci 0000:b3:00.0: BAR 6: assigned [mem 0xf5100000-0xf51fffff pref]
> [  188.179090] pci 0000:b3:00.0: BAR 0: assigned [mem 0xf8300000-0xf8303fff 64bit]
> [  188.186431] pci 0000:b3:00.0: BAR 0: set to [mem 0xf8300000-0xf8303fff 64bit] (PCI address [0xf8300000-0xf8303fff])
> [  188.196884] pci 0000:b3:00.0: reg 18c: [mem 0x00000000-0x000fffff 64bit]
> [  188.203591] pci 0000:b3:00.0: BAR 9: assigned [mem 0xf8400000-0xf86fffff 64bit]
> [  188.210909] pci 0000:b3:00.0: BAR 9: set to [mem 0xf8400000-0xf86fffff 64bit] (PCI address [0xf8400000-0xf86fffff])
> [  188.221379] pci 0000:b3:00.0: reg 184: [mem 0x00000000-0x00003fff 64bit]
> [  188.228089] pci 0000:b3:00.0: BAR 7: assigned [mem 0xf8304000-0xf830ffff 64bit]
> [  188.235407] pci 0000:b3:00.0: BAR 7: set to [mem 0xf8304000-0xf830ffff 64bit] (PCI address [0xf8304000-0xf830ffff])
> [  188.245843] pci 0000:b1:03.0: PCI bridge to [bus b3-b3]
> [  188.251107] pci 0000:b1:03.0:   bridge window [mem 0xf8200000-0xf86fffff]
> [  188.257922] pci 0000:b1:03.0:   bridge window [mem 0xf5100000-0xf51fffff pref]
> [  188.265180] pci 0000:b0:00.0: PCI bridge to [bus b1-b3]
> [  188.270443] pci 0000:b0:00.0:   bridge window [mem 0xf8000000-0xf89fffff]
> [  188.277250] pci 0000:b0:00.0:   bridge window [mem 0xf5000000-0xf51fffff pref]
> [  188.284512] pcieport 0000:80:02.2: PCI bridge to [bus b0-bf]
> [  188.290184] pcieport 0000:80:02.2:   bridge window [io  0xa000-0xbfff]
> [  188.296735] pcieport 0000:80:02.2:   bridge window [mem 0xf8000000-0xf8ffffff]
> [  188.303963] pcieport 0000:80:02.2:   bridge window [mem 0xf5000000-0xf5ffffff 64bit pref]
> 
> b2:00.0 BAR 9 has not get assigned...
> 
> root cause:
> b1:02.0 can not be added more range, because b1:03.0 is just after it.
> not space between required ranges.
> 
> Solution:
> Try to assign required + optional all together at first, and if it fails, go with required then reassign path.

Yinghai,
	
	I am worried that this approach will resurface old bug
https://bugzilla.kernel.org/show_bug.cgi?id=15960
	
	With your approach; on a system with not enough resources to satisfy
all the devices, when you fail to allocate 'required+optional' in the first
round and fall back to assigning only the 'required' resources, you can get the
reassignment order wrong, thus not allocate resources to devices for which the
BIOS had originally allocated resources, and hence end up disabling the device.


RP

Re: [PATCH 2/5] PCI: Try to assign required+option size at first

[Yinghai Lu]

On Fri, Jan 13, 2012 at 8:39 AM, Ram Pai <linuxram@us.ibm.com> wrote:
> On Wed, Dec 07, 2011 at 12:53:01AM -0800, Yinghai Lu wrote:
>
>        I am worried that this approach will resurface old bug
> https://bugzilla.kernel.org/show_bug.cgi?id=15960

will ask them to test for-pci2 branch.

>
>        With your approach; on a system with not enough resources to satisfy
> all the devices, when you fail to allocate 'required+optional' in the first
> round and fall back to assigning only the 'required' resources, you can get the
> reassignment order wrong, thus not allocate resources to devices for which the
> BIOS had originally allocated resources, and hence end up disabling the device.

so even required can not be satisfied?

Thanks

Yinghai

Re: [PATCH 2/5] PCI: Try to assign required+option size at first

[Ram Pai]

On Fri, Jan 13, 2012 at 03:28:29PM -0800, Yinghai Lu wrote:
> On Fri, Jan 13, 2012 at 8:39 AM, Ram Pai <linuxram@us.ibm.com> wrote:
> > On Wed, Dec 07, 2011 at 12:53:01AM -0800, Yinghai Lu wrote:
> >
> >        I am worried that this approach will resurface old bug
> > https://bugzilla.kernel.org/show_bug.cgi?id=15960
> 
> will ask them to test for-pci2 branch.
> 
> >
> >        With your approach; on a system with not enough resources to satisfy
> > all the devices, when you fail to allocate 'required+optional' in the first
> > round and fall back to assigning only the 'required' resources, you can get the
> > reassignment order wrong, thus not allocate resources to devices for which the
> > BIOS had originally allocated resources, and hence end up disabling the device.
> 
> so even required can not be satisfied?

Yes. Even required cannot be satisfied fully.

RP

Re: [PATCH 2/5] PCI: Try to assign required+option size at first

[Yinghai Lu]

[-- Attachment #1: Type: text/plain, Size: 931 bytes --]

On Sun, Jan 15, 2012 at 8:05 AM, Ram Pai <linuxram@us.ibm.com> wrote:
> On Fri, Jan 13, 2012 at 03:28:29PM -0800, Yinghai Lu wrote:
>> On Fri, Jan 13, 2012 at 8:39 AM, Ram Pai <linuxram@us.ibm.com> wrote:
>> > On Wed, Dec 07, 2011 at 12:53:01AM -0800, Yinghai Lu wrote:
>> >
>> >        I am worried that this approach will resurface old bug
>> > https://bugzilla.kernel.org/show_bug.cgi?id=15960
>>
>>
>> so even required can not be satisfied?
>
> Yes. Even required cannot be satisfied fully.

double check that bug, it is caused by we stop IO type too early.

attached patch should fix the problem.

Also I updated for-pci2 in my tree.

	git://git.kernel.org/pub/scm/linux/kernel/git/yinghai/linux-yinghai.git
for-pci2

Peter Henriksson,
Can you try for-pci2 branch on your setup with Xonar DX?

also we need to ask Linus to test it, looks like Linus have one setup
with Nouveau.

Thanks

Yinghai

[-- Attachment #2: pci_assign_unassigned_ioport.patch --]
[-- Type: text/x-patch, Size: 2388 bytes --]

Subject: [PATCH] PCI: Retry on type IORESOURCE_IO allocation.

During reenabling pci reallocating for pci bridge by clean the small size in
bridge and assign with requested + optional size for first several try,
Ram mention could have problem with one case
	https://bugzilla.kernel.org/show_bug.cgi?id=15960

After checking the booting log in
	https://lkml.org/lkml/2010/4/19/44
	[regression, bisected] Xonar DX invalid PCI I/O range since 977d17bb174

We should not stop too early for io ports.
	Apr 19 10:19:38 [kernel] pci 0000:04:00.0: BAR 7: can't assign io (size 0x4000)
	Apr 19 10:19:38 [kernel] pci 0000:05:01.0: BAR 8: assigned [mem 0x80400000-0x805fffff]
	Apr 19 10:19:38 [kernel] pci 0000:05:01.0: BAR 7: can't assign io (size 0x2000)
	Apr 19 10:19:38 [kernel] pci 0000:05:02.0: BAR 7: can't assign io (size 0x1000)
	Apr 19 10:19:38 [kernel] pci 0000:05:03.0: BAR 7: can't assign io (size 0x1000)
	Apr 19 10:19:38 [kernel] pci 0000:08:00.0: BAR 7: can't assign io (size 0x1000)
	Apr 19 10:19:38 [kernel] pci 0000:09:04.0: BAR 0: can't assign io (size 0x100)
and clear 00:1c.0 to retry again.

The patch remove the IORESOUCE_IO checking, and try one more time.
and we will have chance to get allocation for 00:1c.0 io port range because
from 0x4000 to 0x8000 could be used.

Signed-off-by: Yinghai Lu <yinghai@kernel.org>

---
 drivers/pci/setup-bus.c |   12 +-----------
 1 file changed, 1 insertion(+), 11 deletions(-)

Index: linux-2.6/drivers/pci/setup-bus.c
===================================================================
--- linux-2.6.orig/drivers/pci/setup-bus.c
+++ linux-2.6/drivers/pci/setup-bus.c
@@ -1278,7 +1278,6 @@ pci_assign_unassigned_resources(void)
 	struct pci_dev_resource *fail_res;
 	unsigned long type_mask = IORESOURCE_IO | IORESOURCE_MEM |
 				  IORESOURCE_PREFETCH;
-	unsigned long failed_type;
 	int pci_try_num = 1;
 
 	/* don't realloc if asked to do so */
@@ -1313,16 +1312,7 @@ again:
 	if (list_empty(&fail_head))
 		goto enable_and_dump;
 
-	failed_type = 0;
-	list_for_each_entry(fail_res, &fail_head, list)
-		failed_type |= fail_res->flags;
-
-	/*
-	 * io port are tight, don't try extra
-	 * or if reach the limit, don't want to try more
-	 */
-	failed_type &= type_mask;
-	if ((failed_type == IORESOURCE_IO) || (tried_times >= pci_try_num)) {
+	if (tried_times >= pci_try_num) {
 		free_list(&fail_head);
 		goto enable_and_dump;
 	}

Re: [PATCH 2/5] PCI: Try to assign required+option size at first

[Ram Pai]

On Sun, Jan 15, 2012 at 05:14:26PM -0800, Yinghai Lu wrote:
> On Sun, Jan 15, 2012 at 8:05 AM, Ram Pai <linuxram@us.ibm.com> wrote:
> > On Fri, Jan 13, 2012 at 03:28:29PM -0800, Yinghai Lu wrote:
> >> On Fri, Jan 13, 2012 at 8:39 AM, Ram Pai <linuxram@us.ibm.com> wrote:
> >> > On Wed, Dec 07, 2011 at 12:53:01AM -0800, Yinghai Lu wrote:
> >> >
> >> >        I am worried that this approach will resurface old bug
> >> > https://bugzilla.kernel.org/show_bug.cgi?id=15960
> >>
> >>
> >> so even required can not be satisfied?
> >
> > Yes. Even required cannot be satisfied fully.
> 
> double check that bug, it is caused by we stop IO type too early.
> 
> attached patch should fix the problem.
> 
> Also I updated for-pci2 in my tree.
> 
> 	git://git.kernel.org/pub/scm/linux/kernel/git/yinghai/linux-yinghai.git
> for-pci2
> 
> Peter Henriksson,
> Can you try for-pci2 branch on your setup with Xonar DX?

Peter should confirm it. But this patch will not fix the issue AFAICT.
Its not just about 'not enough resources', it also about making the right
choice of 'who should get the resource if there is contention'. Only the BIOS
knows about it. But we trash the BIOS's allocation and don't use that
knowledge when it comes to making those hard choices.

RP

Re: [PATCH 2/5] PCI: Try to assign required+option size at first

[Yinghai Lu]

On Sun, Jan 15, 2012 at 7:26 PM, Ram Pai <linuxram@us.ibm.com> wrote:
>> Also I updated for-pci2 in my tree.
>>
>>       git://git.kernel.org/pub/scm/linux/kernel/git/yinghai/linux-yinghai.git
>> for-pci2
>>
>> Peter Henriksson,
>> Can you try for-pci2 branch on your setup with Xonar DX?
>
> Peter should confirm it. But this patch will not fix the issue AFAICT.

Do you have similar setup to test that ?

> Its not just about 'not enough resources', it also about making the right
> choice of 'who should get the resource if there is contention'. Only the BIOS
> knows about it. But we trash the BIOS's allocation and don't use that
> knowledge when it comes to making those hard choices.

in extreme case, will let the user to use "pci=norealloc" to disable
changing pci bridge resource set by BIOS.

Yinghai

Re: [PATCH 2/5] PCI: Try to assign required+option size at first

[Ram Pai]

On Sun, Jan 15, 2012 at 08:54:46PM -0800, Yinghai Lu wrote:
> On Sun, Jan 15, 2012 at 7:26 PM, Ram Pai <linuxram@us.ibm.com> wrote:
> >> Also I updated for-pci2 in my tree.
> >>
> >>       git://git.kernel.org/pub/scm/linux/kernel/git/yinghai/linux-yinghai.git
> >> for-pci2
> >>
> >> Peter Henriksson,
> >> Can you try for-pci2 branch on your setup with Xonar DX?
> >
> > Peter should confirm it. But this patch will not fix the issue AFAICT.
> 
> Do you have similar setup to test that ?

No. :(

> 
> > Its not just about 'not enough resources', it also about making the right
> > choice of 'who should get the resource if there is contention'. Only the BIOS
> > knows about it. But we trash the BIOS's allocation and don't use that
> > knowledge when it comes to making those hard choices.
> 
> in extreme case, will let the user to use "pci=norealloc" to disable
> changing pci bridge resource set by BIOS.

I know its a pathological case. But still this issue will be viewed as a
regression.  I had to struggle to solve this regression in order to get your
realloc patch re-accepted. Don't know if you can successfully make a case
to by-pass the regression this time.

One way to solve this problem is to allocate 'required' resources first, and
later aggressively try to allocate 'required+optional' resources. However
aggressively allocation of those 'required+optional' resource would require
ensuring minimal internal fragmentation.

RP

Re: [PATCH 2/5] PCI: Try to assign required+option size at first

[Yinghai Lu]

On Mon, Jan 16, 2012 at 2:29 AM, Ram Pai <linuxram@us.ibm.com> wrote:
>> > Its not just about 'not enough resources', it also about making the right
>> > choice of 'who should get the resource if there is contention'. Only the BIOS
>> > knows about it. But we trash the BIOS's allocation and don't use that
>> > knowledge when it comes to making those hard choices.
>>
>> in extreme case, will let the user to use "pci=norealloc" to disable
>> changing pci bridge resource set by BIOS.
>
> I know its a pathological case. But still this issue will be viewed as a
> regression.  I had to struggle to solve this regression in order to get your
> realloc patch re-accepted. Don't know if you can successfully make a case
> to by-pass the regression this time.

Yes, you had introduced the optional res concept, and that is very good.

but we still have some problems that my new patch set try to fix:
1. sometimes optional size is not passed to up bridge level correctly.
2. requested the expand optional does not go extra upper level.
3. requested and then expand does not work on two requested +
optional, only can make one happy. because request stuck in the
middle.

>
> One way to solve this problem is to allocate 'required' resources first, and
> later aggressively try to allocate 'required+optional' resources. However
> aggressively allocation of those 'required+optional' resource would require
> ensuring minimal internal fragmentation.

that will make case 2: do not go extra level.

or we can do:
We try to auto detect if we need to enable realloc.
(something like sriov is enabled, but some SRIOV registers are not assigned)
(or card bus are there etc)

and
pci=realloc become
pci=realloc=off and pci=realloc=on
so user can forcely turn it or off.

Thanks

Yinghai

Re: [PATCH 2/5] PCI: Try to assign required+option size at first

[Yinghai Lu]

[-- Attachment #1: Type: text/plain, Size: 739 bytes --]

On Mon, Jan 16, 2012 at 9:13 AM, Yinghai Lu <yinghai@kernel.org> wrote:
> that will make case 2: do not go extra level.
>
> or we can do:
> We try to auto detect if we need to enable realloc.
> (something like sriov is enabled, but some SRIOV registers are not assigned)
> (or card bus are there etc)
>
> and
> pci=realloc become
> pci=realloc=off and pci=realloc=on
> so user can forcely turn it or off.

ok, updated one patch and add one new patch to enable pci realloc only
when sriov is not assigned.

please check attached two patches.

updated for-pci2 branch

    git://git.kernel.org/pub/scm/linux/kernel/git/yinghai/linux-yinghai.git
for-pci2

Can you please check that branch to see if it works on your setups ?

Thanks

Yinghai

[-- Attachment #2: pci_006_2_multi_try.patch --]
[-- Type: text/x-patch, Size: 3477 bytes --]

Subject: [PATCH 8/8] PCI: Make pci bridge reallocating enabled/disabled

Let the user could enable and disable with pci=realloc=on or pci=realloc=off

Also
1. move variable and functions near the place they are used.
2. change macro to function
3. change related functions and variable to static and _init
4. update parameter description accordingly.

Signed-off-by: Yinghai Lu <yinghai@kernel.org>

---
 Documentation/kernel-parameters.txt |    7 +++++--
 drivers/pci/pci.c                   |    4 ++--
 drivers/pci/pci.h                   |    2 +-
 drivers/pci/setup-bus.c             |   25 ++++++++++++++++++-------
 4 files changed, 26 insertions(+), 12 deletions(-)

Index: linux-2.6/drivers/pci/setup-bus.c
===================================================================
--- linux-2.6.orig/drivers/pci/setup-bus.c
+++ linux-2.6/drivers/pci/setup-bus.c
@@ -48,13 +48,6 @@ static void free_list(struct list_head *
 	}
 }
 
-int pci_realloc_enable = 0;
-#define pci_realloc_enabled() pci_realloc_enable
-void pci_realloc(void)
-{
-	pci_realloc_enable = 1;
-}
-
 /**
  * add_to_list() - add a new resource tracker to the list
  * @head:	Head of the list
@@ -1259,6 +1252,24 @@ static int __init pci_get_max_depth(void
 	return depth;
 }
 
+/*
+ * -1: undefined, will auto detect later
+ *  0: disabled by user
+ *  1: enabled by user
+ *  2: enabled by auto detect
+ */
+static int pci_realloc_enable __initdata = -1;
+void __init pci_realloc_get_opt(char *str)
+{
+	if (strncmp(str, "off", 3))
+		pci_realloc_enable = 0;
+	else if (strncmp(str, "on", 2))
+		pci_realloc_enable = 1;
+}
+static bool __init pci_realloc_enabled(void)
+{
+	return pci_realloc_enable > 0;
+}
 
 /*
  * first try will not touch pci bridge res
Index: linux-2.6/drivers/pci/pci.c
===================================================================
--- linux-2.6.orig/drivers/pci/pci.c
+++ linux-2.6/drivers/pci/pci.c
@@ -3714,8 +3714,8 @@ static int __init pci_setup(char *str)
 				pci_no_msi();
 			} else if (!strcmp(str, "noaer")) {
 				pci_no_aer();
-			} else if (!strncmp(str, "realloc", 7)) {
-				pci_realloc();
+			} else if (!strncmp(str, "realloc=", 8)) {
+				pci_realloc_get_opt(str + 8);
 			} else if (!strcmp(str, "nodomains")) {
 				pci_no_domains();
 			} else if (!strncmp(str, "cbiosize=", 9)) {
Index: linux-2.6/Documentation/kernel-parameters.txt
===================================================================
--- linux-2.6.orig/Documentation/kernel-parameters.txt
+++ linux-2.6/Documentation/kernel-parameters.txt
@@ -2104,8 +2104,11 @@ bytes respectively. Such letter suffixes
 				the default.
 				off: Turn ECRC off
 				on: Turn ECRC on.
-		realloc		reallocate PCI resources if allocations done by BIOS
-				are erroneous.
+		realloc=	Enable/disable reallocating PCI bridge resources
+				if allocations done by BIOS are too small to fit
+				resources required by children devices.
+				off: Turn realloc off
+				on: Turn realloc on
 
 	pcie_aspm=	[PCIE] Forcibly enable or disable PCIe Active State Power
 			Management.
Index: linux-2.6/drivers/pci/pci.h
===================================================================
--- linux-2.6.orig/drivers/pci/pci.h
+++ linux-2.6/drivers/pci/pci.h
@@ -148,7 +148,7 @@ static inline void pci_no_msi(void) { }
 static inline void pci_msi_init_pci_dev(struct pci_dev *dev) { }
 #endif
 
-extern void pci_realloc(void);
+void pci_realloc_get_opt(char *);
 
 static inline int pci_no_d1d2(struct pci_dev *dev)
 {

[-- Attachment #3: pci_realloc_auto_detect.patch --]
[-- Type: text/x-patch, Size: 1452 bytes --]

Subject: [PATCH] PCI: only enable pci realloc when SRIOV bar is not assigned

If bios does not assign those BAR or wrong address, then kernel will
try to do pci realloc.

in that case, user still can use pci=realloc=off to override it.

Signed-off-by: Yinghai Lu <yinghai@kernel.org>

---
 drivers/pci/setup-bus.c |   26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)

Index: linux-2.6/drivers/pci/setup-bus.c
===================================================================
--- linux-2.6.orig/drivers/pci/setup-bus.c
+++ linux-2.6/drivers/pci/setup-bus.c
@@ -1271,6 +1271,31 @@ static bool __init pci_realloc_enabled(v
 	return pci_realloc_enable > 0;
 }
 
+static void __init pci_realloc_detect(void)
+{
+	struct pci_dev *dev = NULL;
+
+	if (pci_realloc_enable != -1)
+		return;
+
+#ifdef CONFIG_PCI_IOV
+	for_each_pci_dev(dev) {
+		int i;
+
+		for (i = PCI_IOV_RESOURCES; i <= PCI_IOV_RESOURCE_END; i++) {
+			struct resource *r = &dev->resource[i];
+
+			/* Not assigned, or rejected by kernel */
+			if (r->flags && !r->start) {
+				pci_realloc_enable = 2;
+
+				return;
+			}
+		}
+	}
+#endif
+}
+
 /*
  * first try will not touch pci bridge res
  * second  and later try will clear small leaf bridge res
@@ -1292,6 +1317,7 @@ pci_assign_unassigned_resources(void)
 	int pci_try_num = 1;
 
 	/* don't realloc if asked to do so */
+	pci_realloc_detect();
 	if (pci_realloc_enabled()) {
 		int max_depth = pci_get_max_depth();
 

Re: [PATCH 2/5] PCI: Try to assign required+option size at first

[Peter Henriksson]

[-- Attachment #1: Type: text/plain, Size: 255 bytes --]

On Mon, Jan 16, 2012 at 2:14 AM, Yinghai Lu <yinghai@kernel.org> wrote:
> Peter Henriksson,
> Can you try for-pci2 branch on your setup with Xonar DX?
>

Attaching dmesg output with the for-pci2 branch. The Xonar DX appears
to be working.

Regards,
Peter

[-- Attachment #2: dmesg.txt --]
[-- Type: text/plain, Size: 56577 bytes --]

Initializing cgroup subsys cpu
Linux version 3.2.0-rc5+ (root@localhost) (gcc version 4.5.3 (Gentoo 4.5.3-r2 p1.0, pie-0.4.6) ) #1 SMP PREEMPT Mon Jan 16 20:18:18 CET 2012
BIOS-provided physical RAM map:
 BIOS-e820: 0000000000000000 - 000000000009ec00 (usable)
 BIOS-e820: 000000000009ec00 - 00000000000a0000 (reserved)
 BIOS-e820: 00000000000e5000 - 0000000000100000 (reserved)
 BIOS-e820: 0000000000100000 - 00000000cff40000 (usable)
 BIOS-e820: 00000000cff40000 - 00000000cff4e000 (ACPI data)
 BIOS-e820: 00000000cff4e000 - 00000000cffe0000 (ACPI NVS)
 BIOS-e820: 00000000cffe0000 - 00000000d0000000 (reserved)
 BIOS-e820: 00000000fee00000 - 00000000fee01000 (reserved)
 BIOS-e820: 00000000ffe00000 - 0000000100000000 (reserved)
 BIOS-e820: 0000000100000000 - 0000000130000000 (usable)
NX (Execute Disable) protection: active
DMI 2.4 present.
DMI: System manufacturer P5E64 WS EVOLUTION/P5E64 WS EVOLUTION, BIOS 0802    12/10/2008
e820 update range: 0000000000000000 - 0000000000010000 (usable) ==> (reserved)
e820 remove range: 00000000000a0000 - 0000000000100000 (usable)
last_pfn = 0x130000 max_arch_pfn = 0x1000000
MTRR default type: uncachable
MTRR fixed ranges enabled:
  00000-9FFFF write-back
  A0000-BFFFF uncachable
  C0000-DFFFF write-protect
  E0000-EFFFF write-through
  F0000-FFFFF write-protect
MTRR variable ranges enabled:
  0 base 0D0000000 mask FF0000000 uncachable
  1 base 0E0000000 mask FE0000000 uncachable
  2 base 000000000 mask F00000000 write-back
  3 base 100000000 mask FE0000000 write-back
  4 base 120000000 mask FF0000000 write-back
  5 disabled
  6 disabled
  7 disabled
x86 PAT enabled: cpu 0, old 0x7040600070406, new 0x7010600070106
e820 update range: 00000000d0000000 - 0000000100000000 (usable) ==> (reserved)
found SMP MP-table at [c00ff780] ff780
initial memory mapped : 0 - 01c00000
Base memory trampoline at [c009a000] 9a000 size 16384
init_memory_mapping: 0000000000000000-0000000037bfe000
 0000000000 - 0000200000 page 4k
 0000200000 - 0037a00000 page 2M
 0037a00000 - 0037bfe000 page 4k
kernel direct mapping tables up to 37bfe000 @ 1bfb000-1c00000
ACPI: RSDP 000faff0 00024 (v02 ACPIAM)
ACPI: XSDT cff40100 00054 (v01 A_M_I_ OEMXSDT  12000810 MSFT 00000097)
ACPI: FACP cff40290 000F4 (v03 A_M_I_ OEMFACP  12000810 MSFT 00000097)
ACPI: DSDT cff40440 09516 (v01  A0963 A0963031 00000031 INTL 20060113)
ACPI: FACS cff4e000 00040
ACPI: APIC cff40390 0006C (v01 A_M_I_ OEMAPIC  12000810 MSFT 00000097)
ACPI: MCFG cff40400 0003C (v01 A_M_I_ OEMMCFG  12000810 MSFT 00000097)
ACPI: OEMB cff4e040 00081 (v01 A_M_I_ AMI_OEM  12000810 MSFT 00000097)
ACPI: HPET cff49960 00038 (v01 A_M_I_ OEMHPET  12000810 MSFT 00000097)
ACPI: OSFR cff499a0 000B0 (v01 A_M_I_ OEMOSFR  12000810 MSFT 00000097)
ACPI: Local APIC address 0xfee00000
3972MB HIGHMEM available.
891MB LOWMEM available.
  mapped low ram: 0 - 37bfe000
  low ram: 0 - 37bfe000
Zone PFN ranges:
  DMA      0x00000010 -> 0x00001000
  Normal   0x00001000 -> 0x00037bfe
  HighMem  0x00037bfe -> 0x00130000
Movable zone start PFN for each node
early_node_map[3] active PFN ranges
    0: 0x00000010 -> 0x0000009e
    0: 0x00000100 -> 0x000cff40
    0: 0x00100000 -> 0x00130000
On node 0 totalpages: 1048270
free_area_init_node: node 0, pgdat c1663f40, node_mem_map f55fd200
  DMA zone: 32 pages used for memmap
  DMA zone: 0 pages reserved
  DMA zone: 3950 pages, LIFO batch:0
  Normal zone: 1752 pages used for memmap
  Normal zone: 222502 pages, LIFO batch:31
  HighMem zone: 7945 pages used for memmap
  HighMem zone: 812089 pages, LIFO batch:31
Using APIC driver default
ACPI: PM-Timer IO Port: 0x808
ACPI: Local APIC address 0xfee00000
ACPI: LAPIC (acpi_id[0x01] lapic_id[0x00] enabled)
ACPI: LAPIC (acpi_id[0x02] lapic_id[0x01] enabled)
ACPI: LAPIC (acpi_id[0x03] lapic_id[0x02] enabled)
ACPI: LAPIC (acpi_id[0x04] lapic_id[0x03] enabled)
ACPI: IOAPIC (id[0x04] address[0xfec00000] gsi_base[0])
IOAPIC[0]: apic_id 4, version 32, address 0xfec00000, GSI 0-23
ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl)
ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 high level)
ACPI: IRQ0 used by override.
ACPI: IRQ2 used by override.
ACPI: IRQ9 used by override.
Using ACPI (MADT) for SMP configuration information
ACPI: HPET id: 0x8086a301 base: 0xfed00000
SMP: Allowing 4 CPUs, 0 hotplug CPUs
nr_irqs_gsi: 40
PM: Registered nosave memory: 000000000009e000 - 000000000009f000
PM: Registered nosave memory: 000000000009f000 - 00000000000a0000
PM: Registered nosave memory: 00000000000a0000 - 00000000000e5000
PM: Registered nosave memory: 00000000000e5000 - 0000000000100000
Allocating PCI resources starting at d0000000 (gap: d0000000:2ee00000)
setup_percpu: NR_CPUS:8 nr_cpumask_bits:8 nr_cpu_ids:4 nr_node_ids:1
PERCPU: Embedded 11 pages/cpu @f5200000 s24064 r0 d20992 u524288
pcpu-alloc: s24064 r0 d20992 u524288 alloc=1*2097152
pcpu-alloc: [0] 0 1 2 3 
Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 1038541
Kernel command line: root=/dev/md3 init=/usr/bin/systemd
PID hash table entries: 4096 (order: 2, 16384 bytes)
Dentry cache hash table entries: 131072 (order: 7, 524288 bytes)
Inode-cache hash table entries: 65536 (order: 6, 262144 bytes)
Initializing CPU#0
Initializing HighMem for node 0 (00037bfe:00130000)
Memory: 4145640k/4980736k available (4656k kernel code, 47440k reserved, 1919k data, 380k init, 3280136k highmem)
virtual kernel memory layout:
    fixmap  : 0xfff17000 - 0xfffff000   ( 928 kB)
    pkmap   : 0xffc00000 - 0xffe00000   (2048 kB)
    vmalloc : 0xf83fe000 - 0xffbfe000   ( 120 MB)
    lowmem  : 0xc0000000 - 0xf7bfe000   ( 891 MB)
      .init : 0xc166d000 - 0xc16cc000   ( 380 kB)
      .data : 0xc148c363 - 0xc166c0c0   (1919 kB)
      .text : 0xc1000000 - 0xc148c363   (4656 kB)
Checking if this processor honours the WP bit even in supervisor mode...Ok.
SLUB: Genslabs=15, HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=1
Preemptible hierarchical RCU implementation.
NR_IRQS:2304 nr_irqs:712 16
CPU 0 irqstacks, hard=f4c08000 soft=f4c0a000
Extended CMOS year: 2000
Console: colour VGA+ 80x25
console [tty0] enabled
hpet clockevent registered
Fast TSC calibration using PIT
Detected 2671.896 MHz processor.
Calibrating delay loop (skipped), value calculated using timer frequency.. 5343.79 BogoMIPS (lpj=2671896)
pid_max: default: 32768 minimum: 301
Mount-cache hash table entries: 512
CPU: Physical Processor ID: 0
CPU: Processor Core ID: 0
mce: CPU supports 6 MCE banks
CPU0: Thermal monitoring enabled (TM2)
using mwait in idle threads.
ACPI: Core revision 20110623
Enabling APIC mode:  Flat.  Using 1 I/O APICs
..TIMER: vector=0x30 apic1=0 pin1=2 apic2=-1 pin2=-1
CPU0: Intel(R) Core(TM)2 Quad  CPU   Q9450  @ 2.66GHz stepping 07
Performance Events: PEBS fmt0+, Core2 events, Intel PMU driver.
... version:                2
... bit width:              40
... generic registers:      2
... value mask:             000000ffffffffff
... max period:             000000007fffffff
... fixed-purpose events:   3
... event mask:             0000000700000003
CPU 1 irqstacks, hard=f4c94000 soft=f4c96000
Booting Node   0, Processors  #1
smpboot cpu 1: start_ip = 9a000
Initializing CPU#1
CPU 2 irqstacks, hard=f4ca0000 soft=f4ca2000
 #2
smpboot cpu 2: start_ip = 9a000
Initializing CPU#2
CPU 3 irqstacks, hard=f4cb0000 soft=f4cb2000
 #3 Ok.
smpboot cpu 3: start_ip = 9a000
Initializing CPU#3
Brought up 4 CPUs
Total of 4 processors activated (21372.84 BogoMIPS).
devtmpfs: initialized
PM: Registering ACPI NVS region at cff4e000 (598016 bytes)
NET: Registered protocol family 16
ACPI: bus type pci registered
PCI: MMCONFIG for domain 0000 [bus 00-ff] at [mem 0xe0000000-0xefffffff] (base 0xe0000000)
PCI: not using MMCONFIG
PCI : PCI BIOS aera is rw and x. Use pci=nobios if you want it NX.
PCI: PCI BIOS revision 3.00 entry at 0xf0031, last bus=10
PCI: Using configuration type 1 for base access
bio: create slab <bio-0> at 0
ACPI: Added _OSI(Module Device)
ACPI: Added _OSI(Processor Device)
ACPI: Added _OSI(3.0 _SCP Extensions)
ACPI: Added _OSI(Processor Aggregator Device)
ACPI: EC: Look up EC in DSDT
ACPI: Executed 1 blocks of module-level executable AML code
ACPI: SSDT cff4e0d0 001D2 (v01    AMI   CPU1PM 00000001 INTL 20060113)
ACPI: Dynamic OEM Table Load:
ACPI: SSDT   (null) 001D2 (v01    AMI   CPU1PM 00000001 INTL 20060113)
ACPI: SSDT cff4e2b0 00143 (v01    AMI   CPU2PM 00000001 INTL 20060113)
ACPI: Dynamic OEM Table Load:
ACPI: SSDT   (null) 00143 (v01    AMI   CPU2PM 00000001 INTL 20060113)
ACPI: SSDT cff4e400 00143 (v01    AMI   CPU3PM 00000001 INTL 20060113)
ACPI: Dynamic OEM Table Load:
ACPI: SSDT   (null) 00143 (v01    AMI   CPU3PM 00000001 INTL 20060113)
ACPI: SSDT cff4e550 00143 (v01    AMI   CPU4PM 00000001 INTL 20060113)
ACPI: Dynamic OEM Table Load:
ACPI: SSDT   (null) 00143 (v01    AMI   CPU4PM 00000001 INTL 20060113)
ACPI: Interpreter enabled
ACPI: (supports S0 S1 S3 S4 S5)
ACPI: Using IOAPIC for interrupt routing
PCI: MMCONFIG for domain 0000 [bus 00-ff] at [mem 0xe0000000-0xefffffff] (base 0xe0000000)
PCI: MMCONFIG at [mem 0xe0000000-0xefffffff] reserved in ACPI motherboard resources
PCI: Using MMCONFIG for extended config space
ACPI: No dock devices found.
PCI: Using host bridge windows from ACPI; if necessary, use "pci=nocrs" and report a bug
ACPI: PCI Root Bridge [PCI0] (domain 0000 [bus 00-ff])
pci_root PNP0A08:00: host bridge window [io  0x0000-0x0cf7]
pci_root PNP0A08:00: host bridge window [io  0x0d00-0xffff]
pci_root PNP0A08:00: host bridge window [mem 0x000a0000-0x000bffff]
pci_root PNP0A08:00: host bridge window [mem 0x000d0000-0x000dffff]
pci_root PNP0A08:00: host bridge window [mem 0xd0000000-0xffffffff]
pci 0000:00:00.0: [8086:29e0] type 0 class 0x000600
pci 0000:00:01.0: [8086:29e1] type 1 class 0x000604
pci 0000:00:01.0: PME# supported from D0 D3hot D3cold
pci 0000:00:01.0: PME# disabled
pci 0000:00:1a.0: [8086:2937] type 0 class 0x000c03
pci 0000:00:1a.0: reg 20: [io  0x9800-0x981f]
pci 0000:00:1a.1: [8086:2938] type 0 class 0x000c03
pci 0000:00:1a.1: reg 20: [io  0x9880-0x989f]
pci 0000:00:1a.2: [8086:2939] type 0 class 0x000c03
pci 0000:00:1a.2: reg 20: [io  0x9c00-0x9c1f]
pci 0000:00:1a.7: [8086:293c] type 0 class 0x000c03
pci 0000:00:1a.7: reg 10: [mem 0xfe6ffc00-0xfe6fffff]
pci 0000:00:1a.7: PME# supported from D0 D3hot D3cold
pci 0000:00:1a.7: PME# disabled
pci 0000:00:1c.0: [8086:2940] type 1 class 0x000604
pci 0000:00:1c.0: PME# supported from D0 D3hot D3cold
pci 0000:00:1c.0: PME# disabled
pci 0000:00:1c.4: [8086:2948] type 1 class 0x000604
pci 0000:00:1c.4: PME# supported from D0 D3hot D3cold
pci 0000:00:1c.4: PME# disabled
pci 0000:00:1c.5: [8086:294a] type 1 class 0x000604
pci 0000:00:1c.5: PME# supported from D0 D3hot D3cold
pci 0000:00:1c.5: PME# disabled
pci 0000:00:1d.0: [8086:2934] type 0 class 0x000c03
pci 0000:00:1d.0: reg 20: [io  0x9080-0x909f]
pci 0000:00:1d.1: [8086:2935] type 0 class 0x000c03
pci 0000:00:1d.1: reg 20: [io  0x9400-0x941f]
pci 0000:00:1d.2: [8086:2936] type 0 class 0x000c03
pci 0000:00:1d.2: reg 20: [io  0x9480-0x949f]
pci 0000:00:1d.7: [8086:293a] type 0 class 0x000c03
pci 0000:00:1d.7: reg 10: [mem 0xfe6ff800-0xfe6ffbff]
pci 0000:00:1d.7: PME# supported from D0 D3hot D3cold
pci 0000:00:1d.7: PME# disabled
pci 0000:00:1e.0: [8086:244e] type 1 class 0x000604
pci 0000:00:1f.0: [8086:2916] type 0 class 0x000601
pci 0000:00:1f.0: ICH7 LPC Generic IO decode 1 PIO at 0294 (mask 0003)
pci 0000:00:1f.2: [8086:2922] type 0 class 0x000106
pci 0000:00:1f.2: reg 10: [io  0x8c00-0x8c07]
pci 0000:00:1f.2: reg 14: [io  0x8880-0x8883]
pci 0000:00:1f.2: reg 18: [io  0x8800-0x8807]
pci 0000:00:1f.2: reg 1c: [io  0x8480-0x8483]
pci 0000:00:1f.2: reg 20: [io  0x8400-0x841f]
pci 0000:00:1f.2: reg 24: [mem 0xfe6fe800-0xfe6fefff]
pci 0000:00:1f.2: PME# supported from D3hot
pci 0000:00:1f.2: PME# disabled
pci 0000:00:1f.3: [8086:2930] type 0 class 0x000c05
pci 0000:00:1f.3: reg 10: [mem 0xfe6ff400-0xfe6ff4ff 64bit]
pci 0000:00:1f.3: reg 20: [io  0x0400-0x041f]
pci 0000:01:00.0: [1002:68b8] type 0 class 0x000300
pci 0000:01:00.0: reg 10: [mem 0xd0000000-0xdfffffff 64bit pref]
pci 0000:01:00.0: reg 18: [mem 0xfe7c0000-0xfe7dffff 64bit]
pci 0000:01:00.0: reg 20: [io  0xa000-0xa0ff]
pci 0000:01:00.0: reg 30: [mem 0xfe7a0000-0xfe7bffff pref]
pci 0000:01:00.0: supports D1 D2
pci 0000:01:00.1: [1002:aa58] type 0 class 0x000403
pci 0000:01:00.1: reg 10: [mem 0xfe7fc000-0xfe7fffff 64bit]
pci 0000:01:00.1: supports D1 D2
pci 0000:00:01.0: PCI bridge to [bus 01-01]
pci 0000:00:01.0:   bridge window [io  0xa000-0xafff]
pci 0000:00:01.0:   bridge window [mem 0xfe700000-0xfe7fffff]
pci 0000:00:01.0:   bridge window [mem 0xd0000000-0xdfffffff 64bit pref]
pci 0000:04:00.0: [10b5:8518] type 1 class 0x000604
pci 0000:04:00.0: reg 10: [mem 0xfeae0000-0xfeafffff]
pci 0000:04:00.0: PME# supported from D0 D3hot D3cold
pci 0000:04:00.0: PME# disabled
pci 0000:04:00.0: disabling ASPM on pre-1.1 PCIe device.  You can enable it with 'pcie_aspm=force'
pci 0000:00:1c.0: PCI bridge to [bus 04-09]
pci 0000:00:1c.0:   bridge window [io  0xd000-0xdfff]
pci 0000:00:1c.0:   bridge window [mem 0xfea00000-0xfeafffff]
pci 0000:00:1c.0:   bridge window [mem 0xfde00000-0xfdffffff 64bit pref]
pci 0000:05:01.0: [10b5:8518] type 1 class 0x000604
pci 0000:05:01.0: PME# supported from D0 D3hot D3cold
pci 0000:05:01.0: PME# disabled
pci 0000:05:01.0: disabling ASPM on pre-1.1 PCIe device.  You can enable it with 'pcie_aspm=force'
pci 0000:05:02.0: [10b5:8518] type 1 class 0x000604
pci 0000:05:02.0: PME# supported from D0 D3hot D3cold
pci 0000:05:02.0: PME# disabled
pci 0000:05:01.0: disabling ASPM on pre-1.1 PCIe device.  You can enable it with 'pcie_aspm=force'
pci 0000:05:03.0: [10b5:8518] type 1 class 0x000604
pci 0000:05:03.0: PME# supported from D0 D3hot D3cold
pci 0000:05:03.0: PME# disabled
pci 0000:05:01.0: disabling ASPM on pre-1.1 PCIe device.  You can enable it with 'pcie_aspm=force'
pci 0000:04:00.0: PCI bridge to [bus 05-09]
pci 0000:04:00.0:   bridge window [io  0xd000-0xdfff]
pci 0000:04:00.0:   bridge window [mem 0xfde00000-0xfdffffff 64bit pref]
pci 0000:08:00.0: [10b5:8112] type 1 class 0x000604
pci 0000:08:00.0: disabling ASPM on pre-1.1 PCIe device.  You can enable it with 'pcie_aspm=force'
pci 0000:05:01.0: PCI bridge to [bus 08-09]
pci 0000:05:01.0:   bridge window [io  0xd000-0xdfff]
pci 0000:09:04.0: [13f6:8788] type 0 class 0x000401
pci 0000:09:04.0: reg 10: [io  0xd800-0xd8ff]
pci 0000:09:04.0: supports D1 D2
pci 0000:08:00.0: PCI bridge to [bus 09-09]
pci 0000:08:00.0:   bridge window [io  0xd000-0xdfff]
pci 0000:05:02.0: PCI bridge to [bus 07-07]
pci 0000:05:02.0:   bridge window [mem 0xfdf00000-0xfdffffff 64bit pref]
pci 0000:05:03.0: PCI bridge to [bus 06-06]
pci 0000:05:03.0:   bridge window [mem 0xfde00000-0xfdefffff 64bit pref]
pci 0000:03:00.0: [11ab:6145] type 0 class 0x000101
pci 0000:03:00.0: reg 10: [io  0xcc00-0xcc07]
pci 0000:03:00.0: reg 14: [io  0xc880-0xc883]
pci 0000:03:00.0: reg 18: [io  0xc800-0xc807]
pci 0000:03:00.0: reg 1c: [io  0xc480-0xc483]
pci 0000:03:00.0: reg 20: [io  0xc400-0xc40f]
pci 0000:03:00.0: reg 24: [mem 0xfe9ffc00-0xfe9fffff]
pci 0000:03:00.0: reg 30: [mem 0xfe980000-0xfe9bffff pref]
pci 0000:03:00.0: supports D1
pci 0000:03:00.0: PME# supported from D0 D1 D3hot
pci 0000:03:00.0: PME# disabled
pci 0000:03:00.0: disabling ASPM on pre-1.1 PCIe device.  You can enable it with 'pcie_aspm=force'
pci 0000:00:1c.4: PCI bridge to [bus 03-03]
pci 0000:00:1c.4:   bridge window [io  0xc000-0xcfff]
pci 0000:00:1c.4:   bridge window [mem 0xfe900000-0xfe9fffff]
pci 0000:02:00.0: [11ab:4364] type 0 class 0x000200
pci 0000:02:00.0: reg 10: [mem 0xfe8fc000-0xfe8fffff 64bit]
pci 0000:02:00.0: reg 18: [io  0xb800-0xb8ff]
pci 0000:02:00.0: reg 30: [mem 0xfe8c0000-0xfe8dffff pref]
pci 0000:02:00.0: supports D1 D2
pci 0000:02:00.0: PME# supported from D0 D1 D2 D3hot D3cold
pci 0000:02:00.0: PME# disabled
pci 0000:00:1c.5: PCI bridge to [bus 02-02]
pci 0000:00:1c.5:   bridge window [io  0xb000-0xbfff]
pci 0000:00:1c.5:   bridge window [mem 0xfe800000-0xfe8fffff]
pci 0000:0a:04.0: [11ab:4320] type 0 class 0x000200
pci 0000:0a:04.0: reg 10: [mem 0xfebfc000-0xfebfffff]
pci 0000:0a:04.0: reg 14: [io  0xe800-0xe8ff]
pci 0000:0a:04.0: reg 30: [mem 0xfebc0000-0xfebdffff pref]
pci 0000:0a:04.0: supports D1 D2
pci 0000:0a:04.0: PME# supported from D0 D1 D2 D3hot D3cold
pci 0000:0a:04.0: PME# disabled
pci 0000:00:1e.0: PCI bridge to [bus 0a-0a] (subtractive decode)
pci 0000:00:1e.0:   bridge window [io  0xe000-0xefff]
pci 0000:00:1e.0:   bridge window [mem 0xfeb00000-0xfebfffff]
pci 0000:00:1e.0:   bridge window [io  0x0000-0x0cf7] (subtractive decode)
pci 0000:00:1e.0:   bridge window [io  0x0d00-0xffff] (subtractive decode)
pci 0000:00:1e.0:   bridge window [mem 0x000a0000-0x000bffff] (subtractive decode)
pci 0000:00:1e.0:   bridge window [mem 0x000d0000-0x000dffff] (subtractive decode)
pci 0000:00:1e.0:   bridge window [mem 0xd0000000-0xffffffff] (subtractive decode)
pci_bus 0000:00: on NUMA node 0
ACPI: PCI Interrupt Routing Table [\_SB_.PCI0._PRT]
ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.P0P2._PRT]
ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.P0P1._PRT]
ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.P0P4._PRT]
ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.P0P8._PRT]
ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.P0P9._PRT]
 pci0000:00: Unable to request _OSC control (_OSC support mask: 0x0f)
ACPI: PCI Interrupt Link [LNKA] (IRQs 3 4 5 6 7 10 *11 12 14 15)
ACPI: PCI Interrupt Link [LNKB] (IRQs 3 4 5 6 7 *10 11 12 14 15)
ACPI: PCI Interrupt Link [LNKC] (IRQs 3 4 *5 6 7 10 11 12 14 15)
ACPI: PCI Interrupt Link [LNKD] (IRQs 3 4 5 6 7 10 11 12 14 *15)
ACPI: PCI Interrupt Link [LNKE] (IRQs 3 4 5 6 7 10 11 12 14 15) *0, disabled.
ACPI: PCI Interrupt Link [LNKF] (IRQs *3 4 5 6 7 10 11 12 14 15)
ACPI: PCI Interrupt Link [LNKG] (IRQs 3 *4 5 6 7 10 11 12 14 15)
ACPI: PCI Interrupt Link [LNKH] (IRQs 3 4 5 6 *7 10 11 12 14 15)
vgaarb: device added: PCI:0000:01:00.0,decodes=io+mem,owns=io+mem,locks=none
vgaarb: loaded
vgaarb: bridge control possible 0000:01:00.0
SCSI subsystem initialized
libata version 3.00 loaded.
usbcore: registered new interface driver usbfs
usbcore: registered new interface driver hub
usbcore: registered new device driver usb
wmi: Mapper loaded
Advanced Linux Sound Architecture Driver Version 1.0.24.
PCI: Using ACPI for IRQ routing
PCI: pci_cache_line_size set to 64 bytes
reserve RAM buffer: 000000000009ec00 - 000000000009ffff 
reserve RAM buffer: 00000000cff40000 - 00000000cfffffff 
Bluetooth: Core ver 2.16
NET: Registered protocol family 31
Bluetooth: HCI device and connection manager initialized
Bluetooth: HCI socket layer initialized
Bluetooth: L2CAP socket layer initialized
Bluetooth: SCO socket layer initialized
hpet0: at MMIO 0xfed00000, IRQs 2, 8, 0, 0
hpet0: 4 comparators, 64-bit 14.318180 MHz counter
Switching to clocksource hpet
pnp: PnP ACPI init
ACPI: bus type pnp registered
pnp 00:00: [bus 00-ff]
pnp 00:00: [io  0x0cf8-0x0cff]
pnp 00:00: [io  0x0000-0x0cf7 window]
pnp 00:00: [io  0x0d00-0xffff window]
pnp 00:00: [mem 0x000a0000-0x000bffff window]
pnp 00:00: [mem 0x000d0000-0x000dffff window]
pnp 00:00: [mem 0xd0000000-0xffffffff window]
pnp 00:00: Plug and Play ACPI device, IDs PNP0a08 PNP0a03 (active)
pnp 00:01: [mem 0xfed14000-0xfed19fff]
system 00:01: [mem 0xfed14000-0xfed19fff] has been reserved
system 00:01: Plug and Play ACPI device, IDs PNP0c01 (active)
pnp 00:02: [dma 4]
pnp 00:02: [io  0x0000-0x000f]
pnp 00:02: [io  0x0081-0x0083]
pnp 00:02: [io  0x0087]
pnp 00:02: [io  0x0089-0x008b]
pnp 00:02: [io  0x008f]
pnp 00:02: [io  0x00c0-0x00df]
pnp 00:02: Plug and Play ACPI device, IDs PNP0200 (active)
pnp 00:03: [io  0x0070-0x0071]
pnp 00:03: [irq 8]
pnp 00:03: Plug and Play ACPI device, IDs PNP0b00 (active)
pnp 00:04: [io  0x0061]
pnp 00:04: Plug and Play ACPI device, IDs PNP0800 (active)
pnp 00:05: [io  0x00f0-0x00ff]
pnp 00:05: [irq 13]
pnp 00:05: Plug and Play ACPI device, IDs PNP0c04 (active)
pnp 00:06: [io  0x0000-0xffffffffffffffff disabled]
pnp 00:06: [io  0x0000-0xffffffffffffffff disabled]
pnp 00:06: [io  0x0290-0x0297]
system 00:06: [io  0x0290-0x0297] has been reserved
system 00:06: Plug and Play ACPI device, IDs PNP0c02 (active)
pnp 00:07: [io  0x0010-0x001f]
pnp 00:07: [io  0x0022-0x003f]
pnp 00:07: [io  0x0044-0x004d]
pnp 00:07: [io  0x0050-0x005f]
pnp 00:07: [io  0x0062-0x0063]
pnp 00:07: [io  0x0065-0x006f]
pnp 00:07: [io  0x0072-0x007f]
pnp 00:07: [io  0x0080]
pnp 00:07: [io  0x0084-0x0086]
pnp 00:07: [io  0x0088]
pnp 00:07: [io  0x008c-0x008e]
pnp 00:07: [io  0x0090-0x009f]
pnp 00:07: [io  0x00a2-0x00bf]
pnp 00:07: [io  0x00e0-0x00ef]
pnp 00:07: [io  0x04d0-0x04d1]
pnp 00:07: [io  0x0800-0x087f]
pnp 00:07: [io  0x0400-0x03ff disabled]
pnp 00:07: [io  0x0480-0x04bf]
pnp 00:07: [mem 0xfed1c000-0xfed1ffff]
pnp 00:07: [mem 0xfed20000-0xfed3ffff]
pnp 00:07: [mem 0xfed50000-0xfed8ffff]
pnp 00:07: [mem 0xffa00000-0xffafffff]
pnp 00:07: [mem 0xffb00000-0xffbfffff]
pnp 00:07: [mem 0xffe00000-0xffefffff]
pnp 00:07: [mem 0xfff00000-0xfffffffe]
system 00:07: [io  0x04d0-0x04d1] has been reserved
system 00:07: [io  0x0800-0x087f] has been reserved
system 00:07: [io  0x0480-0x04bf] has been reserved
system 00:07: [mem 0xfed1c000-0xfed1ffff] has been reserved
system 00:07: [mem 0xfed20000-0xfed3ffff] has been reserved
system 00:07: [mem 0xfed50000-0xfed8ffff] has been reserved
system 00:07: [mem 0xffa00000-0xffafffff] has been reserved
system 00:07: [mem 0xffb00000-0xffbfffff] has been reserved
system 00:07: [mem 0xffe00000-0xffefffff] has been reserved
system 00:07: [mem 0xfff00000-0xfffffffe] has been reserved
system 00:07: Plug and Play ACPI device, IDs PNP0c02 (active)
pnp 00:08: [mem 0xfed00000-0xfed003ff]
pnp 00:08: Plug and Play ACPI device, IDs PNP0103 (active)
pnp 00:09: [mem 0xffa00000-0xffbfffff]
pnp 00:09: [mem 0xffe00000-0xffffffff]
pnp 00:09: Plug and Play ACPI device, IDs INT0800 (active)
pnp 00:0a: [mem 0xffc00000-0xffdfffff]
system 00:0a: [mem 0xffc00000-0xffdfffff] has been reserved
system 00:0a: Plug and Play ACPI device, IDs PNP0c02 (active)
pnp 00:0b: [mem 0xfec00000-0xfec00fff]
pnp 00:0b: [mem 0xfee00000-0xfee00fff]
system 00:0b: [mem 0xfec00000-0xfec00fff] could not be reserved
system 00:0b: [mem 0xfee00000-0xfee00fff] has been reserved
system 00:0b: Plug and Play ACPI device, IDs PNP0c02 (active)
pnp 00:0c: [io  0x0060]
pnp 00:0c: [io  0x0064]
pnp 00:0c: [irq 1]
pnp 00:0c: Plug and Play ACPI device, IDs PNP0303 PNP030b (active)
pnp 00:0d: [mem 0xe0000000-0xefffffff]
system 00:0d: [mem 0xe0000000-0xefffffff] has been reserved
system 00:0d: Plug and Play ACPI device, IDs PNP0c02 (active)
pnp 00:0e: [mem 0x00000000-0x0009ffff]
pnp 00:0e: [mem 0x000c0000-0x000cffff]
pnp 00:0e: [mem 0x000e0000-0x000fffff]
pnp 00:0e: [mem 0x00100000-0xcfffffff]
pnp 00:0e: [mem 0x00000000-0xffffffffffffffff disabled]
system 00:0e: [mem 0x00000000-0x0009ffff] could not be reserved
system 00:0e: [mem 0x000c0000-0x000cffff] could not be reserved
system 00:0e: [mem 0x000e0000-0x000fffff] could not be reserved
system 00:0e: [mem 0x00100000-0xcfffffff] could not be reserved
system 00:0e: Plug and Play ACPI device, IDs PNP0c01 (active)
pnp: PnP ACPI: found 15 devices
ACPI: ACPI bus type pnp unregistered
PCI: max bus depth: 4 pci_try_num: 5
pci 0000:00:1c.4: BAR 9: assigned [mem 0xf0000000-0xf01fffff 64bit pref]
pci 0000:00:1c.5: BAR 9: assigned [mem 0xf0200000-0xf03fffff 64bit pref]
pci 0000:00:01.0: PCI bridge to [bus 01-01]
pci 0000:00:01.0:   bridge window [io  0xa000-0xafff]
pci 0000:00:01.0:   bridge window [mem 0xfe700000-0xfe7fffff]
pci 0000:00:01.0:   bridge window [mem 0xd0000000-0xdfffffff 64bit pref]
pci 0000:04:00.0: BAR 8: can't assign mem (size 0xc00000)
pci 0000:05:01.0: BAR 8: can't assign mem (size 0x200000)
pci 0000:05:01.0: BAR 9: can't assign mem pref (size 0x200000)
pci 0000:05:02.0: BAR 8: can't assign mem (size 0x400000)
pci 0000:05:03.0: BAR 8: can't assign mem (size 0x400000)
pci 0000:05:02.0: BAR 7: can't assign io (size 0x1000)
pci 0000:05:03.0: BAR 7: can't assign io (size 0x1000)
pci 0000:08:00.0: PCI bridge to [bus 09-09]
pci 0000:08:00.0:   bridge window [io  0xd000-0xdfff]
pci 0000:05:01.0: PCI bridge to [bus 08-09]
pci 0000:05:01.0:   bridge window [io  0xd000-0xdfff]
pci 0000:05:02.0: PCI bridge to [bus 07-07]
pci 0000:05:02.0:   bridge window [mem 0xfdf00000-0xfdffffff 64bit pref]
pci 0000:05:03.0: PCI bridge to [bus 06-06]
pci 0000:05:03.0:   bridge window [mem 0xfde00000-0xfdefffff 64bit pref]
pci 0000:04:00.0: PCI bridge to [bus 05-09]
pci 0000:04:00.0:   bridge window [io  0xd000-0xdfff]
pci 0000:04:00.0:   bridge window [mem 0xfde00000-0xfdffffff 64bit pref]
pci 0000:00:1c.0: PCI bridge to [bus 04-09]
pci 0000:00:1c.0:   bridge window [io  0xd000-0xdfff]
pci 0000:00:1c.0:   bridge window [mem 0xfea00000-0xfeafffff]
pci 0000:00:1c.0:   bridge window [mem 0xfde00000-0xfdffffff 64bit pref]
pci 0000:00:1c.4: PCI bridge to [bus 03-03]
pci 0000:00:1c.4:   bridge window [io  0xc000-0xcfff]
pci 0000:00:1c.4:   bridge window [mem 0xfe900000-0xfe9fffff]
pci 0000:00:1c.4:   bridge window [mem 0xf0000000-0xf01fffff 64bit pref]
pci 0000:00:1c.5: PCI bridge to [bus 02-02]
pci 0000:00:1c.5:   bridge window [io  0xb000-0xbfff]
pci 0000:00:1c.5:   bridge window [mem 0xfe800000-0xfe8fffff]
pci 0000:00:1c.5:   bridge window [mem 0xf0200000-0xf03fffff 64bit pref]
pci 0000:00:1e.0: PCI bridge to [bus 0a-0a]
pci 0000:00:1e.0:   bridge window [io  0xe000-0xefff]
pci 0000:00:1e.0:   bridge window [mem 0xfeb00000-0xfebfffff]
PCI: No. 2 try to assign unassigned res
pci 0000:00:01.0: PCI bridge to [bus 01-01]
pci 0000:00:01.0:   bridge window [io  0xa000-0xafff]
pci 0000:00:01.0:   bridge window [mem 0xfe700000-0xfe7fffff]
pci 0000:00:01.0:   bridge window [mem 0xd0000000-0xdfffffff 64bit pref]
pci 0000:04:00.0: BAR 8: can't assign mem (size 0xc00000)
pci 0000:05:01.0: BAR 8: can't assign mem (size 0x200000)
pci 0000:05:01.0: BAR 9: can't assign mem pref (size 0x200000)
pci 0000:05:02.0: BAR 8: can't assign mem (size 0x400000)
pci 0000:05:03.0: BAR 8: can't assign mem (size 0x400000)
pci 0000:05:02.0: BAR 7: can't assign io (size 0x1000)
pci 0000:05:03.0: BAR 7: can't assign io (size 0x1000)
pci 0000:08:00.0: PCI bridge to [bus 09-09]
pci 0000:08:00.0:   bridge window [io  0xd000-0xdfff]
pci 0000:05:01.0: PCI bridge to [bus 08-09]
pci 0000:05:01.0:   bridge window [io  0xd000-0xdfff]
pci 0000:05:02.0: PCI bridge to [bus 07-07]
pci 0000:05:02.0:   bridge window [mem 0xfdf00000-0xfdffffff 64bit pref]
pci 0000:05:03.0: PCI bridge to [bus 06-06]
pci 0000:05:03.0:   bridge window [mem 0xfde00000-0xfdefffff 64bit pref]
pci 0000:04:00.0: PCI bridge to [bus 05-09]
pci 0000:04:00.0:   bridge window [io  0xd000-0xdfff]
pci 0000:04:00.0:   bridge window [mem 0xfde00000-0xfdffffff 64bit pref]
pci 0000:00:1c.0: PCI bridge to [bus 04-09]
pci 0000:00:1c.0:   bridge window [io  0xd000-0xdfff]
pci 0000:00:1c.0:   bridge window [mem 0xfea00000-0xfeafffff]
pci 0000:00:1c.0:   bridge window [mem 0xfde00000-0xfdffffff 64bit pref]
pci 0000:00:1c.4: PCI bridge to [bus 03-03]
pci 0000:00:1c.4:   bridge window [io  0xc000-0xcfff]
pci 0000:00:1c.4:   bridge window [mem 0xfe900000-0xfe9fffff]
pci 0000:00:1c.4:   bridge window [mem 0xf0000000-0xf01fffff 64bit pref]
pci 0000:00:1c.5: PCI bridge to [bus 02-02]
pci 0000:00:1c.5:   bridge window [io  0xb000-0xbfff]
pci 0000:00:1c.5:   bridge window [mem 0xfe800000-0xfe8fffff]
pci 0000:00:1c.5:   bridge window [mem 0xf0200000-0xf03fffff 64bit pref]
pci 0000:00:1e.0: PCI bridge to [bus 0a-0a]
pci 0000:00:1e.0:   bridge window [io  0xe000-0xefff]
pci 0000:00:1e.0:   bridge window [mem 0xfeb00000-0xfebfffff]
PCI: No. 3 try to assign unassigned res
release child resource [io  0xd800-0xd8ff]
pci 0000:08:00.0: resource 7 [io  0xd000-0xdfff] released
pci 0000:08:00.0: PCI bridge to [bus 09-09]
pci 0000:05:01.0: resource 7 [io  0xd000-0xdfff] released
pci 0000:05:01.0: PCI bridge to [bus 08-09]
pci 0000:04:00.0: resource 7 [io  0xd000-0xdfff] released
pci 0000:04:00.0: PCI bridge to [bus 05-09]
pci 0000:05:02.0: resource 9 [mem 0xfdf00000-0xfdffffff 64bit pref] released
pci 0000:05:02.0: PCI bridge to [bus 07-07]
pci 0000:05:03.0: resource 9 [mem 0xfde00000-0xfdefffff 64bit pref] released
pci 0000:05:03.0: PCI bridge to [bus 06-06]
pci 0000:04:00.0: resource 9 [mem 0xfde00000-0xfdffffff 64bit pref] released
pci 0000:04:00.0: PCI bridge to [bus 05-09]
release child resource [mem 0xfeae0000-0xfeafffff]
pci 0000:00:1c.0: resource 8 [mem 0xfea00000-0xfeafffff] released
pci 0000:00:1c.0: PCI bridge to [bus 04-09]
pci 0000:00:1c.0: BAR 8: assigned [mem 0xf0400000-0xf16fffff]
pci 0000:00:01.0: PCI bridge to [bus 01-01]
pci 0000:00:01.0:   bridge window [io  0xa000-0xafff]
pci 0000:00:01.0:   bridge window [mem 0xfe700000-0xfe7fffff]
pci 0000:00:01.0:   bridge window [mem 0xd0000000-0xdfffffff 64bit pref]
pci 0000:04:00.0: BAR 8: assigned [mem 0xf0400000-0xf0ffffff]
pci 0000:04:00.0: BAR 9: assigned [mem 0xf1000000-0xf15fffff 64bit pref]
pci 0000:04:00.0: BAR 0: assigned [mem 0xf1600000-0xf161ffff]
pci 0000:04:00.0: BAR 0: set to [mem 0xf1600000-0xf161ffff] (PCI address [0xf1600000-0xf161ffff])
pci 0000:04:00.0: BAR 7: can't assign io (size 0x4000)
pci 0000:05:01.0: BAR 8: assigned [mem 0xf0400000-0xf05fffff]
pci 0000:05:01.0: BAR 9: assigned [mem 0xf1000000-0xf11fffff 64bit pref]
pci 0000:05:02.0: BAR 8: assigned [mem 0xf0600000-0xf09fffff]
pci 0000:05:02.0: BAR 9: assigned [mem 0xf1200000-0xf13fffff 64bit pref]
pci 0000:05:03.0: BAR 8: assigned [mem 0xf0a00000-0xf0dfffff]
pci 0000:05:03.0: BAR 9: assigned [mem 0xf1400000-0xf15fffff 64bit pref]
pci 0000:05:01.0: BAR 7: can't assign io (size 0x2000)
pci 0000:05:02.0: BAR 7: can't assign io (size 0x1000)
pci 0000:05:03.0: BAR 7: can't assign io (size 0x1000)
pci 0000:08:00.0: BAR 7: can't assign io (size 0x1000)
pci 0000:09:04.0: BAR 0: can't assign io (size 0x100)
pci 0000:08:00.0: PCI bridge to [bus 09-09]
pci 0000:05:01.0: PCI bridge to [bus 08-09]
pci 0000:05:01.0:   bridge window [mem 0xf0400000-0xf05fffff]
pci 0000:05:01.0:   bridge window [mem 0xf1000000-0xf11fffff 64bit pref]
pci 0000:05:02.0: PCI bridge to [bus 07-07]
pci 0000:05:02.0:   bridge window [mem 0xf0600000-0xf09fffff]
pci 0000:05:02.0:   bridge window [mem 0xf1200000-0xf13fffff 64bit pref]
pci 0000:05:03.0: PCI bridge to [bus 06-06]
pci 0000:05:03.0:   bridge window [mem 0xf0a00000-0xf0dfffff]
pci 0000:05:03.0:   bridge window [mem 0xf1400000-0xf15fffff 64bit pref]
pci 0000:04:00.0: PCI bridge to [bus 05-09]
pci 0000:04:00.0:   bridge window [mem 0xf0400000-0xf0ffffff]
pci 0000:04:00.0:   bridge window [mem 0xf1000000-0xf15fffff 64bit pref]
pci 0000:00:1c.0: PCI bridge to [bus 04-09]
pci 0000:00:1c.0:   bridge window [io  0xd000-0xdfff]
pci 0000:00:1c.0:   bridge window [mem 0xf0400000-0xf16fffff]
pci 0000:00:1c.0:   bridge window [mem 0xfde00000-0xfdffffff 64bit pref]
pci 0000:00:1c.4: PCI bridge to [bus 03-03]
pci 0000:00:1c.4:   bridge window [io  0xc000-0xcfff]
pci 0000:00:1c.4:   bridge window [mem 0xfe900000-0xfe9fffff]
pci 0000:00:1c.4:   bridge window [mem 0xf0000000-0xf01fffff 64bit pref]
pci 0000:00:1c.5: PCI bridge to [bus 02-02]
pci 0000:00:1c.5:   bridge window [io  0xb000-0xbfff]
pci 0000:00:1c.5:   bridge window [mem 0xfe800000-0xfe8fffff]
pci 0000:00:1c.5:   bridge window [mem 0xf0200000-0xf03fffff 64bit pref]
pci 0000:00:1e.0: PCI bridge to [bus 0a-0a]
pci 0000:00:1e.0:   bridge window [io  0xe000-0xefff]
pci 0000:00:1e.0:   bridge window [mem 0xfeb00000-0xfebfffff]
PCI: No. 4 try to assign unassigned res
pci 0000:00:1c.0: resource 7 [io  0xd000-0xdfff] released
pci 0000:00:1c.0: PCI bridge to [bus 04-09]
pci 0000:00:1c.0: BAR 7: assigned [io  0x1000-0x5fff]
pci 0000:00:01.0: PCI bridge to [bus 01-01]
pci 0000:00:01.0:   bridge window [io  0xa000-0xafff]
pci 0000:00:01.0:   bridge window [mem 0xfe700000-0xfe7fffff]
pci 0000:00:01.0:   bridge window [mem 0xd0000000-0xdfffffff 64bit pref]
pci 0000:04:00.0: BAR 7: assigned [io  0x1000-0x4fff]
pci 0000:05:01.0: BAR 7: assigned [io  0x1000-0x2fff]
pci 0000:05:02.0: BAR 7: assigned [io  0x3000-0x3fff]
pci 0000:05:03.0: BAR 7: assigned [io  0x4000-0x4fff]
pci 0000:08:00.0: BAR 7: assigned [io  0x1000-0x1fff]
pci 0000:09:04.0: BAR 0: assigned [io  0x1000-0x10ff]
pci 0000:09:04.0: BAR 0: set to [io  0x1000-0x10ff] (PCI address [0x1000-0x10ff])
pci 0000:08:00.0: PCI bridge to [bus 09-09]
pci 0000:08:00.0:   bridge window [io  0x1000-0x1fff]
pci 0000:05:01.0: PCI bridge to [bus 08-09]
pci 0000:05:01.0:   bridge window [io  0x1000-0x2fff]
pci 0000:05:01.0:   bridge window [mem 0xf0400000-0xf05fffff]
pci 0000:05:01.0:   bridge window [mem 0xf1000000-0xf11fffff 64bit pref]
pci 0000:05:02.0: PCI bridge to [bus 07-07]
pci 0000:05:02.0:   bridge window [io  0x3000-0x3fff]
pci 0000:05:02.0:   bridge window [mem 0xf0600000-0xf09fffff]
pci 0000:05:02.0:   bridge window [mem 0xf1200000-0xf13fffff 64bit pref]
pci 0000:05:03.0: PCI bridge to [bus 06-06]
pci 0000:05:03.0:   bridge window [io  0x4000-0x4fff]
pci 0000:05:03.0:   bridge window [mem 0xf0a00000-0xf0dfffff]
pci 0000:05:03.0:   bridge window [mem 0xf1400000-0xf15fffff 64bit pref]
pci 0000:04:00.0: PCI bridge to [bus 05-09]
pci 0000:04:00.0:   bridge window [io  0x1000-0x4fff]
pci 0000:04:00.0:   bridge window [mem 0xf0400000-0xf0ffffff]
pci 0000:04:00.0:   bridge window [mem 0xf1000000-0xf15fffff 64bit pref]
pci 0000:00:1c.0: PCI bridge to [bus 04-09]
pci 0000:00:1c.0:   bridge window [io  0x1000-0x5fff]
pci 0000:00:1c.0:   bridge window [mem 0xf0400000-0xf16fffff]
pci 0000:00:1c.0:   bridge window [mem 0xfde00000-0xfdffffff 64bit pref]
pci 0000:00:1c.4: PCI bridge to [bus 03-03]
pci 0000:00:1c.4:   bridge window [io  0xc000-0xcfff]
pci 0000:00:1c.4:   bridge window [mem 0xfe900000-0xfe9fffff]
pci 0000:00:1c.4:   bridge window [mem 0xf0000000-0xf01fffff 64bit pref]
pci 0000:00:1c.5: PCI bridge to [bus 02-02]
pci 0000:00:1c.5:   bridge window [io  0xb000-0xbfff]
pci 0000:00:1c.5:   bridge window [mem 0xfe800000-0xfe8fffff]
pci 0000:00:1c.5:   bridge window [mem 0xf0200000-0xf03fffff 64bit pref]
pci 0000:00:1e.0: PCI bridge to [bus 0a-0a]
pci 0000:00:1e.0:   bridge window [io  0xe000-0xefff]
pci 0000:00:1e.0:   bridge window [mem 0xfeb00000-0xfebfffff]
pci 0000:00:01.0: PCI INT A -> GSI 16 (level, low) -> IRQ 16
pci 0000:00:01.0: setting latency timer to 64
pci 0000:00:1c.0: PCI INT A -> GSI 17 (level, low) -> IRQ 17
pci 0000:00:1c.0: setting latency timer to 64
pci 0000:04:00.0: PCI INT A -> GSI 16 (level, low) -> IRQ 16
pci 0000:04:00.0: setting latency timer to 64
pci 0000:05:01.0: enabling device (0105 -> 0107)
pci 0000:05:01.0: PCI INT A -> GSI 17 (level, low) -> IRQ 17
pci 0000:05:01.0: setting latency timer to 64
pci 0000:08:00.0: PCI INT A -> GSI 17 (level, low) -> IRQ 17
pci 0000:08:00.0: setting latency timer to 64
pci 0000:05:02.0: enabling device (0106 -> 0107)
pci 0000:05:02.0: PCI INT A -> GSI 18 (level, low) -> IRQ 18
pci 0000:05:02.0: setting latency timer to 64
pci 0000:05:03.0: enabling device (0106 -> 0107)
pci 0000:05:03.0: PCI INT A -> GSI 19 (level, low) -> IRQ 19
pci 0000:05:03.0: setting latency timer to 64
pci 0000:00:1c.4: PCI INT A -> GSI 17 (level, low) -> IRQ 17
pci 0000:00:1c.4: setting latency timer to 64
pci 0000:00:1c.5: PCI INT B -> GSI 16 (level, low) -> IRQ 16
pci 0000:00:1c.5: setting latency timer to 64
pci 0000:00:1e.0: setting latency timer to 64
pci_bus 0000:00: resource 4 [io  0x0000-0x0cf7]
pci_bus 0000:00: resource 5 [io  0x0d00-0xffff]
pci_bus 0000:00: resource 6 [mem 0x000a0000-0x000bffff]
pci_bus 0000:00: resource 7 [mem 0x000d0000-0x000dffff]
pci_bus 0000:00: resource 8 [mem 0xd0000000-0xffffffff]
pci_bus 0000:01: resource 0 [io  0xa000-0xafff]
pci_bus 0000:01: resource 1 [mem 0xfe700000-0xfe7fffff]
pci_bus 0000:01: resource 2 [mem 0xd0000000-0xdfffffff 64bit pref]
pci_bus 0000:04: resource 0 [io  0x1000-0x5fff]
pci_bus 0000:04: resource 1 [mem 0xf0400000-0xf16fffff]
pci_bus 0000:04: resource 2 [mem 0xfde00000-0xfdffffff 64bit pref]
pci_bus 0000:05: resource 0 [io  0x1000-0x4fff]
pci_bus 0000:05: resource 1 [mem 0xf0400000-0xf0ffffff]
pci_bus 0000:05: resource 2 [mem 0xf1000000-0xf15fffff 64bit pref]
pci_bus 0000:08: resource 0 [io  0x1000-0x2fff]
pci_bus 0000:08: resource 1 [mem 0xf0400000-0xf05fffff]
pci_bus 0000:08: resource 2 [mem 0xf1000000-0xf11fffff 64bit pref]
pci_bus 0000:09: resource 0 [io  0x1000-0x1fff]
pci_bus 0000:07: resource 0 [io  0x3000-0x3fff]
pci_bus 0000:07: resource 1 [mem 0xf0600000-0xf09fffff]
pci_bus 0000:07: resource 2 [mem 0xf1200000-0xf13fffff 64bit pref]
pci_bus 0000:06: resource 0 [io  0x4000-0x4fff]
pci_bus 0000:06: resource 1 [mem 0xf0a00000-0xf0dfffff]
pci_bus 0000:06: resource 2 [mem 0xf1400000-0xf15fffff 64bit pref]
pci_bus 0000:03: resource 0 [io  0xc000-0xcfff]
pci_bus 0000:03: resource 1 [mem 0xfe900000-0xfe9fffff]
pci_bus 0000:03: resource 2 [mem 0xf0000000-0xf01fffff 64bit pref]
pci_bus 0000:02: resource 0 [io  0xb000-0xbfff]
pci_bus 0000:02: resource 1 [mem 0xfe800000-0xfe8fffff]
pci_bus 0000:02: resource 2 [mem 0xf0200000-0xf03fffff 64bit pref]
pci_bus 0000:0a: resource 0 [io  0xe000-0xefff]
pci_bus 0000:0a: resource 1 [mem 0xfeb00000-0xfebfffff]
pci_bus 0000:0a: resource 4 [io  0x0000-0x0cf7]
pci_bus 0000:0a: resource 5 [io  0x0d00-0xffff]
pci_bus 0000:0a: resource 6 [mem 0x000a0000-0x000bffff]
pci_bus 0000:0a: resource 7 [mem 0x000d0000-0x000dffff]
pci_bus 0000:0a: resource 8 [mem 0xd0000000-0xffffffff]
NET: Registered protocol family 2
IP route cache hash table entries: 32768 (order: 5, 131072 bytes)
TCP established hash table entries: 131072 (order: 8, 1048576 bytes)
TCP bind hash table entries: 65536 (order: 7, 524288 bytes)
TCP: Hash tables configured (established 131072 bind 65536)
TCP reno registered
UDP hash table entries: 512 (order: 2, 16384 bytes)
UDP-Lite hash table entries: 512 (order: 2, 16384 bytes)
NET: Registered protocol family 1
pci 0000:01:00.0: Boot video device
PCI: CLS 32 bytes, default 64
microcode: CPU0 sig=0x10677, pf=0x10, revision=0x703
microcode: CPU1 sig=0x10677, pf=0x10, revision=0x703
microcode: CPU2 sig=0x10677, pf=0x10, revision=0x703
microcode: CPU3 sig=0x10677, pf=0x10, revision=0x703
microcode: Microcode Update Driver: v2.00 <tigran@aivazian.fsnet.co.uk>, Peter Oruba
audit: initializing netlink socket (disabled)
type=2000 audit(1326745179.382:1): initialized
highmem bounce pool size: 64 pages
HugeTLB registered 2 MB page size, pre-allocated 0 pages
fuse init (API version 7.17)
msgmni has been set to 1690
Block layer SCSI generic (bsg) driver version 0.4 loaded (major 253)
io scheduler noop registered
io scheduler cfq registered (default)
pcieport 0000:00:01.0: setting latency timer to 64
pcieport 0000:00:1c.0: setting latency timer to 64
pcieport 0000:00:1c.4: setting latency timer to 64
pcieport 0000:00:1c.5: setting latency timer to 64
pcieport 0000:04:00.0: setting latency timer to 64
pcieport 0000:05:01.0: setting latency timer to 64
pcieport 0000:05:02.0: setting latency timer to 64
pcieport 0000:05:03.0: setting latency timer to 64
input: Power Button as /devices/LNXSYSTM:00/device:00/PNP0C0C:00/input/input0
ACPI: Power Button [PWRB]
input: Power Button as /devices/LNXSYSTM:00/LNXPWRBN:00/input/input1
ACPI: Power Button [PWRF]
Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
Non-volatile memory driver v1.3
Linux agpgart interface v0.103
[drm] Initialized drm 1.1.0 20060810
[drm] radeon defaulting to kernel modesetting.
[drm] radeon kernel modesetting enabled.
radeon 0000:01:00.0: PCI INT A -> GSI 16 (level, low) -> IRQ 16
radeon 0000:01:00.0: setting latency timer to 64
[drm] initializing kernel modesetting (JUNIPER 0x1002:0x68B8 0x1787:0x2288).
[drm] register mmio base: 0xFE7C0000
[drm] register mmio size: 131072
ATOM BIOS: A2128JHA.HGK
radeon 0000:01:00.0: VRAM: 1024M 0x0000000000000000 - 0x000000003FFFFFFF (1024M used)
radeon 0000:01:00.0: GTT: 512M 0x0000000040000000 - 0x000000005FFFFFFF
mtrr: type mismatch for d0000000,10000000 old: write-back new: write-combining
[drm] Detected VRAM RAM=1024M, BAR=256M
[drm] RAM width 128bits DDR
[TTM] Zone  kernel: Available graphics memory: 432752 kiB.
[TTM] Zone highmem: Available graphics memory: 2072820 kiB.
[TTM] Initializing pool allocator.
[drm] radeon: 1024M of VRAM memory ready
[drm] radeon: 512M of GTT memory ready.
[drm] Supports vblank timestamp caching Rev 1 (10.10.2010).
[drm] Driver supports precise vblank timestamp query.
[drm] radeon: irq initialized.
[drm] GART: num cpu pages 131072, num gpu pages 131072
[drm] Loading JUNIPER Microcode
[drm] PCIE GART of 512M enabled (table at 0x0000000000040000).
radeon 0000:01:00.0: WB enabled
[drm] ring test succeeded in 1 usecs
[drm] radeon: ib pool ready.
[drm] ib test succeeded in 0 usecs
[drm] Radeon Display Connectors
[drm] Connector 0:
[drm]   DisplayPort
[drm]   HPD4
[drm]   DDC: 0x6440 0x6440 0x6444 0x6444 0x6448 0x6448 0x644c 0x644c
[drm]   Encoders:
[drm]     DFP1: INTERNAL_UNIPHY2
[drm] Connector 1:
[drm]   HDMI-A
[drm]   HPD5
[drm]   DDC: 0x6430 0x6430 0x6434 0x6434 0x6438 0x6438 0x643c 0x643c
[drm]   Encoders:
[drm]     DFP2: INTERNAL_UNIPHY2
[drm] Connector 2:
[drm]   DVI-I
[drm]   HPD1
[drm]   DDC: 0x6460 0x6460 0x6464 0x6464 0x6468 0x6468 0x646c 0x646c
[drm]   Encoders:
[drm]     DFP3: INTERNAL_UNIPHY1
[drm]     CRT2: INTERNAL_KLDSCP_DAC2
[drm] Connector 3:
[drm]   DVI-I
[drm]   HPD6
[drm]   DDC: 0x6450 0x6450 0x6454 0x6454 0x6458 0x6458 0x645c 0x645c
[drm]   Encoders:
[drm]     DFP4: INTERNAL_UNIPHY
[drm]     CRT1: INTERNAL_KLDSCP_DAC1
[drm] Internal thermal controller with fan control
[drm] radeon: power management initialized
[drm] fb mappable at 0xD0142000
[drm] vram apper at 0xD0000000
[drm] size 9216000
[drm] fb depth is 24
[drm]    pitch is 7680
fbcon: radeondrmfb (fb0) is primary device
Console: switching to colour frame buffer device 240x75
fb0: radeondrmfb frame buffer device
drm: registered panic notifier
[drm] Initialized radeon 2.12.0 20080528 for 0000:01:00.0 on minor 0
brd: module loaded
loop: module loaded
ahci 0000:00:1f.2: version 3.0
ahci 0000:00:1f.2: PCI INT B -> GSI 22 (level, low) -> IRQ 22
ahci: SSS flag set, parallel bus scan disabled
ahci 0000:00:1f.2: AHCI 0001.0200 32 slots 6 ports 3 Gbps 0x3f impl SATA mode
ahci 0000:00:1f.2: flags: 64bit ncq sntf stag pm led clo pmp pio slum part ccc ems sxs 
ahci 0000:00:1f.2: setting latency timer to 64
scsi0 : ahci
scsi1 : ahci
scsi2 : ahci
scsi3 : ahci
scsi4 : ahci
scsi5 : ahci
ata1: SATA max UDMA/133 abar m2048@0xfe6fe800 port 0xfe6fe900 irq 22
ata2: SATA max UDMA/133 abar m2048@0xfe6fe800 port 0xfe6fe980 irq 22
ata3: SATA max UDMA/133 abar m2048@0xfe6fe800 port 0xfe6fea00 irq 22
ata4: SATA max UDMA/133 abar m2048@0xfe6fe800 port 0xfe6fea80 irq 22
ata5: SATA max UDMA/133 abar m2048@0xfe6fe800 port 0xfe6feb00 irq 22
ata6: SATA max UDMA/133 abar m2048@0xfe6fe800 port 0xfe6feb80 irq 22
ahci 0000:03:00.0: PCI INT A -> GSI 16 (level, low) -> IRQ 16
ahci 0000:03:00.0: Disabling your PATA port. Use the boot option 'ahci.marvell_enable=0' to avoid this.
ahci 0000:03:00.0: controller can't do NCQ, turning off CAP_NCQ
ahci 0000:03:00.0: controller can't do PMP, turning off CAP_PMP
ahci 0000:03:00.0: masking port_map 0x1f -> 0xf
ahci: SSS flag set, parallel bus scan disabled
ahci 0000:03:00.0: AHCI 0001.0000 32 slots 5 ports 3 Gbps 0xf impl IDE mode
ahci 0000:03:00.0: flags: 64bit stag slum part 
ahci 0000:03:00.0: setting latency timer to 64
scsi6 : ahci
scsi7 : ahci
scsi8 : ahci
scsi9 : ahci
scsi10 : ahci
ata7: SATA max UDMA/133 abar m1024@0xfe9ffc00 port 0xfe9ffd00 irq 16
ata8: SATA max UDMA/133 abar m1024@0xfe9ffc00 port 0xfe9ffd80 irq 16
ata9: SATA max UDMA/133 abar m1024@0xfe9ffc00 port 0xfe9ffe00 irq 16
ata10: SATA max UDMA/133 abar m1024@0xfe9ffc00 port 0xfe9ffe80 irq 16
ata11: DUMMY
skge 0000:0a:04.0: PCI INT A -> GSI 19 (level, low) -> IRQ 19
skge: 1.14 addr 0xfebfc000 irq 19 chip Yukon-Lite rev 9
skge 0000:0a:04.0: eth0: addr 00:1f:c6:5c:93:38
sky2: driver version 1.30
sky2 0000:02:00.0: PCI INT A -> GSI 17 (level, low) -> IRQ 17
sky2 0000:02:00.0: setting latency timer to 64
sky2 0000:02:00.0: Yukon-2 EC Ultra chip revision 3
sky2 0000:02:00.0: eth1: addr 00:1f:c6:5c:94:1f
usbcore: registered new interface driver ipheth
ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
ehci_hcd 0000:00:1a.7: PCI INT C -> GSI 18 (level, low) -> IRQ 18
ehci_hcd 0000:00:1a.7: setting latency timer to 64
ehci_hcd 0000:00:1a.7: EHCI Host Controller
ehci_hcd 0000:00:1a.7: new USB bus registered, assigned bus number 1
ehci_hcd 0000:00:1a.7: debug port 1
ehci_hcd 0000:00:1a.7: cache line size of 32 is not supported
ehci_hcd 0000:00:1a.7: irq 18, io mem 0xfe6ffc00
ehci_hcd 0000:00:1a.7: USB 2.0 started, EHCI 1.00
hub 1-0:1.0: USB hub found
hub 1-0:1.0: 6 ports detected
ehci_hcd 0000:00:1d.7: PCI INT A -> GSI 23 (level, low) -> IRQ 23
ehci_hcd 0000:00:1d.7: setting latency timer to 64
ehci_hcd 0000:00:1d.7: EHCI Host Controller
ehci_hcd 0000:00:1d.7: new USB bus registered, assigned bus number 2
ehci_hcd 0000:00:1d.7: debug port 1
ehci_hcd 0000:00:1d.7: cache line size of 32 is not supported
ehci_hcd 0000:00:1d.7: irq 23, io mem 0xfe6ff800
ehci_hcd 0000:00:1d.7: USB 2.0 started, EHCI 1.00
hub 2-0:1.0: USB hub found
hub 2-0:1.0: 6 ports detected
ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
uhci_hcd: USB Universal Host Controller Interface driver
uhci_hcd 0000:00:1a.0: PCI INT A -> GSI 16 (level, low) -> IRQ 16
uhci_hcd 0000:00:1a.0: setting latency timer to 64
uhci_hcd 0000:00:1a.0: UHCI Host Controller
uhci_hcd 0000:00:1a.0: new USB bus registered, assigned bus number 3
uhci_hcd 0000:00:1a.0: irq 16, io base 0x00009800
hub 3-0:1.0: USB hub found
hub 3-0:1.0: 2 ports detected
uhci_hcd 0000:00:1a.1: PCI INT B -> GSI 21 (level, low) -> IRQ 21
uhci_hcd 0000:00:1a.1: setting latency timer to 64
uhci_hcd 0000:00:1a.1: UHCI Host Controller
uhci_hcd 0000:00:1a.1: new USB bus registered, assigned bus number 4
uhci_hcd 0000:00:1a.1: irq 21, io base 0x00009880
hub 4-0:1.0: USB hub found
hub 4-0:1.0: 2 ports detected
uhci_hcd 0000:00:1a.2: PCI INT C -> GSI 18 (level, low) -> IRQ 18
uhci_hcd 0000:00:1a.2: setting latency timer to 64
uhci_hcd 0000:00:1a.2: UHCI Host Controller
uhci_hcd 0000:00:1a.2: new USB bus registered, assigned bus number 5
uhci_hcd 0000:00:1a.2: irq 18, io base 0x00009c00
hub 5-0:1.0: USB hub found
hub 5-0:1.0: 2 ports detected
uhci_hcd 0000:00:1d.0: PCI INT A -> GSI 23 (level, low) -> IRQ 23
uhci_hcd 0000:00:1d.0: setting latency timer to 64
uhci_hcd 0000:00:1d.0: UHCI Host Controller
uhci_hcd 0000:00:1d.0: new USB bus registered, assigned bus number 6
uhci_hcd 0000:00:1d.0: irq 23, io base 0x00009080
hub 6-0:1.0: USB hub found
hub 6-0:1.0: 2 ports detected
uhci_hcd 0000:00:1d.1: PCI INT B -> GSI 19 (level, low) -> IRQ 19
uhci_hcd 0000:00:1d.1: setting latency timer to 64
uhci_hcd 0000:00:1d.1: UHCI Host Controller
uhci_hcd 0000:00:1d.1: new USB bus registered, assigned bus number 7
uhci_hcd 0000:00:1d.1: irq 19, io base 0x00009400
hub 7-0:1.0: USB hub found
hub 7-0:1.0: 2 ports detected
uhci_hcd 0000:00:1d.2: PCI INT C -> GSI 18 (level, low) -> IRQ 18
uhci_hcd 0000:00:1d.2: setting latency timer to 64
uhci_hcd 0000:00:1d.2: UHCI Host Controller
uhci_hcd 0000:00:1d.2: new USB bus registered, assigned bus number 8
uhci_hcd 0000:00:1d.2: irq 18, io base 0x00009480
hub 8-0:1.0: USB hub found
hub 8-0:1.0: 2 ports detected
Initializing USB Mass Storage driver...
usbcore: registered new interface driver usb-storage
USB Mass Storage support registered.
usbcore: registered new interface driver libusual
i8042: PNP: PS/2 Controller [PNP0303:PS2K] at 0x60,0x64 irq 1
i8042: PNP: PS/2 appears to have AUX port disabled, if this is incorrect please boot with i8042.nopnp
serio: i8042 KBD port at 0x60,0x64 irq 1
mousedev: PS/2 mouse device common for all mice
rtc_cmos 00:03: RTC can wake from S4
rtc_cmos 00:03: rtc core: registered rtc_cmos as rtc0
rtc0: alarms up to one month, y3k, 114 bytes nvram, hpet irqs
i801_smbus 0000:00:1f.3: PCI INT C -> GSI 18 (level, low) -> IRQ 18
md: raid0 personality registered for level 0
md: raid1 personality registered for level 1
Bluetooth: Virtual HCI driver ver 1.3
Bluetooth: HCI UART driver ver 2.2
Bluetooth: HCI H4 protocol initialized
Bluetooth: HCI BCSP protocol initialized
Bluetooth: HCILL protocol initialized
Bluetooth: HCIATH3K protocol initialized
Bluetooth: Broadcom Blutonium firmware driver ver 1.2
usbcore: registered new interface driver bcm203x
Bluetooth: Digianswer Bluetooth USB driver ver 0.10
usbcore: registered new interface driver bpa10x
Bluetooth: BlueFRITZ! USB driver ver 1.2
usbcore: registered new interface driver bfusb
Bluetooth: Generic Bluetooth USB driver ver 0.6
usbcore: registered new interface driver btusb
cpuidle: using governor ladder
cpuidle: using governor menu
usbcore: registered new interface driver usbhid
usbhid: USB HID core driver
snd_virtuoso 0000:09:04.0: PCI INT A -> GSI 17 (level, low) -> IRQ 17
ata7: SATA link down (SStatus 0 SControl 300)
usb 2-1: new high-speed USB device number 2 using ehci_hcd
ata1: SATA link up 3.0 Gbps (SStatus 123 SControl 300)
ata1.00: ATA-7: INTEL SSDSA2M080G2GC, 2CV102HD, max UDMA/133
ata1.00: 156301488 sectors, multi 1: LBA48 NCQ (depth 31/32)
ata1.00: configured for UDMA/133
scsi 0:0:0:0: Direct-Access     ATA      INTEL SSDSA2M080 2CV1 PQ: 0 ANSI: 5
sd 0:0:0:0: [sda] 156301488 512-byte logical blocks: (80.0 GB/74.5 GiB)
sd 0:0:0:0: Attached scsi generic sg0 type 0
sd 0:0:0:0: [sda] Write Protect is off
hub 2-1:1.0: USB hub found
hub 2-1:1.0: 4 ports detected
sd 0:0:0:0: [sda] Mode Sense: 00 3a 00 00
sd 0:0:0:0: [sda] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA
 sda: sda1 sda2 sda3
sd 0:0:0:0: [sda] Attached SCSI disk
Refined TSC clocksource calibration: 2671.603 MHz.
Switching to clocksource tsc
usb 6-2: new full-speed USB device number 2 using uhci_hcd
ata2: SATA link up 3.0 Gbps (SStatus 123 SControl 300)
ata2.00: ATA-7: INTEL SSDSA2M080G2GC, 2CV102HD, max UDMA/133
ata2.00: 156301488 sectors, multi 1: LBA48 NCQ (depth 31/32)
ata2.00: configured for UDMA/133
scsi 1:0:0:0: Direct-Access     ATA      INTEL SSDSA2M080 2CV1 PQ: 0 ANSI: 5
sd 1:0:0:0: [sdb] 156301488 512-byte logical blocks: (80.0 GB/74.5 GiB)
sd 1:0:0:0: Attached scsi generic sg1 type 0
sd 1:0:0:0: [sdb] Write Protect is off
sd 1:0:0:0: [sdb] Mode Sense: 00 3a 00 00
sd 1:0:0:0: [sdb] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA
 sdb: sdb1 sdb2 sdb3
sd 1:0:0:0: [sdb] Attached SCSI disk
input: Logitech USB Gaming Mouse as /devices/pci0000:00/0000:00:1d.0/usb6/6-2/6-2:1.0/input/input2
generic-usb 0003:046D:C041.0001: input,hidraw0: USB HID v1.11 Mouse [Logitech USB Gaming Mouse] on usb-0000:00:1d.0-2/input0
generic-usb 0003:046D:C041.0002: hiddev0,hidraw1: USB HID v1.11 Device [Logitech USB Gaming Mouse] on usb-0000:00:1d.0-2/input1
ALSA device list:
  #0: Asus Virtuoso 100 at 0x1000, irq 17
Netfilter messages via NETLINK v0.30.
nf_conntrack version 0.5.0 (16384 buckets, 65536 max)
ctnetlink v0.93: registering with nfnetlink.
ip_tables: (C) 2000-2006 Netfilter Core Team
TCP cubic registered
Initializing XFRM netlink socket
NET: Registered protocol family 10
ip6_tables: (C) 2000-2006 Netfilter Core Team
IPv6 over IPv4 tunneling driver
NET: Registered protocol family 17
Bluetooth: RFCOMM TTY layer initialized
Bluetooth: RFCOMM socket layer initialized
Bluetooth: RFCOMM ver 1.11
Bluetooth: BNEP (Ethernet Emulation) ver 1.3
Bluetooth: BNEP filters: protocol multicast
Bluetooth: HIDP (Human Interface Emulation) ver 1.2
Using IPI No-Shortcut mode
ata3: SATA link down (SStatus 0 SControl 300)
usb 7-2: new low-speed USB device number 2 using uhci_hcd
input: Microsoft Natural\xffffffc2\xffffffae\xffffffae Ergonomic Keyboard 4000 as /devices/pci0000:00/0000:00:1d.1/usb7/7-2/7-2:1.0/input/input3
microsoft 0003:045E:00DB.0003: input,hidraw2: USB HID v1.11 Keyboard [Microsoft Natural\xffffffc2\xffffffae\xffffffae Ergonomic Keyboard 4000] on usb-0000:00:1d.1-2/input0
input: Microsoft Natural\xffffffc2\xffffffae\xffffffae Ergonomic Keyboard 4000 as /devices/pci0000:00/0000:00:1d.1/usb7/7-2/7-2:1.1/input/input4
microsoft 0003:045E:00DB.0004: input,hidraw3: USB HID v1.11 Device [Microsoft Natural\xffffffc2\xffffffae\xffffffae Ergonomic Keyboard 4000] on usb-0000:00:1d.1-2/input1
usb 2-1.1: new high-speed USB device number 5 using ehci_hcd
scsi11 : usb-storage 2-1.1:1.0
ata4: SATA link up 1.5 Gbps (SStatus 113 SControl 300)
ata4.00: ATAPI: HL-DT-ST BD-RE  GGW-H20L, YL01, max UDMA/133
ata4.00: configured for UDMA/133
scsi 3:0:0:0: CD-ROM            HL-DT-ST BD-RE  GGW-H20L  YL01 PQ: 0 ANSI: 5
sr0: scsi3-mmc drive: 40x/40x writer dvd-ram cd/rw xa/form2 cdda tray
cdrom: Uniform CD-ROM driver Revision: 3.20
sr 3:0:0:0: Attached scsi CD-ROM sr0
sr 3:0:0:0: Attached scsi generic sg2 type 5
ata5: SATA link down (SStatus 0 SControl 300)
ata6: SATA link down (SStatus 0 SControl 300)
scsi 11:0:0:0: Direct-Access     Apple    iPod             1.62 PQ: 0 ANSI: 0
sd 11:0:0:0: Attached scsi generic sg3 type 0
sd 11:0:0:0: [sdc] Spinning up disk...
ata8: SATA link down (SStatus 0 SControl 300)
ata9: SATA link down (SStatus 0 SControl 300)
ata10: SATA link down (SStatus 0 SControl 300)
.............................ready
sd 11:0:0:0: [sdc] 1946049 4096-byte logical blocks: (7.97 GB/7.42 GiB)
sd 11:0:0:0: [sdc] Write Protect is off
sd 11:0:0:0: [sdc] Mode Sense: 68 00 00 08
sd 11:0:0:0: [sdc] Write cache: disabled, read cache: enabled, doesn't support DPO or FUA
sd 11:0:0:0: [sdc] 1946049 4096-byte logical blocks: (7.97 GB/7.42 GiB)
 sdc: unknown partition table
sd 11:0:0:0: [sdc] 1946049 4096-byte logical blocks: (7.97 GB/7.42 GiB)
sd 11:0:0:0: [sdc] Attached SCSI removable disk
md: Waiting for all devices to be available before autodetect
md: If you don't use raid, use raid=noautodetect
md: Autodetecting RAID arrays.
md: Scanned 4 and added 4 devices.
md: autorun ...
md: considering sdb3 ...
md:  adding sdb3 ...
md: sdb1 has different UUID to sdb3
md:  adding sda3 ...
md: sda1 has different UUID to sdb3
md: created md3
md: bind<sda3>
md: bind<sdb3>
md: running: <sdb3><sda3>
bio: create slab <bio-1> at 1
md/raid0:md3: md_size is 309925376 sectors.
md: RAID0 configuration for md3 - 1 zone
md: zone0=[sda3/sdb3]
      zone-offset=         0KB, device-offset=         0KB, size= 154962688KB

md3: detected capacity change from 0 to 158681792512
md: considering sdb1 ...
md:  adding sdb1 ...
md:  adding sda1 ...
md: created md1
md: bind<sda1>
md: bind<sdb1>
md: running: <sdb1><sda1>
md/raid1:md1: active with 2 out of 2 mirrors
md1: detected capacity change from 0 to 139722752
md: ... autorun DONE.
 md3: unknown partition table
EXT4-fs (md3): couldn't mount as ext3 due to feature incompatibilities
EXT4-fs (md3): couldn't mount as ext2 due to feature incompatibilities
EXT4-fs (md3): mounted filesystem with ordered data mode. Opts: (null)
VFS: Mounted root (ext4 filesystem) readonly on device 9:3.
devtmpfs: mounted
Freeing unused kernel memory: 380k freed
systemd[1]: RTC configured in localtime, applying delta of 60 minutes to system time.
systemd[1]: systemd 38 running in system mode. (+PAM +LIBWRAP -AUDIT -SELINUX -SYSVINIT -LIBCRYPTSETUP; gentoo)
systemd[1]: Set hostname to <darwin>.
systemd[1]: Cannot add dependency job for unit avahi-daemon.socket, ignoring: Unit avahi-daemon.socket failed to load: No such file or directory. See system logs and 'systemctl status avahi-daemon.socket' for details.
systemd[1]: Cannot add dependency job for unit avahi-daemon.service, ignoring: Unit avahi-daemon.service failed to load: No such file or directory. See system logs and 'systemctl status avahi-daemon.service' for details.
systemd[1]: Cannot add dependency job for unit ntpd.service, ignoring: Unit ntpd.service failed to load: No such file or directory. See system logs and 'systemctl status ntpd.service' for details.
udevd[1135]: starting version 175
EXT4-fs (md3): re-mounted. Opts: (null)
 md1: unknown partition table
systemd[1]: systemd-tmpfiles-setup.service: main process exited, code=exited, status=1
systemd[1]: Unit systemd-tmpfiles-setup.service entered failed state.
Adding 530140k swap on /dev/sda2.  Priority:0 extents:1 across:530140k SS
Adding 530140k swap on /dev/sdb2.  Priority:0 extents:1 across:530140k SS
sky2 0000:02:00.0: eth1: enabling interface
ADDRCONF(NETDEV_UP): eth1: link is not ready
skge 0000:0a:04.0: eth0: enabling interface
EXT4-fs (md3): re-mounted. Opts: commit=0
skge 0000:0a:04.0: eth0: Link is up at 1000 Mbps, full duplex, flow control both
eth0: no IPv6 routers present

Re: [PATCH 2/5] PCI: Try to assign required+option size at first

[Yinghai Lu]

On Mon, Jan 16, 2012 at 11:59 AM, Peter Henriksson
<peter.henriksson@gmail.com> wrote:
> On Mon, Jan 16, 2012 at 2:14 AM, Yinghai Lu <yinghai@kernel.org> wrote:
>> Peter Henriksson,
>> Can you try for-pci2 branch on your setup with Xonar DX?
>>
>
> Attaching dmesg output with the for-pci2 branch. The Xonar DX appears
> to be working.

Great!

After last retry, every device and bridge is happy now.

PCI: No. 4 try to assign unassigned res
pci 0000:00:1c.0: resource 7 [io  0xd000-0xdfff] released
pci 0000:00:1c.0: PCI bridge to [bus 04-09]
pci 0000:00:1c.0: BAR 7: assigned [io  0x1000-0x5fff]
pci 0000:00:01.0: PCI bridge to [bus 01-01]
pci 0000:00:01.0:   bridge window [io  0xa000-0xafff]
pci 0000:00:01.0:   bridge window [mem 0xfe700000-0xfe7fffff]
pci 0000:00:01.0:   bridge window [mem 0xd0000000-0xdfffffff 64bit pref]
pci 0000:04:00.0: BAR 7: assigned [io  0x1000-0x4fff]
pci 0000:05:01.0: BAR 7: assigned [io  0x1000-0x2fff]
pci 0000:05:02.0: BAR 7: assigned [io  0x3000-0x3fff]
pci 0000:05:03.0: BAR 7: assigned [io  0x4000-0x4fff]
pci 0000:08:00.0: BAR 7: assigned [io  0x1000-0x1fff]
pci 0000:09:04.0: BAR 0: assigned [io  0x1000-0x10ff]
pci 0000:09:04.0: BAR 0: set to [io  0x1000-0x10ff] (PCI address
[0x1000-0x10ff])
pci 0000:08:00.0: PCI bridge to [bus 09-09]
pci 0000:08:00.0:   bridge window [io  0x1000-0x1fff]
pci 0000:05:01.0: PCI bridge to [bus 08-09]
pci 0000:05:01.0:   bridge window [io  0x1000-0x2fff]
pci 0000:05:01.0:   bridge window [mem 0xf0400000-0xf05fffff]
pci 0000:05:01.0:   bridge window [mem 0xf1000000-0xf11fffff 64bit pref]
pci 0000:05:02.0: PCI bridge to [bus 07-07]
pci 0000:05:02.0:   bridge window [io  0x3000-0x3fff]
pci 0000:05:02.0:   bridge window [mem 0xf0600000-0xf09fffff]
pci 0000:05:02.0:   bridge window [mem 0xf1200000-0xf13fffff 64bit pref]
pci 0000:05:03.0: PCI bridge to [bus 06-06]
pci 0000:05:03.0:   bridge window [io  0x4000-0x4fff]
pci 0000:05:03.0:   bridge window [mem 0xf0a00000-0xf0dfffff]
pci 0000:05:03.0:   bridge window [mem 0xf1400000-0xf15fffff 64bit pref]
pci 0000:04:00.0: PCI bridge to [bus 05-09]
pci 0000:04:00.0:   bridge window [io  0x1000-0x4fff]
pci 0000:04:00.0:   bridge window [mem 0xf0400000-0xf0ffffff]
pci 0000:04:00.0:   bridge window [mem 0xf1000000-0xf15fffff 64bit pref]
pci 0000:00:1c.0: PCI bridge to [bus 04-09]
pci 0000:00:1c.0:   bridge window [io  0x1000-0x5fff]
pci 0000:00:1c.0:   bridge window [mem 0xf0400000-0xf16fffff]
pci 0000:00:1c.0:   bridge window [mem 0xfde00000-0xfdffffff 64bit pref]
pci 0000:00:1c.4: PCI bridge to [bus 03-03]
pci 0000:00:1c.4:   bridge window [io  0xc000-0xcfff]
pci 0000:00:1c.4:   bridge window [mem 0xfe900000-0xfe9fffff]
pci 0000:00:1c.4:   bridge window [mem 0xf0000000-0xf01fffff 64bit pref]
pci 0000:00:1c.5: PCI bridge to [bus 02-02]
pci 0000:00:1c.5:   bridge window [io  0xb000-0xbfff]
pci 0000:00:1c.5:   bridge window [mem 0xfe800000-0xfe8fffff]
pci 0000:00:1c.5:   bridge window [mem 0xf0200000-0xf03fffff 64bit pref]
pci 0000:00:1e.0: PCI bridge to [bus 0a-0a]
pci 0000:00:1e.0:   bridge window [io  0xe000-0xefff]
pci 0000:00:1e.0:   bridge window [mem 0xfeb00000-0xfebfffff]

Thanks

Yinghai

[PATCH 3/5] PCI: Using add_list in pcie hotplug path.

[Yinghai Lu]

We need add size for hot plug path when pluging in hotplug chassis without cards.
-v2: change descriptions. make it can be applied after
	pci: Check bridge resources after resource allocation.

Signed-off-by: Yinghai Lu <yinghai@kernel.org>

---
 drivers/pci/setup-bus.c |   18 ++++++++++++------
 1 file changed, 12 insertions(+), 6 deletions(-)

Index: linux-2.6/drivers/pci/setup-bus.c
===================================================================
--- linux-2.6.orig/drivers/pci/setup-bus.c
+++ linux-2.6/drivers/pci/setup-bus.c
@@ -327,13 +327,14 @@ requested_and_reassign:
 }
 
 static void pdev_assign_resources_sorted(struct pci_dev *dev,
+				 struct resource_list_x *add_head,
 				 struct resource_list_x *fail_head)
 {
 	struct resource_list head;
 
 	head.next = NULL;
 	__dev_sort_resources(dev, &head);
-	__assign_resources_sorted(&head, NULL, fail_head);
+	__assign_resources_sorted(&head, add_head, fail_head);
 
 }
 
@@ -1003,17 +1004,19 @@ void __ref pci_bus_assign_resources(cons
 EXPORT_SYMBOL(pci_bus_assign_resources);
 
 static void __ref __pci_bridge_assign_resources(const struct pci_dev *bridge,
+					 struct resource_list_x *add_head,
 					 struct resource_list_x *fail_head)
 {
 	struct pci_bus *b;
 
-	pdev_assign_resources_sorted((struct pci_dev *)bridge, fail_head);
+	pdev_assign_resources_sorted((struct pci_dev *)bridge,
+					 add_head, fail_head);
 
 	b = bridge->subordinate;
 	if (!b)
 		return;
 
-	__pci_bus_assign_resources(b, NULL, fail_head);
+	__pci_bus_assign_resources(b, add_head, fail_head);
 
 	switch (bridge->class >> 8) {
 	case PCI_CLASS_BRIDGE_PCI:
@@ -1288,6 +1291,8 @@ enable_and_dump:
 void pci_assign_unassigned_bridge_resources(struct pci_dev *bridge)
 {
 	struct pci_bus *parent = bridge->subordinate;
+	struct resource_list_x add_list; /* list of resources that
+					want additional resources */
 	int tried_times = 0;
 	struct resource_list_x head, *list;
 	int retval;
@@ -1295,11 +1300,12 @@ void pci_assign_unassigned_bridge_resour
 				  IORESOURCE_PREFETCH;
 
 	head.next = NULL;
+	add_list.next = NULL;
 
 again:
-	pci_bus_size_bridges(parent);
-	__pci_bridge_assign_resources(bridge, &head);
-
+	__pci_bus_size_bridges(parent, &add_list);
+	__pci_bridge_assign_resources(bridge, &add_list, &head);
+	BUG_ON(add_list.next);
 	tried_times++;
 
 	if (!head.next)

Re: [PATCH 3/5] PCI: Using add_list in pcie hotplug path.

[Jesse Barnes]

[-- Attachment #1: Type: text/plain, Size: 716 bytes --]

On Wed,  7 Dec 2011 00:53:02 -0800
Yinghai Lu <yinghai@kernel.org> wrote:

> We need add size for hot plug path when pluging in hotplug chassis without cards.
> -v2: change descriptions. make it can be applied after
> 	pci: Check bridge resources after resource allocation.
> 
> Signed-off-by: Yinghai Lu <yinghai@kernel.org>

3, 4, and 5 are related right?  Do you have bug reports to reference
for the case where a chassis w/o devices is plugged in then you try to
plug in a device and it fails?  I suppose even if devices are added one
at a time and enabled the realloc will still work as long as it only
grows and doesn't move or shrink...

-- 
Jesse Barnes, Intel Open Source Technology Center

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 836 bytes --]

Re: [PATCH 3/5] PCI: Using add_list in pcie hotplug path.

[Yinghai Lu]

On Fri, Jan 6, 2012 at 1:58 PM, Jesse Barnes <jbarnes@virtuousgeek.org> wrote:
> On Wed,  7 Dec 2011 00:53:02 -0800
> Yinghai Lu <yinghai@kernel.org> wrote:
>
>> We need add size for hot plug path when pluging in hotplug chassis without cards.
>> -v2: change descriptions. make it can be applied after
>>       pci: Check bridge resources after resource allocation.
>>
>> Signed-off-by: Yinghai Lu <yinghai@kernel.org>
>
> 3, 4, and 5 are related right?

4, 5 are related.

>  Do you have bug reports to reference
> for the case where a chassis w/o devices is plugged in then you try to
> plug in a device and it fails?  I suppose even if devices are added one
> at a time and enabled the realloc will still work as long as it only
> grows and doesn't move or shrink...

No report, just from the code review.

can you check other patch in my branch?

http://git.kernel.org/?p=linux/kernel/git/yinghai/linux-yinghai.git;a=shortlog;h=refs/heads/for-pci

esp:

PCI: Make sriov work with hotplug remove
pciehp: Checking pci conf reading to new added device instead of sleep 1s

Thanks

Yinghai Lu

[PATCH 4/5] PCI: Make rescan bus could increase bridge resource size if needed

[Yinghai Lu]

Current rescan will not touch bridge MMIO and IO.

Try to reuse pci_assign_unassigned_bridge_resources(bridge) to update bridge
resource, if child devices need more resource.

only do that for bridges that all children get removed before. So do not
release resources that could already be used by drivers of child devices.

Signed-off-by: Yinghai Lu <yinghai@kernel.org>

---
 drivers/pci/pci-sysfs.c |    5 ++++-
 drivers/pci/probe.c     |   24 ++++++++++++++++++++++++
 include/linux/pci.h     |    1 +
 3 files changed, 29 insertions(+), 1 deletion(-)

Index: linux-2.6/drivers/pci/pci-sysfs.c
===================================================================
--- linux-2.6.orig/drivers/pci/pci-sysfs.c
+++ linux-2.6/drivers/pci/pci-sysfs.c
@@ -366,7 +366,10 @@ dev_bus_rescan_store(struct device *dev,
 
 	if (val) {
 		mutex_lock(&pci_remove_rescan_mutex);
-		pci_rescan_bus(bus);
+		if (!pci_is_root_bus(bus) && list_empty(&bus->devices))
+			pci_rescan_bus_bridge_resize(bus->self);
+		else
+			pci_rescan_bus(bus);
 		mutex_unlock(&pci_remove_rescan_mutex);
 	}
 	return count;
Index: linux-2.6/drivers/pci/probe.c
===================================================================
--- linux-2.6.orig/drivers/pci/probe.c
+++ linux-2.6/drivers/pci/probe.c
@@ -1661,6 +1661,30 @@ struct pci_bus * __devinit pci_scan_bus(
 
 #ifdef CONFIG_HOTPLUG
 /**
+ * pci_rescan_bus_bridge_resize - scan a PCI bus for devices.
+ * @bridge: PCI bridge for the bus to scan
+ *
+ * Scan a PCI bus and child buses for new devices, adds them,
+ * and enables them, it will resize bridge mmio/io resource if it is possible
+ * for safe, caller should make sure that children get removed already.
+ *
+ * Returns the max number of subordinate bus discovered.
+ */
+unsigned int __ref pci_rescan_bus_bridge_resize(struct pci_dev *bridge)
+{
+	unsigned int max;
+	struct pci_bus *bus = bridge->subordinate;
+
+	max = pci_scan_child_bus(bus);
+
+	pci_assign_unassigned_bridge_resources(bridge);
+
+	pci_bus_add_devices(bus);
+
+	return max;
+}
+
+/**
  * pci_rescan_bus - scan a PCI bus for devices.
  * @bus: PCI bus to scan
  *
Index: linux-2.6/include/linux/pci.h
===================================================================
--- linux-2.6.orig/include/linux/pci.h
+++ linux-2.6/include/linux/pci.h
@@ -882,6 +882,7 @@ void set_pcie_hotplug_bridge(struct pci_
 /* Functions for PCI Hotplug drivers to use */
 int pci_bus_find_capability(struct pci_bus *bus, unsigned int devfn, int cap);
 #ifdef CONFIG_HOTPLUG
+unsigned int pci_rescan_bus_bridge_resize(struct pci_dev *bridge);
 unsigned int pci_rescan_bus(struct pci_bus *bus);
 #endif
 

[PATCH 5/5] PCI: Make pci_rescan_bus handle add_list

[Yinghai Lu]

So it will allocate resource to hotplug bridge during remove/rescan.

Need to move that function to setup-bus.c so it could use
  __pci_bus_size_bridges and __pci_bus_assign_resources
directly to take add_list.

Signed-off-by: Yinghai Lu <yinghai@kernel.org>

---
 drivers/pci/probe.c     |   32 --------------------------------
 drivers/pci/setup-bus.c |   39 +++++++++++++++++++++++++++++++++++++++
 2 files changed, 39 insertions(+), 32 deletions(-)

Index: linux-2.6/drivers/pci/probe.c
===================================================================
--- linux-2.6.orig/drivers/pci/probe.c
+++ linux-2.6/drivers/pci/probe.c
@@ -1684,38 +1684,6 @@ unsigned int __ref pci_rescan_bus_bridge
 	return max;
 }
 
-/**
- * pci_rescan_bus - scan a PCI bus for devices.
- * @bus: PCI bus to scan
- *
- * Scan a PCI bus and child buses for new devices, adds them,
- * and enables them.
- *
- * Returns the max number of subordinate bus discovered.
- */
-unsigned int __ref pci_rescan_bus(struct pci_bus *bus)
-{
-	unsigned int max;
-	struct pci_dev *dev;
-
-	max = pci_scan_child_bus(bus);
-
-	down_read(&pci_bus_sem);
-	list_for_each_entry(dev, &bus->devices, bus_list)
-		if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE ||
-		    dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
-			if (dev->subordinate)
-				pci_bus_size_bridges(dev->subordinate);
-	up_read(&pci_bus_sem);
-
-	pci_bus_assign_resources(bus);
-	pci_enable_bridges(bus);
-	pci_bus_add_devices(bus);
-
-	return max;
-}
-EXPORT_SYMBOL_GPL(pci_rescan_bus);
-
 EXPORT_SYMBOL(pci_add_new_bus);
 EXPORT_SYMBOL(pci_scan_slot);
 EXPORT_SYMBOL(pci_scan_bridge);
Index: linux-2.6/drivers/pci/setup-bus.c
===================================================================
--- linux-2.6.orig/drivers/pci/setup-bus.c
+++ linux-2.6/drivers/pci/setup-bus.c
@@ -1354,3 +1354,42 @@ enable_all:
 	pci_enable_bridges(parent);
 }
 EXPORT_SYMBOL_GPL(pci_assign_unassigned_bridge_resources);
+
+#ifdef CONFIG_HOTPLUG
+/**
+ * pci_rescan_bus - scan a PCI bus for devices.
+ * @bus: PCI bus to scan
+ *
+ * Scan a PCI bus and child buses for new devices, adds them,
+ * and enables them.
+ *
+ * Returns the max number of subordinate bus discovered.
+ */
+unsigned int __ref pci_rescan_bus(struct pci_bus *bus)
+{
+	unsigned int max;
+	struct pci_dev *dev;
+	struct resource_list_x add_list; /* list of resources that
+					want additional resources */
+
+	max = pci_scan_child_bus(bus);
+
+	add_list.next = NULL;
+	down_read(&pci_bus_sem);
+	list_for_each_entry(dev, &bus->devices, bus_list)
+		if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE ||
+		    dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
+			if (dev->subordinate)
+				__pci_bus_size_bridges(dev->subordinate,
+							 &add_list);
+	up_read(&pci_bus_sem);
+	__pci_bus_assign_resources(bus, &add_list, NULL);
+	BUG_ON(add_list.next);
+
+	pci_enable_bridges(bus);
+	pci_bus_add_devices(bus);
+
+	return max;
+}
+EXPORT_SYMBOL_GPL(pci_rescan_bus);
+#endif