From: Yinghai Lu <yinghai@kernel.org>
To: Jesse Barnes <jbarnes@virtuousgeek.org>,
Benjamin Herrenschmidt <benh@kernel.crashing.org>,
Tony Luck <tony.luck@intel.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>,
Dominik Brodowski <linux@dominikbrodowski.net>,
Andrew Morton <akpm@linux-foundation.org>,
Linus Torvalds <torvalds@linux-foundation.org>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arch@vger.kernel.org, Yinghai Lu <yinghai@kernel.org>,
"David S. Miller" <davem@davemloft.net>,
sparclinux@vger.kernel.org
Subject: [PATCH 07/18] PCI, sparc: Register busn_res for root buses
Date: Mon, 27 Feb 2012 18:09:58 -0800 [thread overview]
Message-ID: <1330395009-29260-8-git-send-email-yinghai@kernel.org> (raw)
In-Reply-To: <1330395009-29260-1-git-send-email-yinghai@kernel.org>
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: sparclinux@vger.kernel.org
---
arch/sparc/kernel/pci.c | 1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/arch/sparc/kernel/pci.c b/arch/sparc/kernel/pci.c
index 253e8ac..57ffe31 100644
--- a/arch/sparc/kernel/pci.c
+++ b/arch/sparc/kernel/pci.c
@@ -705,6 +705,7 @@ struct pci_bus * __devinit pci_scan_one_pbm(struct pci_pbm_info *pbm,
}
bus->secondary = pbm->pci_first_busno;
bus->subordinate = pbm->pci_last_busno;
+ pci_bus_insert_busn_res(bus, pbm->pci_first_busno, pbm->pci_last_busno);
pci_of_scan_bus(pbm, node, bus);
pci_bus_add_devices(bus);
--
1.7.7
next prev parent reply other threads:[~2012-02-28 2:11 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-02-28 2:09 [PATCH -v8 0/18] PCI: allocate pci bus num range for unassigned bridge busn Yinghai Lu
2012-02-28 2:09 ` [PATCH 01/18] x86, PCI: Merge pcibios_scan_root and pci_scan_bus_on_node Yinghai Lu
2012-02-28 2:09 ` [PATCH 02/18] PCI: Add busn_res into struct pci_bus Yinghai Lu
2012-02-28 2:09 ` [PATCH 03/18] PCI: Add busn_res operation functions Yinghai Lu
2012-02-28 2:09 ` [PATCH 04/18] PCI: Add busn_res tracking in core Yinghai Lu
2012-02-28 2:09 ` [PATCH 05/18] PCI, x86: Register busn_res for root buses Yinghai Lu
2012-02-28 2:09 ` [PATCH 06/18] PCI, ia64: " Yinghai Lu
2012-02-28 2:09 ` Yinghai Lu [this message]
2012-02-28 2:09 ` [PATCH 08/18] PCI, powerpc: " Yinghai Lu
2012-02-28 5:36 ` Bjorn Helgaas
2012-02-28 8:54 ` Benjamin Herrenschmidt
2012-02-28 23:31 ` Bjorn Helgaas
2012-02-28 23:41 ` Benjamin Herrenschmidt
2012-02-28 2:10 ` [PATCH 09/18] PCI, parisc: " Yinghai Lu
2012-02-28 2:10 ` [PATCH 10/18] PCI: Add pci_bus_extend/shrink_top() Yinghai Lu
2012-02-28 2:10 ` [PATCH 11/18] PCI: Probe safe range that we can use for unassigned bridge Yinghai Lu
2012-02-28 2:10 ` [PATCH 12/18] PCI: Strict checking of valid range for bridge Yinghai Lu
2012-02-28 2:10 ` [PATCH 13/18] PCI: Allocate bus range instead of use max blindly Yinghai Lu
2012-02-28 2:10 ` [PATCH 14/18] PCI: kill pci_fixup_parent_subordinate_busnr() Yinghai Lu
2012-02-28 2:10 ` [PATCH 15/18] PCI: Seperate child bus scanning to two passes overall Yinghai Lu
2012-02-28 2:10 ` [PATCH 16/18] pcmcia: remove workaround for fixing pci parent bus subordinate Yinghai Lu
2012-02-28 2:10 ` [PATCH 17/18] PCI: Double checking setting for bus register and bus struct Yinghai Lu
2012-02-28 2:10 ` [PATCH 18/18] PCI, pciehp: Remove not needed bus number range checking Yinghai Lu
2012-02-28 10:03 ` [PATCH -v8 0/23] PCI: allocate pci bus num range for unassigned bridge busn Yinghai Lu
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