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From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
To: Bjorn Helgaas <bhelgaas@google.com>
Cc: Yinghai Lu <yinghai@kernel.org>,
	Jesse Barnes <jbarnes@virtuousgeek.org>,
	Tony Luck <tony.luck@intel.com>,
	Dominik Brodowski <linux@dominikbrodowski.net>,
	Andrew Morton <akpm@linux-foundation.org>,
	Linus Torvalds <torvalds@linux-foundation.org>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arch@vger.kernel.org, Paul Mackerras <paulus@samba.org>,
	linuxppc-dev@lists.ozlabs.org
Subject: Re: [PATCH 08/18] PCI, powerpc: Register busn_res for root buses
Date: Tue, 28 Feb 2012 19:54:32 +1100	[thread overview]
Message-ID: <1330419272.11728.27.camel@pasglop> (raw)
In-Reply-To: <CAErSpo4bw-V=SM+h5iP4nfv3HaAnHjwvNwu+4Oz8iyQcY_3gOQ@mail.gmail.com>

On Mon, 2012-02-27 at 22:36 -0700, Bjorn Helgaas wrote:
> 
> There's a lot of powerpc code that does this:
> 
>     bus_range = of_get_property(pcictrl, "bus-range", &len);
>     hose->first_busno = bus_range[0];
>     hose->last_busno = bus_range[1];
> 
> That *looks* like it is discovering the bus number aperture.  Is it?
> If it is, why are we using the largest bus number found by
> pci_scan_child_bus() rather than "last_busno"?

We do that but we somewhat -also- rely on the core bumping it if it
needs to make room :-)

As I said, we are swimming in dirty waters between reverse engineered
stuff we don't know 100% and "designed" stuff.

I think we should have ways to more explicitely define what we want tho,
ie whether hose->last_busno is just what happens to be the "current" bus
number assigned by the firmware or the hard max. Maybe a pci flag ?

On the other hand some platforms (all the ppc4xx ones for example) set
the flag to reassign all busses ... but have limit on bus numbers simply
because they have a memory mapped only config space and we don't have
enough address space to ioremap it all on 32-bit.

We need to fix them to use a fixmap entry to do atomic on-demand mapping
of the config space and lift that restriction, but that isn't done yet.

So I think those patches will need really careful handling on our side.

Cheers,
Ben.



  reply	other threads:[~2012-02-28  8:55 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-02-28  2:09 [PATCH -v8 0/18] PCI: allocate pci bus num range for unassigned bridge busn Yinghai Lu
2012-02-28  2:09 ` [PATCH 01/18] x86, PCI: Merge pcibios_scan_root and pci_scan_bus_on_node Yinghai Lu
2012-02-28  2:09 ` [PATCH 02/18] PCI: Add busn_res into struct pci_bus Yinghai Lu
2012-02-28  2:09 ` [PATCH 03/18] PCI: Add busn_res operation functions Yinghai Lu
2012-02-28  2:09 ` [PATCH 04/18] PCI: Add busn_res tracking in core Yinghai Lu
2012-02-28  2:09 ` [PATCH 05/18] PCI, x86: Register busn_res for root buses Yinghai Lu
2012-02-28  2:09 ` [PATCH 06/18] PCI, ia64: " Yinghai Lu
2012-02-28  2:09 ` [PATCH 07/18] PCI, sparc: " Yinghai Lu
2012-02-28  2:09 ` [PATCH 08/18] PCI, powerpc: " Yinghai Lu
2012-02-28  5:36   ` Bjorn Helgaas
2012-02-28  8:54     ` Benjamin Herrenschmidt [this message]
2012-02-28 23:31     ` Bjorn Helgaas
2012-02-28 23:41       ` Benjamin Herrenschmidt
2012-02-28  2:10 ` [PATCH 09/18] PCI, parisc: " Yinghai Lu
2012-02-28  2:10 ` [PATCH 10/18] PCI: Add pci_bus_extend/shrink_top() Yinghai Lu
2012-02-28  2:10 ` [PATCH 11/18] PCI: Probe safe range that we can use for unassigned bridge Yinghai Lu
2012-02-28  2:10 ` [PATCH 12/18] PCI: Strict checking of valid range for bridge Yinghai Lu
2012-02-28  2:10 ` [PATCH 13/18] PCI: Allocate bus range instead of use max blindly Yinghai Lu
2012-02-28  2:10 ` [PATCH 14/18] PCI: kill pci_fixup_parent_subordinate_busnr() Yinghai Lu
2012-02-28  2:10 ` [PATCH 15/18] PCI: Seperate child bus scanning to two passes overall Yinghai Lu
2012-02-28  2:10 ` [PATCH 16/18] pcmcia: remove workaround for fixing pci parent bus subordinate Yinghai Lu
2012-02-28  2:10 ` [PATCH 17/18] PCI: Double checking setting for bus register and bus struct Yinghai Lu
2012-02-28  2:10 ` [PATCH 18/18] PCI, pciehp: Remove not needed bus number range checking Yinghai Lu
2012-02-28 10:03 ` [PATCH -v8 0/23] PCI: allocate pci bus num range for unassigned bridge busn Yinghai Lu

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