From: Yinghai Lu <yinghai@kernel.org>
To: Jesse Barnes <jbarnes@virtuousgeek.org>,
Benjamin Herrenschmidt <benh@kernel.crashing.org>,
Tony Luck <tony.luck@intel.com>,
David Miller <davem@davemloft.net>, x86 <x86@kernel.org>
Cc: Bjorn Helgaas <bhelgaas@google.com>,
Dominik Brodowski <linux@dominikbrodowski.net>,
Andrew Morton <akpm@linux-foundation.org>,
Linus Torvalds <torvalds@linux-foundation.org>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arch@vger.kernel.org, Yinghai Lu <yinghai@kernel.org>,
Paul Mackerras <paulus@samba.org>,
linuxppc-dev@lists.ozlabs.org
Subject: [PATCH 14/24] PCI, powerpc: Register busn_res for root buses
Date: Tue, 28 Feb 2012 14:07:33 -0800 [thread overview]
Message-ID: <1330466863-28469-15-git-send-email-yinghai@kernel.org> (raw)
In-Reply-To: <1330466863-28469-1-git-send-email-yinghai@kernel.org>
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: linuxppc-dev@lists.ozlabs.org
---
arch/powerpc/include/asm/pci-bridge.h | 1 +
arch/powerpc/kernel/pci-common.c | 10 +++++++++-
2 files changed, 10 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/include/asm/pci-bridge.h b/arch/powerpc/include/asm/pci-bridge.h
index 5d48765..11cebf0 100644
--- a/arch/powerpc/include/asm/pci-bridge.h
+++ b/arch/powerpc/include/asm/pci-bridge.h
@@ -30,6 +30,7 @@ struct pci_controller {
int first_busno;
int last_busno;
int self_busno;
+ struct resource busn;
void __iomem *io_base_virt;
#ifdef CONFIG_PPC64
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
index 910b9de..ee8c0c9 100644
--- a/arch/powerpc/kernel/pci-common.c
+++ b/arch/powerpc/kernel/pci-common.c
@@ -1648,6 +1648,11 @@ void __devinit pcibios_scan_phb(struct pci_controller *hose)
/* Wire up PHB bus resources */
pcibios_setup_phb_resources(hose, &resources);
+ hose->busn.start = hose->first_busno;
+ hose->busn.end = hose->last_busno;
+ hose->busn.flags = IORESOURCE_BUS;
+ pci_add_resource(&resources, &hose->busn);
+
/* Create an empty bus for the toplevel */
bus = pci_create_root_bus(hose->parent, hose->first_busno,
hose->ops, hose, &resources);
@@ -1670,8 +1675,11 @@ void __devinit pcibios_scan_phb(struct pci_controller *hose)
of_scan_bus(node, bus);
}
- if (mode == PCI_PROBE_NORMAL)
+ if (mode == PCI_PROBE_NORMAL) {
+ pci_bus_update_busn_res_end(bus, 255);
hose->last_busno = bus->subordinate = pci_scan_child_bus(bus);
+ pci_bus_update_busn_res_end(bus, bus->subordinate);
+ }
/* Platform gets a chance to do some global fixups before
* we proceed to resource allocation
--
1.7.7
next prev parent reply other threads:[~2012-02-28 22:07 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-02-28 22:07 [PATCH -v9 00/24] PCI: allocate pci bus num range for unassigned bridge busn Yinghai Lu
2012-02-28 22:07 ` [PATCH 01/24] x86, PCI: add print all root info for nocrs path Yinghai Lu
2012-02-28 22:07 ` [PATCH 02/24] x86, PCI: Merge pcibios_scan_root and pci_scan_bus_on_node Yinghai Lu
2012-02-28 22:07 ` [PATCH 03/24] PCI: Add busn_res into struct pci_bus Yinghai Lu
2012-02-28 22:07 ` [PATCH 04/24] PCI: Add busn_res operation functions Yinghai Lu
2012-02-28 22:07 ` [PATCH 05/24] PCI: release busn when removing bus Yinghai Lu
2012-02-28 22:07 ` [PATCH 06/24] PCI: insert busn_res in pci_create_root_bus Yinghai Lu
2012-02-28 22:07 ` [PATCH 07/24] PCI: checking busn_res in pci_scan_root_bus Yinghai Lu
2012-02-28 22:07 ` [PATCH 08/24] PCI: default busn_resource Yinghai Lu
2012-02-28 22:07 ` [PATCH 09/24] PCI: add default res for pci_scan_bus Yinghai Lu
2012-02-28 22:07 ` [PATCH 10/24] x86, PCI: put busn resource in pci_root_info for acpi path Yinghai Lu
2012-02-28 22:07 ` [PATCH 11/24] x86, PCI: put busn resource in pci_root_info for no_crs path Yinghai Lu
2012-02-28 22:07 ` [PATCH 12/24] PCI, ia64: Register busn_res for root buses Yinghai Lu
2012-02-29 0:01 ` Bjorn Helgaas
2012-02-29 0:12 ` Yinghai Lu
2012-02-29 0:22 ` Bjorn Helgaas
2012-02-29 4:26 ` Yinghai Lu
2012-02-28 22:07 ` [PATCH 13/24] PCI, sparc: " Yinghai Lu
2012-02-28 22:07 ` Yinghai Lu [this message]
2012-02-28 22:07 ` [PATCH 15/24] PCI, parisc: " Yinghai Lu
2012-02-28 22:07 ` [PATCH 16/24] PCI: Add pci_bus_extend/shrink_top() Yinghai Lu
2012-02-28 22:07 ` [PATCH 17/24] PCI: Probe safe range that we can use for unassigned bridge Yinghai Lu
2012-02-28 22:07 ` [PATCH 18/24] PCI: Strict checking of valid range for bridge Yinghai Lu
2012-02-28 22:07 ` [PATCH 19/24] PCI: Allocate bus range instead of use max blindly Yinghai Lu
2012-02-28 22:07 ` [PATCH 20/24] PCI: kill pci_fixup_parent_subordinate_busnr() Yinghai Lu
2012-02-28 22:07 ` [PATCH 21/24] PCI: Seperate child bus scanning to two passes overall Yinghai Lu
2012-02-28 22:07 ` [PATCH 22/24] pcmcia: remove workaround for fixing pci parent bus subordinate Yinghai Lu
2012-02-28 22:07 ` [PATCH 23/24] PCI: Double checking setting for bus register and bus struct Yinghai Lu
2012-02-28 22:07 ` [PATCH 24/24] PCI, pciehp: Remove not needed bus number range checking Yinghai Lu
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