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From: Yinghai Lu <yinghai@kernel.org>
To: Jesse Barnes <jbarnes@virtuousgeek.org>,
	Benjamin Herrenschmidt <benh@kernel.crashing.org>,
	Tony Luck <tony.luck@intel.com>,
	David Miller <davem@davemloft.net>, x86 <x86@kernel.org>
Cc: Bjorn Helgaas <bhelgaas@google.com>,
	Dominik Brodowski <linux@dominikbrodowski.net>,
	Andrew Morton <akpm@linux-foundation.org>,
	Linus Torvalds <torvalds@linux-foundation.org>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arch@vger.kernel.org, Yinghai Lu <yinghai@kernel.org>
Subject: [PATCH 16/24] PCI: Add pci_bus_extend/shrink_top()
Date: Tue, 28 Feb 2012 14:07:35 -0800	[thread overview]
Message-ID: <1330466863-28469-17-git-send-email-yinghai@kernel.org> (raw)
In-Reply-To: <1330466863-28469-1-git-send-email-yinghai@kernel.org>

extend or shrink bus and parent buses top (subordinate)

extended range is verified safe range, and stop at recorded parent_res.

Signed-off-by: Yinghai Lu <yinghai@kernel.org>
---
 drivers/pci/probe.c |   36 ++++++++++++++++++++++++++++++++++++
 1 files changed, 36 insertions(+), 0 deletions(-)

diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 1c07aba..96259f8 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -655,6 +655,42 @@ static void pci_fixup_parent_subordinate_busnr(struct pci_bus *child, int max)
 	}
 }
 
+static void __devinit pci_bus_update_top(struct pci_bus *parent,
+		 long size, struct resource *parent_res)
+{
+	struct resource *res;
+
+	if (!size)
+		return;
+
+	while (parent) {
+		res = &parent->busn_res;
+		if (res == parent_res)
+			break;
+		res->end += size;
+		parent->subordinate += size;
+		pci_write_config_byte(parent->self, PCI_SUBORDINATE_BUS,
+					 parent->subordinate);
+		dev_printk(KERN_DEBUG, &parent->dev,
+				"busn_res: %s %02lx to %pR\n",
+				(size > 0) ? "extended" : "shrunk",
+				abs(size), res);
+		parent = parent->parent;
+	}
+}
+
+static void __devinit pci_bus_extend_top(struct pci_bus *parent,
+		 long size, struct resource *parent_res)
+{
+	pci_bus_update_top(parent, size, parent_res);
+}
+
+static void __devinit pci_bus_shrink_top(struct pci_bus *parent,
+		 long size, struct resource *parent_res)
+{
+	pci_bus_update_top(parent, -size, parent_res);
+}
+
 /*
  * If it's a bridge, configure it and scan the bus behind it.
  * For CardBus bridges, we don't scan behind as the devices will
-- 
1.7.7


  parent reply	other threads:[~2012-02-28 22:07 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-02-28 22:07 [PATCH -v9 00/24] PCI: allocate pci bus num range for unassigned bridge busn Yinghai Lu
2012-02-28 22:07 ` [PATCH 01/24] x86, PCI: add print all root info for nocrs path Yinghai Lu
2012-02-28 22:07 ` [PATCH 02/24] x86, PCI: Merge pcibios_scan_root and pci_scan_bus_on_node Yinghai Lu
2012-02-28 22:07 ` [PATCH 03/24] PCI: Add busn_res into struct pci_bus Yinghai Lu
2012-02-28 22:07 ` [PATCH 04/24] PCI: Add busn_res operation functions Yinghai Lu
2012-02-28 22:07 ` [PATCH 05/24] PCI: release busn when removing bus Yinghai Lu
2012-02-28 22:07 ` [PATCH 06/24] PCI: insert busn_res in pci_create_root_bus Yinghai Lu
2012-02-28 22:07 ` [PATCH 07/24] PCI: checking busn_res in pci_scan_root_bus Yinghai Lu
2012-02-28 22:07 ` [PATCH 08/24] PCI: default busn_resource Yinghai Lu
2012-02-28 22:07 ` [PATCH 09/24] PCI: add default res for pci_scan_bus Yinghai Lu
2012-02-28 22:07 ` [PATCH 10/24] x86, PCI: put busn resource in pci_root_info for acpi path Yinghai Lu
2012-02-28 22:07 ` [PATCH 11/24] x86, PCI: put busn resource in pci_root_info for no_crs path Yinghai Lu
2012-02-28 22:07 ` [PATCH 12/24] PCI, ia64: Register busn_res for root buses Yinghai Lu
2012-02-29  0:01   ` Bjorn Helgaas
2012-02-29  0:12     ` Yinghai Lu
2012-02-29  0:22       ` Bjorn Helgaas
2012-02-29  4:26         ` Yinghai Lu
2012-02-28 22:07 ` [PATCH 13/24] PCI, sparc: " Yinghai Lu
2012-02-28 22:07 ` [PATCH 14/24] PCI, powerpc: " Yinghai Lu
2012-02-28 22:07 ` [PATCH 15/24] PCI, parisc: " Yinghai Lu
2012-02-28 22:07 ` Yinghai Lu [this message]
2012-02-28 22:07 ` [PATCH 17/24] PCI: Probe safe range that we can use for unassigned bridge Yinghai Lu
2012-02-28 22:07 ` [PATCH 18/24] PCI: Strict checking of valid range for bridge Yinghai Lu
2012-02-28 22:07 ` [PATCH 19/24] PCI: Allocate bus range instead of use max blindly Yinghai Lu
2012-02-28 22:07 ` [PATCH 20/24] PCI: kill pci_fixup_parent_subordinate_busnr() Yinghai Lu
2012-02-28 22:07 ` [PATCH 21/24] PCI: Seperate child bus scanning to two passes overall Yinghai Lu
2012-02-28 22:07 ` [PATCH 22/24] pcmcia: remove workaround for fixing pci parent bus subordinate Yinghai Lu
2012-02-28 22:07 ` [PATCH 23/24] PCI: Double checking setting for bus register and bus struct Yinghai Lu
2012-02-28 22:07 ` [PATCH 24/24] PCI, pciehp: Remove not needed bus number range checking Yinghai Lu

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