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From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
To: Bjorn Helgaas <bhelgaas@google.com>
Cc: Yinghai Lu <yinghai@kernel.org>,
	Jesse Barnes <jbarnes@virtuousgeek.org>,
	Tony Luck <tony.luck@intel.com>,
	Dominik Brodowski <linux@dominikbrodowski.net>,
	Andrew Morton <akpm@linux-foundation.org>,
	Linus Torvalds <torvalds@linux-foundation.org>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arch@vger.kernel.org, Paul Mackerras <paulus@samba.org>,
	linuxppc-dev@lists.ozlabs.org
Subject: Re: [PATCH 08/18] PCI, powerpc: Register busn_res for root buses
Date: Wed, 29 Feb 2012 10:41:36 +1100	[thread overview]
Message-ID: <1330472496.11728.31.camel@pasglop> (raw)
In-Reply-To: <CAErSpo72_JnUkWXrzbNdbX9wiWZtQdX2tuNjEpYrSd+sGzxfzA@mail.gmail.com>

On Tue, 2012-02-28 at 16:31 -0700, Bjorn Helgaas wrote:
> We may need mechanism to say "don't trust this info from the
> firmware," but we should be able to figure out a way that doesn't
> penalize platforms that do everything correctly.  The current patch
> breaks these scenarios even when the platform firmware is 100%
> correct.

On the other hand, our firmwares tend not to be and the vast majority of
our platforms have separate bus number domains (In fact I'm not sure
whether we have one that actually splits bus numbers or not, maybe some
ancient Apple gear, I need to double check).

We did use to force renumbering on macs to avoid bus number collisions
between domains because of ancient X servers that didn't do domains
properly but I think we dropped that.

Cheers,
Ben.



  reply	other threads:[~2012-02-28 23:41 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-02-28  2:09 [PATCH -v8 0/18] PCI: allocate pci bus num range for unassigned bridge busn Yinghai Lu
2012-02-28  2:09 ` [PATCH 01/18] x86, PCI: Merge pcibios_scan_root and pci_scan_bus_on_node Yinghai Lu
2012-02-28  2:09 ` [PATCH 02/18] PCI: Add busn_res into struct pci_bus Yinghai Lu
2012-02-28  2:09 ` [PATCH 03/18] PCI: Add busn_res operation functions Yinghai Lu
2012-02-28  2:09 ` [PATCH 04/18] PCI: Add busn_res tracking in core Yinghai Lu
2012-02-28  2:09 ` [PATCH 05/18] PCI, x86: Register busn_res for root buses Yinghai Lu
2012-02-28  2:09 ` [PATCH 06/18] PCI, ia64: " Yinghai Lu
2012-02-28  2:09 ` [PATCH 07/18] PCI, sparc: " Yinghai Lu
2012-02-28  2:09 ` [PATCH 08/18] PCI, powerpc: " Yinghai Lu
2012-02-28  5:36   ` Bjorn Helgaas
2012-02-28  8:54     ` Benjamin Herrenschmidt
2012-02-28 23:31     ` Bjorn Helgaas
2012-02-28 23:41       ` Benjamin Herrenschmidt [this message]
2012-02-28  2:10 ` [PATCH 09/18] PCI, parisc: " Yinghai Lu
2012-02-28  2:10 ` [PATCH 10/18] PCI: Add pci_bus_extend/shrink_top() Yinghai Lu
2012-02-28  2:10 ` [PATCH 11/18] PCI: Probe safe range that we can use for unassigned bridge Yinghai Lu
2012-02-28  2:10 ` [PATCH 12/18] PCI: Strict checking of valid range for bridge Yinghai Lu
2012-02-28  2:10 ` [PATCH 13/18] PCI: Allocate bus range instead of use max blindly Yinghai Lu
2012-02-28  2:10 ` [PATCH 14/18] PCI: kill pci_fixup_parent_subordinate_busnr() Yinghai Lu
2012-02-28  2:10 ` [PATCH 15/18] PCI: Seperate child bus scanning to two passes overall Yinghai Lu
2012-02-28  2:10 ` [PATCH 16/18] pcmcia: remove workaround for fixing pci parent bus subordinate Yinghai Lu
2012-02-28  2:10 ` [PATCH 17/18] PCI: Double checking setting for bus register and bus struct Yinghai Lu
2012-02-28  2:10 ` [PATCH 18/18] PCI, pciehp: Remove not needed bus number range checking Yinghai Lu
2012-02-28 10:03 ` [PATCH -v8 0/23] PCI: allocate pci bus num range for unassigned bridge busn Yinghai Lu

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