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From: Yinghai Lu <yinghai@kernel.org>
To: Jesse Barnes <jbarnes@virtuousgeek.org>,
	Benjamin Herrenschmidt <benh@kernel.crashing.org>,
	Tony Luck <tony.luck@intel.com>,
	David Miller <davem@davemloft.net>, x86 <x86@kernel.org>
Cc: Bjorn Helgaas <bhelgaas@google.com>,
	Dominik Brodowski <linux@dominikbrodowski.net>,
	linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arch@vger.kernel.org, Yinghai Lu <yinghai@kernel.org>
Subject: [PATCH 28/36] PCI: Add pci_bus_extend/shrink_top()
Date: Wed, 29 Feb 2012 19:00:29 -0800	[thread overview]
Message-ID: <1330570837-26638-29-git-send-email-yinghai@kernel.org> (raw)
In-Reply-To: <1330570837-26638-1-git-send-email-yinghai@kernel.org>

extend or shrink bus and parent buses top (subordinate)

extended range is verified safe range, and stop at recorded parent_res.

Signed-off-by: Yinghai Lu <yinghai@kernel.org>
---
 drivers/pci/probe.c |   36 ++++++++++++++++++++++++++++++++++++
 1 files changed, 36 insertions(+), 0 deletions(-)

diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 1c07aba..96259f8 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -655,6 +655,42 @@ static void pci_fixup_parent_subordinate_busnr(struct pci_bus *child, int max)
 	}
 }
 
+static void __devinit pci_bus_update_top(struct pci_bus *parent,
+		 long size, struct resource *parent_res)
+{
+	struct resource *res;
+
+	if (!size)
+		return;
+
+	while (parent) {
+		res = &parent->busn_res;
+		if (res == parent_res)
+			break;
+		res->end += size;
+		parent->subordinate += size;
+		pci_write_config_byte(parent->self, PCI_SUBORDINATE_BUS,
+					 parent->subordinate);
+		dev_printk(KERN_DEBUG, &parent->dev,
+				"busn_res: %s %02lx to %pR\n",
+				(size > 0) ? "extended" : "shrunk",
+				abs(size), res);
+		parent = parent->parent;
+	}
+}
+
+static void __devinit pci_bus_extend_top(struct pci_bus *parent,
+		 long size, struct resource *parent_res)
+{
+	pci_bus_update_top(parent, size, parent_res);
+}
+
+static void __devinit pci_bus_shrink_top(struct pci_bus *parent,
+		 long size, struct resource *parent_res)
+{
+	pci_bus_update_top(parent, -size, parent_res);
+}
+
 /*
  * If it's a bridge, configure it and scan the bus behind it.
  * For CardBus bridges, we don't scan behind as the devices will
-- 
1.7.7


  parent reply	other threads:[~2012-03-01  3:00 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-03-01  3:00 [PATCH -v2 00/36] PCI: pci_host_bridge related cleanup and busn_alloc Yinghai Lu
2012-03-01  3:00 ` [PATCH 01/36] PCI: Separate host_bridge code out from probe.c Yinghai Lu
2012-03-01  3:00 ` [PATCH 02/36] x86, PCI: Fix memleak with get_current_resources Yinghai Lu
2012-03-15  8:39   ` Taku Izumi
2012-03-15 17:44     ` Yinghai Lu
2012-03-01  3:00 ` [PATCH 03/36] PCI: rename pci_host_bridge() to find_pci_root_bridge() Yinghai Lu
2012-03-01  3:00 ` [PATCH 04/36] PCI: add generic device into pci_host_bridge struct Yinghai Lu
2012-03-01  3:00 ` [PATCH 05/36] PCI: add host bridge release support Yinghai Lu
2012-03-01  3:00 ` [PATCH 06/36] x86, PCI: break down get_current_resource() Yinghai Lu
2012-03-01  3:00 ` [PATCH 07/36] x86, PCI: add host bridge resource release for using _CRS Yinghai Lu
2012-03-01  3:00 ` [PATCH 08/36] x86, PCI: embed name acpi version pci_root_info struct Yinghai Lu
2012-03-01  3:00 ` [PATCH 09/36] x86, PCI: embed pci_sysdata into pci_root_info on acpi path Yinghai Lu
2012-03-01  3:00 ` [PATCH 10/36] x86, PCI: Allocating pci_root_info for not using _CRS path Yinghai Lu
2012-03-01  3:00 ` [PATCH 11/36] x86, PCI: Merge root info printing for nocrs path Yinghai Lu
2012-03-01  3:00 ` [PATCH 12/36] x86, PCI: add print all root info " Yinghai Lu
2012-03-01  3:00 ` [PATCH 13/36] x86, PCI: allocate temp range array in amd_bus pci_root_info probing Yinghai Lu
2012-03-01  3:00 ` [PATCH 14/36] x86, PCI: Merge pcibios_scan_root and pci_scan_bus_on_node Yinghai Lu
2012-03-01  3:00 ` [PATCH 15/36] PCI: Add busn_res into struct pci_bus Yinghai Lu
2012-03-01  3:00 ` [PATCH 16/36] PCI: Add busn_res operation functions Yinghai Lu
2012-03-01  3:00 ` [PATCH 17/36] PCI: release busn when removing bus Yinghai Lu
2012-03-01  3:00 ` [PATCH 18/36] PCI: insert busn_res in pci_create_root_bus Yinghai Lu
2012-03-01  3:00 ` [PATCH 19/36] PCI: checking busn_res in pci_scan_root_bus Yinghai Lu
2012-03-01  3:00 ` [PATCH 20/36] PCI: default busn_resource Yinghai Lu
2012-03-01  3:00 ` [PATCH 21/36] PCI: add default res for pci_scan_bus Yinghai Lu
2012-03-01  3:00 ` [PATCH 22/36] x86, PCI: add busn into resources list for acpi path Yinghai Lu
2012-03-01  3:00 ` [PATCH 23/36] x86, PCI: put busn resource in pci_root_info for no_crs path Yinghai Lu
2012-03-01  3:00 ` [PATCH 24/36] PCI, ia64: Register busn_res for root buses Yinghai Lu
2012-03-01  3:00 ` [PATCH 25/36] PCI, sparc: " Yinghai Lu
2012-03-01  3:00 ` [PATCH 26/36] PCI, powerpc: " Yinghai Lu
2012-03-01  3:00 ` [PATCH 27/36] PCI, parisc: " Yinghai Lu
2012-03-01  3:00 ` Yinghai Lu [this message]
2012-03-16 19:36   ` [PATCH 28/36] PCI: Add pci_bus_extend/shrink_top() Bjorn Helgaas
2012-03-16 20:42     ` Yinghai Lu
2012-03-16 21:04       ` Bjorn Helgaas
2012-03-01  3:00 ` [PATCH 29/36] PCI: Probe safe range that we can use for unassigned bridge Yinghai Lu
2012-03-01  3:00 ` [PATCH 30/36] PCI: Strict checking of valid range for bridge Yinghai Lu
2012-03-01  3:00 ` [PATCH 31/36] PCI: Allocate bus range instead of use max blindly Yinghai Lu
2012-03-01  3:00 ` [PATCH 32/36] PCI: kill pci_fixup_parent_subordinate_busnr() Yinghai Lu
2012-03-01  3:00 ` [PATCH 33/36] PCI: Seperate child bus scanning to two passes overall Yinghai Lu
2012-03-01  3:00 ` [PATCH 34/36] pcmcia: remove workaround for fixing pci parent bus subordinate Yinghai Lu
2012-03-01  3:00 ` [PATCH 35/36] PCI: Double checking setting for bus register and bus struct Yinghai Lu
2012-03-01  3:00 ` [PATCH 36/36] PCI, pciehp: Remove not needed bus number range checking Yinghai Lu
2012-03-15  6:40 ` [PATCH -v2 00/36] PCI: pci_host_bridge related cleanup and busn_alloc Taku Izumi
2012-03-15 17:40   ` Yinghai Lu

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