linux-pci.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Yinghai Lu <yinghai@kernel.org>
To: Jesse Barnes <jbarnes@virtuousgeek.org>,
	Benjamin Herrenschmidt <benh@kernel.crashing.org>,
	Tony Luck <tony.luck@intel.com>,
	David Miller <davem@davemloft.net>, x86 <x86@kernel.org>
Cc: Bjorn Helgaas <bhelgaas@google.com>,
	Dominik Brodowski <linux@dominikbrodowski.net>,
	Andrew Morton <akpm@linux-foundation.org>,
	Linus Torvalds <torvalds@linux-foundation.org>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arch@vger.kernel.org, Yinghai Lu <yinghai@kernel.org>
Subject: [PATCH -v11 25/30] PCI: Seperate child bus scanning to two passes overall
Date: Sun, 18 Mar 2012 22:42:56 -0700	[thread overview]
Message-ID: <1332135781-13695-26-git-send-email-yinghai@kernel.org> (raw)
In-Reply-To: <1332135781-13695-1-git-send-email-yinghai@kernel.org>

In extreme case: Two bridges are properly setup.
       bridge A
               bridge AA
               bridge AB
       bridge B
	       bridge BA
	       bridge BB
   but AA, AB are not setup properly.
   bridge A has small range, and bridge AB could need more, when do the
       first pass0 for bridge A, it will do pass0 and pass1 for AA and AB,
	during that process, it will extend range of A for AB blindly.
	because bridge B is not registered yet.
       that could overlap range that is used by bridge B.

Right way should be:
       do pass0 for all good bridges at first.
So we could do pass0 for bridge B before pass1 for bridge AB.

Signed-off-by: Yinghai Lu <yinghai@kernel.org>
---
 drivers/pci/probe.c |   50 ++++++++++++++++++++++++++++++++++----------------
 1 files changed, 34 insertions(+), 16 deletions(-)

diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 6577105..5567428 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -736,6 +736,9 @@ static int __devinit pci_bridge_check_busn_broken(struct pci_bus *bus,
 
 	return 0;
 }
+
+static unsigned int __devinit __pci_scan_child_bus(struct pci_bus *bus,
+						 int pass);
 /*
  * If it's a bridge, configure it and scan the bus behind it.
  * For CardBus bridges, we don't scan behind as the devices will
@@ -792,11 +795,10 @@ int __devinit pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max,
 	    !is_cardbus && !broken) {
 		unsigned int cmax;
 		/*
-		 * Bus already configured by firmware, process it in the first
-		 * pass and just note the configuration.
+		 * Bus already configured by firmware, still process it in two
+		 * passes in extreme case like two adjaced bridges have children
+		 * bridges that are not setup properly.
 		 */
-		if (pass)
-			goto out;
 
 		/*
 		 * If we already got to this bus through a different bridge,
@@ -817,7 +819,7 @@ int __devinit pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max,
 			pci_bus_insert_busn_res(child, secondary, subordinate);
 		}
 
-		cmax = pci_scan_child_bus(child);
+		cmax = __pci_scan_child_bus(child, pass);
 		if (cmax > max)
 			max = cmax;
 		if (child->subordinate > max)
@@ -1634,12 +1636,13 @@ void pcie_bus_configure_settings(struct pci_bus *bus, u8 mpss)
 }
 EXPORT_SYMBOL_GPL(pcie_bus_configure_settings);
 
-unsigned int __devinit pci_scan_child_bus(struct pci_bus *bus)
+static unsigned int __devinit __pci_scan_child_bus(struct pci_bus *bus,
+						 int pass)
 {
-	unsigned int devfn, pass, max = bus->secondary;
+	unsigned int devfn, max = bus->secondary;
 	struct pci_dev *dev;
 
-	dev_dbg(&bus->dev, "scanning bus\n");
+	dev_dbg(&bus->dev, "scanning bus pass %d\n", pass);
 
 	/* Go find them, Rover! */
 	for (devfn = 0; devfn < 0x100; devfn += 8)
@@ -1653,18 +1656,16 @@ unsigned int __devinit pci_scan_child_bus(struct pci_bus *bus)
 	 * all PCI-to-PCI bridges on this bus.
 	 */
 	if (!bus->is_added) {
-		dev_dbg(&bus->dev, "fixups for bus\n");
+		dev_dbg(&bus->dev, "fixups for bus pass %d\n", pass);
 		pcibios_fixup_bus(bus);
 		if (pci_is_root_bus(bus))
 			bus->is_added = 1;
 	}
 
-	for (pass=0; pass < 2; pass++)
-		list_for_each_entry(dev, &bus->devices, bus_list) {
-			if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE ||
-			    dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
-				max = pci_scan_bridge(bus, dev, max, pass);
-		}
+	list_for_each_entry(dev, &bus->devices, bus_list)
+		if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE ||
+		    dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
+			max = pci_scan_bridge(bus, dev, max, pass);
 
 	/*
 	 * We've scanned the bus and so we know all about what's on
@@ -1673,7 +1674,24 @@ unsigned int __devinit pci_scan_child_bus(struct pci_bus *bus)
 	 *
 	 * Return how far we've got finding sub-buses.
 	 */
-	dev_dbg(&bus->dev, "bus scan returning with max=%02x\n", max);
+	dev_dbg(&bus->dev, "bus scan returning with max=%02x pass %d\n",
+			max, pass);
+
+	return max;
+}
+
+unsigned int __devinit pci_scan_child_bus(struct pci_bus *bus)
+{
+	int pass;
+	unsigned int max = 0, tmp;
+
+	for (pass = 0; pass < 2;  pass++) {
+		tmp = __pci_scan_child_bus(bus, pass);
+
+		if (tmp > max)
+			max = tmp;
+	}
+
 	return max;
 }
 
-- 
1.7.7


  parent reply	other threads:[~2012-03-19  5:45 UTC|newest]

Thread overview: 49+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-03-19  5:42 [PATCH -v11 00/30] PCI: allocate pci bus num range for unassigned bridge busn Yinghai Lu
2012-03-19  5:42 ` [PATCH -v11 01/30] x86, PCI: Add print all root info for not using _CRS path Yinghai Lu
2012-03-19  5:42 ` [PATCH -v11 02/30] x86, PCI: Allocate temp range array in amd_bus pci_root_info probing Yinghai Lu
2012-03-19  5:42 ` [PATCH -v11 03/30] x86, PCI: Merge pcibios_scan_root and pci_scan_bus_on_node Yinghai Lu
2012-03-19  5:42 ` [PATCH -v11 04/30] PCI: Add busn_res into struct pci_bus Yinghai Lu
2012-04-30 23:25   ` Bjorn Helgaas
2012-05-01  0:32     ` Yinghai Lu
2012-05-01  4:02       ` Bjorn Helgaas
2012-05-01  6:27         ` Yinghai Lu
2012-05-01 15:40           ` Bjorn Helgaas
2012-05-01 19:28             ` Yinghai Lu
2012-05-02  5:07               ` Yinghai Lu
2012-03-19  5:42 ` [PATCH -v11 05/30] PCI: Add busn_res operation functions Yinghai Lu
2012-04-30 23:29   ` Bjorn Helgaas
2012-05-01  0:34     ` Yinghai Lu
2012-05-01  7:19       ` Yinghai Lu
2012-03-19  5:42 ` [PATCH -v11 06/30] PCI: Release busn_res when removing bus Yinghai Lu
2012-03-19  5:42 ` [PATCH -v11 07/30] PCI: Insert busn_res in pci_create_root_bus() Yinghai Lu
2012-03-19  5:42 ` [PATCH -v11 08/30] PCI: Checking busn_res in pci_scan_root_bus() Yinghai Lu
2012-03-19  5:42 ` [PATCH -v11 09/30] PCI: Add default busn_resource Yinghai Lu
2012-03-19  5:42 ` [PATCH -v11 10/30] PCI: Add default busn_res for pci_scan_bus() Yinghai Lu
2012-03-19  5:42 ` [PATCH -v11 11/30] x86, PCI: Add busn_res into resources list for acpi path Yinghai Lu
2012-03-19  5:42 ` [PATCH -v11 12/30] x86, PCI: Put busn resource in pci_root_info for not using _CRS path Yinghai Lu
2012-03-19  5:42 ` [PATCH -v11 13/30] PCI, ia64: Register busn_res for root buses Yinghai Lu
2012-03-19  5:42 ` [PATCH -v11 14/30] PCI, sparc: " Yinghai Lu
2012-03-19  5:42 ` [PATCH -v11 15/30] PCI, powerpc: " Yinghai Lu
2012-03-19  5:42 ` [PATCH -v11 16/30] PCI, parisc: " Yinghai Lu
2012-03-19  5:42 ` [PATCH -v11 17/30] resources: Add probe_resource() Yinghai Lu
2012-05-01 23:57   ` Bjorn Helgaas
2012-05-02  5:19     ` Yinghai Lu
2012-05-02  7:01       ` Yinghai Lu
2012-05-02 15:14         ` Bjorn Helgaas
2012-03-19  5:42 ` [PATCH -v11 18/30] resources: Replace registered resource in tree Yinghai Lu
2012-03-19  5:42 ` [PATCH -v11 19/30] PCI: Add pci_bus_extend/shrink_top() Yinghai Lu
2012-03-19  5:42 ` [PATCH -v11 20/30] PCI: Probe safe range that we can use for unassigned bridge Yinghai Lu
2012-03-19  5:42 ` [PATCH -v11 21/30] PCI: Add pci_bus_replace_busn_res() Yinghai Lu
2012-03-19  5:42 ` [PATCH -v11 22/30] PCI: Allocate bus range instead of use max blindly Yinghai Lu
2012-03-19  5:42 ` [PATCH -v11 23/30] PCI: Strict checking of valid range for bridge Yinghai Lu
2012-03-19  5:42 ` [PATCH -v11 24/30] PCI: Kill pci_fixup_parent_subordinate_busnr() Yinghai Lu
2012-03-19  5:42 ` Yinghai Lu [this message]
2012-03-19  5:42 ` [PATCH -v11 26/30] pcmcia: Remove workaround for fixing pci parent bus subordinate Yinghai Lu
2012-03-19  5:42 ` [PATCH -v11 27/30] PCI: Double checking setting for bus register and bus struct Yinghai Lu
2012-03-19  5:42 ` [PATCH -v11 28/30] PCI, pciehp: Remove not needed bus number range checking Yinghai Lu
2012-03-19  5:43 ` [PATCH -v11 29/30] PCI: More strict checking of valid range for bridge Yinghai Lu
2012-03-19  5:43 ` [PATCH -v11 30/30] PCI: Don't shrink too much for hotplug bridge Yinghai Lu
2012-05-02 21:22 ` [PATCH -v11 00/30] PCI: allocate pci bus num range for unassigned bridge busn Bjorn Helgaas
2012-05-03  9:08   ` Yinghai Lu
2012-05-03 23:47     ` Bjorn Helgaas
2012-05-04 20:07       ` Yinghai Lu

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1332135781-13695-26-git-send-email-yinghai@kernel.org \
    --to=yinghai@kernel.org \
    --cc=akpm@linux-foundation.org \
    --cc=benh@kernel.crashing.org \
    --cc=bhelgaas@google.com \
    --cc=davem@davemloft.net \
    --cc=gregkh@linuxfoundation.org \
    --cc=jbarnes@virtuousgeek.org \
    --cc=linux-arch@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=linux@dominikbrodowski.net \
    --cc=tony.luck@intel.com \
    --cc=torvalds@linux-foundation.org \
    --cc=x86@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).