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Message-ID: <1354745132.2355.98.camel@jtkirshe-mobl>
Subject: Re: [PATCH 07/12] e1000e: Use standard #defines for PCIe Capability
 ASPM fields
From: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Reply-To: jeffrey.t.kirsher@intel.com
To: Bjorn Helgaas <bhelgaas@google.com>
Cc: linux-pci@vger.kernel.org,
	Alex Duyck <alexander.h.duyck@intel.com>,
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	Greg Rose <gregory.v.rose@intel.com>,
	John Ronciak <john.ronciak@intel.com>,
	Carolyn Wyborny <carolyn.wyborny@intel.com>
Date: Wed, 05 Dec 2012 14:05:32 -0800
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On Wed, 2012-12-05 at 13:57 -0700, Bjorn Helgaas wrote:
> Use the standard #defines for PCIe Capability ASPM fields.
>=20
> Previously we used PCIE_LINK_STATE_L0S and PCIE_LINK_STATE_L1
> directly, but
> these are defined for the Linux ASPM interfaces, e.g.,
> pci_disable_link_state(), and only coincidentally match the actual
> register
> bits.  PCIE_LINK_STATE_CLKPM, also part of that interface, does not
> match
> the register bit.
>=20
> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
> CC: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
> CC: Jesse Brandeburg <jesse.brandeburg@intel.com>
> CC: Bruce Allan <bruce.w.allan@intel.com>
> CC: Carolyn Wyborny <carolyn.wyborny@intel.com>
> CC: Don Skidmore <donald.c.skidmore@intel.com>
> CC: Greg Rose <gregory.v.rose@intel.com>
> CC: Peter P Waskiewicz Jr <peter.p.waskiewicz.jr@intel.com>
> CC: Alex Duyck <alexander.h.duyck@intel.com>
> CC: John Ronciak <john.ronciak@intel.com>
> CC: e1000-devel@lists.sourceforge.net
> ---
>  drivers/net/ethernet/intel/e1000e/netdev.c |   11 +++++++++--
>  1 files changed, 9 insertions(+), 2 deletions(-)=20

Thanks I will add this patch to my queue for e1000e.  Since this is
patch 7 of 12, are there PCI dependent patches in the series that need
to be applied before?

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