Re: [PATCH v4 0/4] PCI: xilinx: Fixes, optimisation & MIPS support

[Paul Burton <paul.burton@imgtec.com>]

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On Thursday, 15 June 2017 14:35:05 PDT Bjorn Helgaas wrote:
> On Fri, Jun 02, 2017 at 11:54:15AM -0700, Paul Burton wrote:
> > This series fixes an issue found using INTx interrupts with the Xilinx
> > AXI PCIe Host Bridge IP on the Imagination Technologies MIPS Boston
> > development board, performs a couple of optimisations to interrupt
> > handling & allows the driver to be used on MIPS systems.
> > 
> > Applies atop v4.12-rc3.
> > 
> > Paul Burton (4):
> >   PCI: xilinx: Fix INTX irq dispatch
> >   PCI: xilinx: Unify INTx & MSI interrupt decode
> >   PCI: xilinx: Don't enable config completion interrupts
> >   PCI: xilinx: Allow build on MIPS platforms
> >  
> >  drivers/pci/host/Kconfig       |  2 +-
> >  drivers/pci/host/pcie-xilinx.c | 57
> >  +++++++++++++++--------------------------- 2 files changed, 21
> >  insertions(+), 38 deletions(-)
> 
> Hi Paul, et al.,
> 
> Waiting for resolution on patch 1 and ack from maintainers.

Thanks Bjorn, hopefully v5 will pass muster.

Paul

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