* PCI Speed Cap Fixes for ppc64 @ 2013-03-14 17:45 lucaskt 2013-03-14 17:45 ` [PATCH 1/2] drm: Move drm_pcie_get_speed_cap_mask to PCI lucaskt 2013-03-14 17:45 ` [PATCH 2/2] ppc64: Add arch-specific pcie_get_speed_cap_mask lucaskt 0 siblings, 2 replies; 5+ messages in thread From: lucaskt @ 2013-03-14 17:45 UTC (permalink / raw) To: dri-devel; +Cc: linux-pci, Alex Deucher, Bjorn Helgaas, brking, cascardo This patch series at first moves get_speed_cap_mask from DRM to PCI, fixes all radeon references (only driver that uses it) and then implements a architecture specific implementation for ppc64 for it. This is good because the drm_pcie_get_speed_cap_mask function is more architecture goo than something drm-specific, and also because this way architectures that have different means of obtaining these values can do it their way. ^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH 1/2] drm: Move drm_pcie_get_speed_cap_mask to PCI 2013-03-14 17:45 PCI Speed Cap Fixes for ppc64 lucaskt @ 2013-03-14 17:45 ` lucaskt 2013-03-14 18:55 ` Thadeu Lima de Souza Cascardo 2013-03-14 17:45 ` [PATCH 2/2] ppc64: Add arch-specific pcie_get_speed_cap_mask lucaskt 1 sibling, 1 reply; 5+ messages in thread From: lucaskt @ 2013-03-14 17:45 UTC (permalink / raw) To: dri-devel Cc: linux-pci, Alex Deucher, Bjorn Helgaas, brking, cascardo, Lucas Kannebley Tavares From: Lucas Kannebley Tavares <lucaskt@linux.vnet.ibm.com> This function was more architecture related than drm related, as such it was moved to the PCI driver. This patch also allows it to be overwritten by architecture-dependent implementations, and fixes the radeon driver (only one that uses it). Signed-off-by: Lucas Kannebley Tavares <lucaskt@linux.vnet.ibm.com> --- drivers/gpu/drm/drm_pci.c | 38 ------------------------------- drivers/gpu/drm/radeon/evergreen.c | 5 ++- drivers/gpu/drm/radeon/r600.c | 5 ++- drivers/gpu/drm/radeon/rv770.c | 5 ++- drivers/pci/pci.c | 43 ++++++++++++++++++++++++++++++++++++ include/drm/drmP.h | 6 ----- include/linux/pci.h | 6 +++++ 7 files changed, 58 insertions(+), 50 deletions(-) diff --git a/drivers/gpu/drm/drm_pci.c b/drivers/gpu/drm/drm_pci.c index bd719e9..ba70844 100644 --- a/drivers/gpu/drm/drm_pci.c +++ b/drivers/gpu/drm/drm_pci.c @@ -439,44 +439,6 @@ int drm_pci_init(struct drm_driver *driver, struct pci_driver *pdriver) return 0; } -int drm_pcie_get_speed_cap_mask(struct drm_device *dev, u32 *mask) -{ - struct pci_dev *root; - u32 lnkcap, lnkcap2; - - *mask = 0; - if (!dev->pdev) - return -EINVAL; - - root = dev->pdev->bus->self; - - /* we've been informed via and serverworks don't make the cut */ - if (root->vendor == PCI_VENDOR_ID_VIA || - root->vendor == PCI_VENDOR_ID_SERVERWORKS) - return -EINVAL; - - pcie_capability_read_dword(root, PCI_EXP_LNKCAP, &lnkcap); - pcie_capability_read_dword(root, PCI_EXP_LNKCAP2, &lnkcap2); - - if (lnkcap2) { /* PCIe r3.0-compliant */ - if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_2_5GB) - *mask |= DRM_PCIE_SPEED_25; - if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_5_0GB) - *mask |= DRM_PCIE_SPEED_50; - if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_8_0GB) - *mask |= DRM_PCIE_SPEED_80; - } else { /* pre-r3.0 */ - if (lnkcap & PCI_EXP_LNKCAP_SLS_2_5GB) - *mask |= DRM_PCIE_SPEED_25; - if (lnkcap & PCI_EXP_LNKCAP_SLS_5_0GB) - *mask |= (DRM_PCIE_SPEED_25 | DRM_PCIE_SPEED_50); - } - - DRM_INFO("probing gen 2 caps for device %x:%x = %x/%x\n", root->vendor, root->device, lnkcap, lnkcap2); - return 0; -} -EXPORT_SYMBOL(drm_pcie_get_speed_cap_mask); - #else int drm_pci_init(struct drm_driver *driver, struct pci_driver *pdriver) diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index 305a657..6ba204d 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c @@ -24,6 +24,7 @@ #include <linux/firmware.h> #include <linux/platform_device.h> #include <linux/slab.h> +#include <linux/pci.h> #include <drm/drmP.h> #include "radeon.h" #include "radeon_asic.h" @@ -3871,11 +3872,11 @@ void evergreen_pcie_gen2_enable(struct radeon_device *rdev) if (ASIC_IS_X2(rdev)) return; - ret = drm_pcie_get_speed_cap_mask(rdev->ddev, &mask); + ret = pcie_get_speed_cap_mask(rdev->ddev->pdev, &mask); if (ret != 0) return; - if (!(mask & DRM_PCIE_SPEED_50)) + if (!(mask & PCIE_SPEED_50)) return; speed_cntl = RREG32_PCIE_P(PCIE_LC_SPEED_CNTL); diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c index 0740db3..89a7387 100644 --- a/drivers/gpu/drm/radeon/r600.c +++ b/drivers/gpu/drm/radeon/r600.c @@ -30,6 +30,7 @@ #include <linux/firmware.h> #include <linux/platform_device.h> #include <linux/module.h> +#include <linux/pci.h> #include <drm/drmP.h> #include <drm/radeon_drm.h> #include "radeon.h" @@ -4371,11 +4372,11 @@ static void r600_pcie_gen2_enable(struct radeon_device *rdev) if (rdev->family <= CHIP_R600) return; - ret = drm_pcie_get_speed_cap_mask(rdev->ddev, &mask); + ret = pcie_get_speed_cap_mask(rdev->ddev->pdev, &mask); if (ret != 0) return; - if (!(mask & DRM_PCIE_SPEED_50)) + if (!(mask & PCIE_SPEED_50)) return; speed_cntl = RREG32_PCIE_P(PCIE_LC_SPEED_CNTL); diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c index d63fe1d..81c7f1c 100644 --- a/drivers/gpu/drm/radeon/rv770.c +++ b/drivers/gpu/drm/radeon/rv770.c @@ -28,6 +28,7 @@ #include <linux/firmware.h> #include <linux/platform_device.h> #include <linux/slab.h> +#include <linux/pci.h> #include <drm/drmP.h> #include "radeon.h" #include "radeon_asic.h" @@ -1254,11 +1255,11 @@ static void rv770_pcie_gen2_enable(struct radeon_device *rdev) if (ASIC_IS_X2(rdev)) return; - ret = drm_pcie_get_speed_cap_mask(rdev->ddev, &mask); + ret = pcie_get_speed_cap_mask(rdev->ddev->pdev, &mask); if (ret != 0) return; - if (!(mask & DRM_PCIE_SPEED_50)) + if (!(mask & PCIE_SPEED_50)) return; DRM_INFO("enabling PCIE gen 2 link speeds, disable with radeon.pcie_gen2=0\n"); diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index b099e00..ebf130c 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -3931,6 +3931,49 @@ static int __init pci_setup(char *str) } early_param("pci", pci_setup); +int __weak pcibios_get_speed_cap_mask(struct pci_dev *dev, u32 *mask) +{ + struct pci_dev *root; + u32 lnkcap, lnkcap2; + + *mask = 0; + if (!dev) + return -EINVAL; + + root = dev->bus->self; + + /* we've been informed via and serverworks don't make the cut */ + if (root->vendor == PCI_VENDOR_ID_VIA || + root->vendor == PCI_VENDOR_ID_SERVERWORKS) + return -EINVAL; + + pcie_capability_read_dword(root, PCI_EXP_LNKCAP, &lnkcap); + pcie_capability_read_dword(root, PCI_EXP_LNKCAP2, &lnkcap2); + + if (lnkcap2) { /* PCIe r3.0-compliant */ + if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_2_5GB) + *mask |= PCIE_SPEED_25; + if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_5_0GB) + *mask |= PCIE_SPEED_50; + if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_8_0GB) + *mask |= PCIE_SPEED_80; + } else { /* pre-r3.0 */ + if (lnkcap & PCI_EXP_LNKCAP_SLS_2_5GB) + *mask |= PCIE_SPEED_25; + if (lnkcap & PCI_EXP_LNKCAP_SLS_5_0GB) + *mask |= (PCIE_SPEED_25 | PCIE_SPEED_50); + } + + dev_info(&dev->dev, "probing gen 2 caps for device %x:%x = %x/%x\n", + root->vendor, root->device, lnkcap, lnkcap2); + return 0; +} + +int pcie_get_speed_cap_mask(struct pci_dev *dev, u32 *mask) { + return pcibios_get_speed_cap_mask(dev, mask); +} +EXPORT_SYMBOL(pcie_get_speed_cap_mask); + EXPORT_SYMBOL(pci_reenable_device); EXPORT_SYMBOL(pci_enable_device_io); EXPORT_SYMBOL(pci_enable_device_mem); diff --git a/include/drm/drmP.h b/include/drm/drmP.h index 2d94d74..39b2872 100644 --- a/include/drm/drmP.h +++ b/include/drm/drmP.h @@ -1788,12 +1788,6 @@ extern int drm_get_pci_dev(struct pci_dev *pdev, const struct pci_device_id *ent, struct drm_driver *driver); -#define DRM_PCIE_SPEED_25 1 -#define DRM_PCIE_SPEED_50 2 -#define DRM_PCIE_SPEED_80 4 - -extern int drm_pcie_get_speed_cap_mask(struct drm_device *dev, u32 *speed_mask); - /* platform section */ extern int drm_platform_init(struct drm_driver *driver, struct platform_device *platform_device); extern void drm_platform_exit(struct drm_driver *driver, struct platform_device *platform_device); diff --git a/include/linux/pci.h b/include/linux/pci.h index 2461033a..24a2f63 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -1861,4 +1861,10 @@ static inline struct eeh_dev *pci_dev_to_eeh_dev(struct pci_dev *pdev) */ struct pci_dev *pci_find_upstream_pcie_bridge(struct pci_dev *pdev); +#define PCIE_SPEED_25 1 +#define PCIE_SPEED_50 2 +#define PCIE_SPEED_80 4 + +extern int pcie_get_speed_cap_mask(struct pci_dev *dev, u32 *speed_mask); + #endif /* LINUX_PCI_H */ -- 1.7.4.4 ^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH 1/2] drm: Move drm_pcie_get_speed_cap_mask to PCI 2013-03-14 17:45 ` [PATCH 1/2] drm: Move drm_pcie_get_speed_cap_mask to PCI lucaskt @ 2013-03-14 18:55 ` Thadeu Lima de Souza Cascardo 0 siblings, 0 replies; 5+ messages in thread From: Thadeu Lima de Souza Cascardo @ 2013-03-14 18:55 UTC (permalink / raw) To: lucaskt; +Cc: dri-devel, linux-pci, Alex Deucher, Bjorn Helgaas, brking On Thu, Mar 14, 2013 at 02:45:46PM -0300, lucaskt@linux.vnet.ibm.com wrote: > From: Lucas Kannebley Tavares <lucaskt@linux.vnet.ibm.com> > > This function was more architecture related than drm related, as such it was > moved to the PCI driver. > > This patch also allows it to be overwritten by architecture-dependent > implementations, and fixes the radeon driver (only one that uses it). > > Signed-off-by: Lucas Kannebley Tavares <lucaskt@linux.vnet.ibm.com> > --- > drivers/gpu/drm/drm_pci.c | 38 ------------------------------- > drivers/gpu/drm/radeon/evergreen.c | 5 ++- > drivers/gpu/drm/radeon/r600.c | 5 ++- > drivers/gpu/drm/radeon/rv770.c | 5 ++- > drivers/pci/pci.c | 43 ++++++++++++++++++++++++++++++++++++ > include/drm/drmP.h | 6 ----- > include/linux/pci.h | 6 +++++ > 7 files changed, 58 insertions(+), 50 deletions(-) > > diff --git a/drivers/gpu/drm/drm_pci.c b/drivers/gpu/drm/drm_pci.c > index bd719e9..ba70844 100644 > --- a/drivers/gpu/drm/drm_pci.c > +++ b/drivers/gpu/drm/drm_pci.c > @@ -439,44 +439,6 @@ int drm_pci_init(struct drm_driver *driver, struct pci_driver *pdriver) > return 0; > } > > -int drm_pcie_get_speed_cap_mask(struct drm_device *dev, u32 *mask) > -{ > - struct pci_dev *root; > - u32 lnkcap, lnkcap2; > - > - *mask = 0; > - if (!dev->pdev) > - return -EINVAL; > - > - root = dev->pdev->bus->self; > - > - /* we've been informed via and serverworks don't make the cut */ > - if (root->vendor == PCI_VENDOR_ID_VIA || > - root->vendor == PCI_VENDOR_ID_SERVERWORKS) > - return -EINVAL; > - > - pcie_capability_read_dword(root, PCI_EXP_LNKCAP, &lnkcap); > - pcie_capability_read_dword(root, PCI_EXP_LNKCAP2, &lnkcap2); > - > - if (lnkcap2) { /* PCIe r3.0-compliant */ > - if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_2_5GB) > - *mask |= DRM_PCIE_SPEED_25; > - if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_5_0GB) > - *mask |= DRM_PCIE_SPEED_50; > - if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_8_0GB) > - *mask |= DRM_PCIE_SPEED_80; > - } else { /* pre-r3.0 */ > - if (lnkcap & PCI_EXP_LNKCAP_SLS_2_5GB) > - *mask |= DRM_PCIE_SPEED_25; > - if (lnkcap & PCI_EXP_LNKCAP_SLS_5_0GB) > - *mask |= (DRM_PCIE_SPEED_25 | DRM_PCIE_SPEED_50); > - } > - > - DRM_INFO("probing gen 2 caps for device %x:%x = %x/%x\n", root->vendor, root->device, lnkcap, lnkcap2); > - return 0; > -} > -EXPORT_SYMBOL(drm_pcie_get_speed_cap_mask); > - > #else > > int drm_pci_init(struct drm_driver *driver, struct pci_driver *pdriver) > diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c > index 305a657..6ba204d 100644 > --- a/drivers/gpu/drm/radeon/evergreen.c > +++ b/drivers/gpu/drm/radeon/evergreen.c > @@ -24,6 +24,7 @@ > #include <linux/firmware.h> > #include <linux/platform_device.h> > #include <linux/slab.h> > +#include <linux/pci.h> > #include <drm/drmP.h> > #include "radeon.h" > #include "radeon_asic.h" > @@ -3871,11 +3872,11 @@ void evergreen_pcie_gen2_enable(struct radeon_device *rdev) > if (ASIC_IS_X2(rdev)) > return; > > - ret = drm_pcie_get_speed_cap_mask(rdev->ddev, &mask); > + ret = pcie_get_speed_cap_mask(rdev->ddev->pdev, &mask); > if (ret != 0) > return; > > - if (!(mask & DRM_PCIE_SPEED_50)) > + if (!(mask & PCIE_SPEED_50)) > return; > > speed_cntl = RREG32_PCIE_P(PCIE_LC_SPEED_CNTL); > diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c > index 0740db3..89a7387 100644 > --- a/drivers/gpu/drm/radeon/r600.c > +++ b/drivers/gpu/drm/radeon/r600.c > @@ -30,6 +30,7 @@ > #include <linux/firmware.h> > #include <linux/platform_device.h> > #include <linux/module.h> > +#include <linux/pci.h> > #include <drm/drmP.h> > #include <drm/radeon_drm.h> > #include "radeon.h" > @@ -4371,11 +4372,11 @@ static void r600_pcie_gen2_enable(struct radeon_device *rdev) > if (rdev->family <= CHIP_R600) > return; > > - ret = drm_pcie_get_speed_cap_mask(rdev->ddev, &mask); > + ret = pcie_get_speed_cap_mask(rdev->ddev->pdev, &mask); > if (ret != 0) > return; > > - if (!(mask & DRM_PCIE_SPEED_50)) > + if (!(mask & PCIE_SPEED_50)) > return; > > speed_cntl = RREG32_PCIE_P(PCIE_LC_SPEED_CNTL); > diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c > index d63fe1d..81c7f1c 100644 > --- a/drivers/gpu/drm/radeon/rv770.c > +++ b/drivers/gpu/drm/radeon/rv770.c > @@ -28,6 +28,7 @@ > #include <linux/firmware.h> > #include <linux/platform_device.h> > #include <linux/slab.h> > +#include <linux/pci.h> > #include <drm/drmP.h> > #include "radeon.h" > #include "radeon_asic.h" > @@ -1254,11 +1255,11 @@ static void rv770_pcie_gen2_enable(struct radeon_device *rdev) > if (ASIC_IS_X2(rdev)) > return; > > - ret = drm_pcie_get_speed_cap_mask(rdev->ddev, &mask); > + ret = pcie_get_speed_cap_mask(rdev->ddev->pdev, &mask); > if (ret != 0) > return; > > - if (!(mask & DRM_PCIE_SPEED_50)) > + if (!(mask & PCIE_SPEED_50)) > return; > > DRM_INFO("enabling PCIE gen 2 link speeds, disable with radeon.pcie_gen2=0\n"); > diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c > index b099e00..ebf130c 100644 > --- a/drivers/pci/pci.c > +++ b/drivers/pci/pci.c > @@ -3931,6 +3931,49 @@ static int __init pci_setup(char *str) > } > early_param("pci", pci_setup); > > +int __weak pcibios_get_speed_cap_mask(struct pci_dev *dev, u32 *mask) > +{ > + struct pci_dev *root; > + u32 lnkcap, lnkcap2; > + > + *mask = 0; > + if (!dev) > + return -EINVAL; > + > + root = dev->bus->self; > + > + /* we've been informed via and serverworks don't make the cut */ > + if (root->vendor == PCI_VENDOR_ID_VIA || > + root->vendor == PCI_VENDOR_ID_SERVERWORKS) > + return -EINVAL; Does it make sense to exclude vendors here, or was this DRM specific? > + > + pcie_capability_read_dword(root, PCI_EXP_LNKCAP, &lnkcap); > + pcie_capability_read_dword(root, PCI_EXP_LNKCAP2, &lnkcap2); > + > + if (lnkcap2) { /* PCIe r3.0-compliant */ > + if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_2_5GB) > + *mask |= PCIE_SPEED_25; > + if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_5_0GB) > + *mask |= PCIE_SPEED_50; > + if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_8_0GB) > + *mask |= PCIE_SPEED_80; > + } else { /* pre-r3.0 */ > + if (lnkcap & PCI_EXP_LNKCAP_SLS_2_5GB) > + *mask |= PCIE_SPEED_25; > + if (lnkcap & PCI_EXP_LNKCAP_SLS_5_0GB) > + *mask |= (PCIE_SPEED_25 | PCIE_SPEED_50); > + } > + > + dev_info(&dev->dev, "probing gen 2 caps for device %x:%x = %x/%x\n", > + root->vendor, root->device, lnkcap, lnkcap2); > + return 0; > +} > + > +int pcie_get_speed_cap_mask(struct pci_dev *dev, u32 *mask) { Put the curly brackets in a separate line for a function. To avoid these coding styles issues, run scripts/checkpatch.pl. Regards. Cascardo. > + return pcibios_get_speed_cap_mask(dev, mask); > +} > +EXPORT_SYMBOL(pcie_get_speed_cap_mask); > + > EXPORT_SYMBOL(pci_reenable_device); > EXPORT_SYMBOL(pci_enable_device_io); > EXPORT_SYMBOL(pci_enable_device_mem); > diff --git a/include/drm/drmP.h b/include/drm/drmP.h > index 2d94d74..39b2872 100644 > --- a/include/drm/drmP.h > +++ b/include/drm/drmP.h > @@ -1788,12 +1788,6 @@ extern int drm_get_pci_dev(struct pci_dev *pdev, > const struct pci_device_id *ent, > struct drm_driver *driver); > > -#define DRM_PCIE_SPEED_25 1 > -#define DRM_PCIE_SPEED_50 2 > -#define DRM_PCIE_SPEED_80 4 > - > -extern int drm_pcie_get_speed_cap_mask(struct drm_device *dev, u32 *speed_mask); > - > /* platform section */ > extern int drm_platform_init(struct drm_driver *driver, struct platform_device *platform_device); > extern void drm_platform_exit(struct drm_driver *driver, struct platform_device *platform_device); > diff --git a/include/linux/pci.h b/include/linux/pci.h > index 2461033a..24a2f63 100644 > --- a/include/linux/pci.h > +++ b/include/linux/pci.h > @@ -1861,4 +1861,10 @@ static inline struct eeh_dev *pci_dev_to_eeh_dev(struct pci_dev *pdev) > */ > struct pci_dev *pci_find_upstream_pcie_bridge(struct pci_dev *pdev); > > +#define PCIE_SPEED_25 1 > +#define PCIE_SPEED_50 2 > +#define PCIE_SPEED_80 4 > + > +extern int pcie_get_speed_cap_mask(struct pci_dev *dev, u32 *speed_mask); > + > #endif /* LINUX_PCI_H */ > -- > 1.7.4.4 > ^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH 2/2] ppc64: Add arch-specific pcie_get_speed_cap_mask 2013-03-14 17:45 PCI Speed Cap Fixes for ppc64 lucaskt 2013-03-14 17:45 ` [PATCH 1/2] drm: Move drm_pcie_get_speed_cap_mask to PCI lucaskt @ 2013-03-14 17:45 ` lucaskt 2013-03-14 18:52 ` Thadeu Lima de Souza Cascardo 1 sibling, 1 reply; 5+ messages in thread From: lucaskt @ 2013-03-14 17:45 UTC (permalink / raw) To: dri-devel Cc: linux-pci, Alex Deucher, Bjorn Helgaas, brking, cascardo, Lucas Kannebley Tavares From: Lucas Kannebley Tavares <lucaskt@linux.vnet.ibm.com> Betters support for gen2 speed detections on PCI buses on ppc64 architectures. Signed-off-by: Lucas Kannebley Tavares <lucaskt@linux.vnet.ibm.com> --- arch/powerpc/platforms/pseries/pci.c | 32 ++++++++++++++++++++++++++++++++ 1 files changed, 32 insertions(+), 0 deletions(-) diff --git a/arch/powerpc/platforms/pseries/pci.c b/arch/powerpc/platforms/pseries/pci.c index 0b580f4..58469fe 100644 --- a/arch/powerpc/platforms/pseries/pci.c +++ b/arch/powerpc/platforms/pseries/pci.c @@ -24,6 +24,7 @@ #include <linux/kernel.h> #include <linux/pci.h> #include <linux/string.h> +#include <linux/device.h> #include <asm/eeh.h> #include <asm/pci-bridge.h> @@ -108,3 +109,34 @@ static void fixup_winbond_82c105(struct pci_dev* dev) } DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_WINBOND, PCI_DEVICE_ID_WINBOND_82C105, fixup_winbond_82c105); + +int pcibios_get_speed_cap_mask(struct pci_dev *dev, u32 *mask) +{ + struct device_node *dn, *pdn; + const uint32_t *pcie_link_speed_stats = NULL; + + *mask = 0; + dn = pci_bus_to_OF_node(dev->bus); + + /* Find nearest ibm,pcie-link-speed-stats, walking up the device tree */ + for (pdn = dn; pdn != NULL; pdn = pdn->parent) { + pcie_link_speed_stats = (const uint32_t *) of_get_property(pdn, + "ibm,pcie-link-speed-stats", NULL); + if (pcie_link_speed_stats != NULL) + break; + } + + if (pcie_link_speed_stats == NULL) { + dev_info(&dev->dev, "no ibm,pcie-link-speed-stats property\n"); + return -EINVAL; + } + + switch (pcie_link_speed_stats[0]) { + case 0x02: + *mask |= PCIE_SPEED_50; + case 0x01: + *mask |= PCIE_SPEED_25; + } + + return 0; +} -- 1.7.4.4 ^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH 2/2] ppc64: Add arch-specific pcie_get_speed_cap_mask 2013-03-14 17:45 ` [PATCH 2/2] ppc64: Add arch-specific pcie_get_speed_cap_mask lucaskt @ 2013-03-14 18:52 ` Thadeu Lima de Souza Cascardo 0 siblings, 0 replies; 5+ messages in thread From: Thadeu Lima de Souza Cascardo @ 2013-03-14 18:52 UTC (permalink / raw) To: lucaskt Cc: dri-devel, linux-pci, Alex Deucher, Bjorn Helgaas, brking, linuxppc-dev, benh On Thu, Mar 14, 2013 at 02:45:47PM -0300, lucaskt@linux.vnet.ibm.com wrote: > From: Lucas Kannebley Tavares <lucaskt@linux.vnet.ibm.com> > > Betters support for gen2 speed detections on PCI buses on ppc64 > architectures. > > Signed-off-by: Lucas Kannebley Tavares <lucaskt@linux.vnet.ibm.com> > --- > arch/powerpc/platforms/pseries/pci.c | 32 ++++++++++++++++++++++++++++++++ > 1 files changed, 32 insertions(+), 0 deletions(-) > > diff --git a/arch/powerpc/platforms/pseries/pci.c b/arch/powerpc/platforms/pseries/pci.c > index 0b580f4..58469fe 100644 > --- a/arch/powerpc/platforms/pseries/pci.c > +++ b/arch/powerpc/platforms/pseries/pci.c > @@ -24,6 +24,7 @@ > #include <linux/kernel.h> > #include <linux/pci.h> > #include <linux/string.h> > +#include <linux/device.h> > > #include <asm/eeh.h> > #include <asm/pci-bridge.h> > @@ -108,3 +109,34 @@ static void fixup_winbond_82c105(struct pci_dev* dev) > } > DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_WINBOND, PCI_DEVICE_ID_WINBOND_82C105, > fixup_winbond_82c105); > + > +int pcibios_get_speed_cap_mask(struct pci_dev *dev, u32 *mask) > +{ > + struct device_node *dn, *pdn; > + const uint32_t *pcie_link_speed_stats = NULL; > + > + *mask = 0; > + dn = pci_bus_to_OF_node(dev->bus); > + > + /* Find nearest ibm,pcie-link-speed-stats, walking up the device tree */ > + for (pdn = dn; pdn != NULL; pdn = pdn->parent) { > + pcie_link_speed_stats = (const uint32_t *) of_get_property(pdn, > + "ibm,pcie-link-speed-stats", NULL); > + if (pcie_link_speed_stats != NULL) > + break; > + } > + > + if (pcie_link_speed_stats == NULL) { > + dev_info(&dev->dev, "no ibm,pcie-link-speed-stats property\n"); > + return -EINVAL; > + } > + > + switch (pcie_link_speed_stats[0]) { > + case 0x02: > + *mask |= PCIE_SPEED_50; > + case 0x01: > + *mask |= PCIE_SPEED_25; > + } I recall seeing this returns 0x00 as well. Maybe you should include both 0x00 and a default case and return EINVAL. Regards. Cascardo. > + > + return 0; > +} > -- > 1.7.4.4 > ^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2013-03-14 18:55 UTC | newest] Thread overview: 5+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2013-03-14 17:45 PCI Speed Cap Fixes for ppc64 lucaskt 2013-03-14 17:45 ` [PATCH 1/2] drm: Move drm_pcie_get_speed_cap_mask to PCI lucaskt 2013-03-14 18:55 ` Thadeu Lima de Souza Cascardo 2013-03-14 17:45 ` [PATCH 2/2] ppc64: Add arch-specific pcie_get_speed_cap_mask lucaskt 2013-03-14 18:52 ` Thadeu Lima de Souza Cascardo
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