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From: Gavin Shan <shangw@linux.vnet.ibm.com>
To: linux-pci@vger.kernel.org
Cc: bhelgaas@google.com, Gavin Shan <shangw@linux.vnet.ibm.com>
Subject: [PATCH 3/5] PCI: Use cached MSI cap while enabling MSI interrupts
Date: Thu,  4 Apr 2013 19:39:30 +0800	[thread overview]
Message-ID: <1365075572-20763-4-git-send-email-shangw@linux.vnet.ibm.com> (raw)
In-Reply-To: <1365075572-20763-1-git-send-email-shangw@linux.vnet.ibm.com>

The patch intends to use the cached MSI capability offset in
pci_dev instead of polling that from config space when enabling
MSI interrupts.

Signed-off-by: Gavin Shan <shangw@linux.vnet.ibm.com>
---
 drivers/pci/msi.c |   19 +++++++++----------
 1 files changed, 9 insertions(+), 10 deletions(-)

diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c
index 5f51e10..182474d 100644
--- a/drivers/pci/msi.c
+++ b/drivers/pci/msi.c
@@ -552,14 +552,14 @@ out_unroll:
 static int msi_capability_init(struct pci_dev *dev, int nvec)
 {
 	struct msi_desc *entry;
-	int pos, ret;
+	int ret;
 	u16 control;
 	unsigned mask;
 
-	pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
-	msi_set_enable(dev, 0);	/* Disable MSI during set up */
+	/* Disable MSI during set up */
+	msi_set_enable(dev, 0);
 
-	pci_read_config_word(dev, msi_control_reg(pos), &control);
+	pci_read_config_word(dev, msi_control_reg(dev->msi_cap), &control);
 	/* MSI Entry Initialization */
 	entry = alloc_msi_entry(dev);
 	if (!entry)
@@ -570,9 +570,9 @@ static int msi_capability_init(struct pci_dev *dev, int nvec)
 	entry->msi_attrib.entry_nr	= 0;
 	entry->msi_attrib.maskbit	= is_mask_bit_support(control);
 	entry->msi_attrib.default_irq	= dev->irq;	/* Save IOAPIC IRQ */
-	entry->msi_attrib.pos		= pos;
+	entry->msi_attrib.pos		= dev->msi_cap;
 
-	entry->mask_pos = msi_mask_reg(pos, entry->msi_attrib.is_64);
+	entry->mask_pos = msi_mask_reg(dev->msi_cap, entry->msi_attrib.is_64);
 	/* All MSIs are unmasked by default, Mask them all */
 	if (entry->msi_attrib.maskbit)
 		pci_read_config_dword(dev, entry->mask_pos, &entry->masked);
@@ -818,13 +818,12 @@ static int pci_msi_check_device(struct pci_dev *dev, int nvec, int type)
  */
 int pci_enable_msi_block(struct pci_dev *dev, unsigned int nvec)
 {
-	int status, pos, maxvec;
+	int status, maxvec;
 	u16 msgctl;
 
-	pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
-	if (!pos)
+	if (!dev->msi_cap)
 		return -EINVAL;
-	pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &msgctl);
+	pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &msgctl);
 	maxvec = 1 << ((msgctl & PCI_MSI_FLAGS_QMASK) >> 1);
 	if (nvec > maxvec)
 		return maxvec;
-- 
1.7.5.4


  parent reply	other threads:[~2013-04-04 11:39 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-04-04 11:39 [PATCH v2 0/5] Retrieve MSI/MSIX cap struct for once on setup Gavin Shan
2013-04-04 11:39 ` [PATCH 1/5] PCI: Cache MSI/MSI-X cap in PCI device Gavin Shan
2013-04-04 16:02   ` Bjorn Helgaas
2013-04-04 11:39 ` [PATCH 2/5] PCI: Use MSI/MSI-X cap cache in pci_msi_check_device() Gavin Shan
2013-04-04 16:33   ` Bjorn Helgaas
2013-04-04 11:39 ` Gavin Shan [this message]
2013-04-04 17:16   ` [PATCH 3/5] PCI: Use cached MSI cap while enabling MSI interrupts Bjorn Helgaas
2013-04-04 11:39 ` [PATCH 4/5] PCI: Use cached MSI cap in pci_enable_msi_block_auto() Gavin Shan
2013-04-04 17:19   ` Bjorn Helgaas
2013-04-04 11:39 ` [PATCH 5/5] PCI: Use cached MSI-X cap while enabling MSI-X interrupts Gavin Shan

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