From: Yijing Wang <wangyijing@huawei.com>
To: Bjorn Helgaas <bhelgaas@google.com>
Cc: Yinghai Lu <yinghai@kernel.org>, <linux-pci@vger.kernel.org>,
Tony Luck <tony.luck@intel.com>, <linux-ia64@vger.kernel.org>,
Fenghua Yu <fenghua.yu@intel.com>,
Hanjun Guo <guohanjun@huawei.com>, <jiang.liu@huawei.com>,
Yijing Wang <wangyijing@huawei.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Subject: [PATCH -v5 7/8] PCI/IA64: introduce probe_pci_root_info() to manage _CRS resource
Date: Thu, 6 Jun 2013 15:34:52 +0800 [thread overview]
Message-ID: <1370504093-14908-8-git-send-email-wangyijing@huawei.com> (raw)
In-Reply-To: <1370504093-14908-1-git-send-email-wangyijing@huawei.com>
Currently, initialize _CRS resource code in IA64 make pci_acpi_scan_root()
some lengthiness. Introduce probe_pci_root_info() to manage it like in X86,
Signed-off-by: Yijing Wang <wangyijing@huawei.com>
Cc: Tony Luck <tony.luck@intel.com>
Cc: Fenghua Yu <fenghua.yu@intel.com>
Cc: Yinghai Lu <yinghai@kernel.org>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: linux-ia64@vger.kernel.org
---
arch/ia64/pci/pci.c | 100 +++++++++++++++++++++++++++++----------------------
1 files changed, 57 insertions(+), 43 deletions(-)
diff --git a/arch/ia64/pci/pci.c b/arch/ia64/pci/pci.c
index 72a1957..586cac1 100644
--- a/arch/ia64/pci/pci.c
+++ b/arch/ia64/pci/pci.c
@@ -376,6 +376,50 @@ static void release_pci_root_info(struct pci_host_bridge *bridge)
__release_pci_root_info(info);
}
+static int
+probe_pci_root_info(struct pci_root_info *info, struct acpi_device *device,
+ int busnum, int domain)
+{
+ char *name;
+
+ name = kmalloc(16, GFP_KERNEL);
+ if (!name)
+ return -ENOMEM;
+
+ sprintf(name, "PCI Bus %04x:%02x", domain, busnum);
+ info->bridge = device;
+ info->name = name;
+
+ acpi_walk_resources(device->handle, METHOD_NAME__CRS, count_window,
+ &info->res_num);
+ if (info->res_num) {
+ info->res =
+ kzalloc_node(sizeof(*info->res) * info->res_num,
+ GFP_KERNEL, info->controller->node);
+ if (!info->res) {
+ kfree(name);
+ return -ENOMEM;
+ }
+
+ info->res_offset =
+ kzalloc_node(sizeof(*info->res_offset) * info->res_num,
+ GFP_KERNEL, info->controller->node);
+ if (!info->res_offset) {
+ kfree(name);
+ kfree(info->res);
+ info->res = NULL;
+ return -ENOMEM;
+ }
+
+ info->res_num = 0;
+ acpi_walk_resources(device->handle, METHOD_NAME__CRS,
+ add_window, info);
+ } else
+ kfree(name);
+
+ return 0;
+}
+
struct pci_bus *pci_acpi_scan_root(struct acpi_pci_root *root)
{
struct acpi_device *device = root->device;
@@ -385,12 +429,11 @@ struct pci_bus *pci_acpi_scan_root(struct acpi_pci_root *root)
struct pci_root_info *info = NULL;
int busnum = root->secondary.start;
struct pci_bus *pbus;
- char *name;
- int pxm;
+ int pxm, ret;
controller = alloc_pci_controller(domain);
if (!controller)
- goto out1;
+ return NULL;
controller->acpi_handle = device->handle;
@@ -404,41 +447,23 @@ struct pci_bus *pci_acpi_scan_root(struct acpi_pci_root *root)
if (!info) {
printk(KERN_WARNING
"pci_bus %04x:%02x: ignored (out of memory)\n",
- root->segment, busnum);
- goto out2;
+ domain, busnum);
+ kfree(controller);
+ return NULL;
}
+ info->controller = controller;
INIT_LIST_HEAD(&info->io_resources);
INIT_LIST_HEAD(&info->resources);
- /* insert busn resource at first */
- pci_add_resource(&info->resources, &root->secondary);
- acpi_walk_resources(device->handle, METHOD_NAME__CRS, count_window,
- &info->res_num);
- if (info->res_num) {
- info->res =
- kzalloc_node(sizeof(*info->res) * info->res_num,
- GFP_KERNEL, controller->node);
- if (!info->res)
- goto out3;
- info->res_offset =
- kzalloc_node(sizeof(*info->res_offset) * info->res_num,
- GFP_KERNEL, controller->node);
- if (!info->res_offset)
- goto out4;
-
- name = kmalloc(16, GFP_KERNEL);
- if (!name)
- goto out5;
-
- sprintf(name, "PCI Bus %04x:%02x", domain, bus);
- info->bridge = device;
- info->controller = controller;
- info->name = name;
- info->res_num = 0;
- acpi_walk_resources(device->handle, METHOD_NAME__CRS,
- add_window, info);
+ ret = probe_pci_root_info(info, device, busnum, domain);
+ if (ret) {
+ kfree(info->controller);
+ kfree(info);
+ return NULL;
}
+ /* insert busn resource at first */
+ pci_add_resource(&info->resources, &root->secondary);
/*
* See arch/x86/pci/acpi.c.
* The desired pci bus might already be scanned in a quirk. We
@@ -457,17 +482,6 @@ struct pci_bus *pci_acpi_scan_root(struct acpi_pci_root *root)
release_pci_root_info, info);
pci_scan_child_bus(pbus);
return pbus;
-
-out5:
- kfree(info->res_offset);
-out4:
- kfree(info->res);
-out3:
- kfree(info);
-out2:
- kfree(controller);
-out1:
- return NULL;
}
int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge)
--
1.7.1
next prev parent reply other threads:[~2013-06-06 7:35 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-06-06 7:34 [PATCH -v5 0/8] Add hostbridge resource release to support root bus hotplug in IA64 Yijing Wang
2013-06-06 7:34 ` [PATCH -v5 1/8] PCI/IA64: SN: remove sn_pci_window_fixup() Yijing Wang
2013-06-14 8:42 ` Yijing Wang
2013-06-15 0:48 ` Bjorn Helgaas
2013-06-17 3:01 ` Yijing Wang
2013-06-06 7:34 ` [PATCH -v5 2/8] PCI/IA64: SN: use normal resource instead of pci_window Yijing Wang
2013-06-06 7:34 ` [PATCH -v5 3/8] PCI/IA64: embed pci hostbridge resources into pci_root_info Yijing Wang
2013-06-06 7:34 ` [PATCH -v5 4/8] PCI/IA64: Allocate pci_root_info instead of using stack Yijing Wang
2013-06-06 7:34 ` [PATCH -v5 5/8] PCI/IA64: fix memleak for create pci root bus fail Yijing Wang
2013-06-06 7:34 ` [PATCH -v5 6/8] PCI/IA64: add host bridge resource release for _CRS path Yijing Wang
2013-06-06 7:34 ` Yijing Wang [this message]
2013-06-06 7:34 ` [PATCH -v5 8/8] PCI: Replace printks with appropriate pr_*() Yijing Wang
2013-06-15 0:22 ` [PATCH -v5 0/8] Add hostbridge resource release to support root bus hotplug in IA64 Bjorn Helgaas
2013-06-17 2:56 ` Yijing Wang
2013-06-17 22:57 ` Tony Luck
2013-06-17 23:10 ` Bjorn Helgaas
2013-06-18 1:03 ` Yijing Wang
2013-06-18 1:01 ` Yijing Wang
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