linux-pci.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Mika Westerberg <mika.westerberg@linux.intel.com>
To: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Bjorn Helgaas <bhelgaas@google.com>,
	"Rafael J. Wysocki" <rafael.j.wysocki@intel.com>
Cc: Jesse Barnes <jbarnes@virtuousgeek.org>,
	Yinghai Lu <yinghai@kernel.org>,
	john.ronciak@intel.com, miles.j.penner@intel.com,
	bruce.w.allan@intel.com,
	"Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>,
	Heikki Krogerus <heikki.krogerus@linux.intel.com>,
	Mika Westerberg <mika.westerberg@linux.intel.com>,
	linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
	x86@kernel.org
Subject: [PATCH 6/6] x86/PCI: quirk Thunderbolt PCI-to-PCI bridges
Date: Tue, 25 Jun 2013 19:22:10 +0300	[thread overview]
Message-ID: <1372177330-28013-7-git-send-email-mika.westerberg@linux.intel.com> (raw)
In-Reply-To: <1372177330-28013-1-git-send-email-mika.westerberg@linux.intel.com>

Thunderbolt PCI-to-PCI bridges typically use BIOS "assisted" enumeration.
This means that the BIOS will allocate bridge resources based on some
assumptions of a maximum Thunderbolt chain. It also disables native PCIe
hotplug of the root port where the Thunderbolt host router is connected.

In order to support this we must make sure that the kernel does not try to
be too smart and resize / open the bridge windows during PCI enumeration.
For example by default the kernel will add certain amount of space to the
bridge memory/io windows (this is configurable via pci=hp[mem|io]size=xxx
command line option). Eventually we run out of space that the BIOS has
allocated.

Also address space for expansion ROMs should not be allocated (BIOS does
not execute them for Thunderbolt endpoints). If we don't prevent this the
kernel might find expansion ROM associated with some endpoint and reopen
the bridge window which the BIOS already closed leading again resource
exhaustion.

Fix this by adding a quirk that matches known Thunderbolt PCI-to-PCI
bridges and in that case prevents allocation of expansion ROM resources and
makes sure that the PCI core does not increase size of bridge windows.

Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
---
 arch/x86/pci/fixup.c | 51 +++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 51 insertions(+)

diff --git a/arch/x86/pci/fixup.c b/arch/x86/pci/fixup.c
index f5809fa..924822b 100644
--- a/arch/x86/pci/fixup.c
+++ b/arch/x86/pci/fixup.c
@@ -7,6 +7,8 @@
 #include <linux/pci.h>
 #include <linux/init.h>
 #include <linux/vgaarb.h>
+#include <linux/acpi.h>
+#include <linux/pci-acpi.h>
 #include <asm/pci_x86.h>
 
 static void pci_fixup_i450nx(struct pci_dev *d)
@@ -539,3 +541,52 @@ static void twinhead_reserve_killing_zone(struct pci_dev *dev)
         }
 }
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x27B9, twinhead_reserve_killing_zone);
+
+#ifdef CONFIG_ACPI
+/*
+ * BIOS assisted Thunderbolt PCI enumeration should handle all resource
+ * allocation on behalf of OS.
+ */
+static void quirk_thunderbolt(struct pci_dev *dev)
+{
+	struct acpi_pci_root *root;
+	acpi_handle handle;
+
+	handle = acpi_find_root_bridge_handle(dev);
+	if (!handle)
+		return;
+
+	root = acpi_pci_find_root(handle);
+	if (!root)
+		return;
+
+	/*
+	 * Native PCIe hotplug should be disabled when BIOS assisted
+	 * hotplug is in use.
+	 */
+	if (root->osc_control_set & OSC_PCI_EXPRESS_NATIVE_HP_CONTROL)
+		return;
+
+	/*
+	 * Make sure that we don't allocate resources for expansion ROMs.
+	 * This may accidentally increase the size of the bridge window
+	 * causing us to run out of resources.
+	 */
+	if (!(pci_probe & PCI_NOASSIGN_ROMS)) {
+		pr_info("Thunderbolt host router detected disabling ROMs\n");
+		pci_probe |= PCI_NOASSIGN_ROMS;
+	}
+
+	/*
+	 * Don't add anything to the BIOS allocated bridge window size for
+	 * the same reason.
+	 */
+	dev->is_hotplug_bridge = 0;
+}
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x1513, quirk_thunderbolt);
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x151a, quirk_thunderbolt);
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x151b, quirk_thunderbolt);
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x1547, quirk_thunderbolt);
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x1548, quirk_thunderbolt);
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x1549, quirk_thunderbolt);
+#endif
-- 
1.8.3.1


  parent reply	other threads:[~2013-06-25 16:22 UTC|newest]

Thread overview: 71+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-06-25 16:22 [PATCH 0/6] Thunderbolt workarounds take 2 Mika Westerberg
2013-06-25 16:22 ` [PATCH 1/6] PCI: acpiphp: do not check for SLOT_ENABLED in enable_device() Mika Westerberg
2013-06-26 23:28   ` Bjorn Helgaas
2013-06-27 13:25     ` Kirill A. Shutemov
2013-06-28  9:51     ` Kirill A. Shutemov
2013-06-28 17:00       ` Bjorn Helgaas
2013-06-28 18:54         ` Rafael J. Wysocki
2013-07-01  9:32           ` Mika Westerberg
2013-07-01 14:01             ` Rafael J. Wysocki
2013-07-01 18:36               ` Mika Westerberg
2013-07-02  1:29                 ` Rafael J. Wysocki
2013-07-02 16:40                   ` Bjorn Helgaas
2013-07-02 20:29                     ` Rafael J. Wysocki
2013-07-02 20:31                       ` Mika Westerberg
2013-07-02 20:49                         ` Rafael J. Wysocki
2013-06-25 16:22 ` [PATCH 2/6] PCI: acpiphp: enable_device(): rescan even if no new devices on slot Mika Westerberg
2013-06-26 23:37   ` Bjorn Helgaas
2013-06-27 13:02     ` Mika Westerberg
2013-06-27 16:32       ` Mika Westerberg
2013-06-27 16:50         ` Bjorn Helgaas
2013-06-27 16:54         ` Bjorn Helgaas
2013-06-27  1:20   ` Yinghai Lu
2013-06-27 13:04     ` Mika Westerberg
2013-06-25 16:22 ` [PATCH 3/6] PCI: introduce pci_trim_stale_devices() Mika Westerberg
2013-06-25 17:47   ` Andy Shevchenko
2013-06-25 17:56     ` Kirill A. Shutemov
2013-06-28 19:59   ` Rafael J. Wysocki
2013-06-25 16:22 ` [PATCH 4/6] PCI: acpiphp: check for new devices on enabled host Mika Westerberg
2013-06-25 18:04   ` Andy Shevchenko
2013-06-26  9:39     ` Kirill A. Shutemov
2013-06-27 19:05   ` Yinghai Lu
2013-06-28  9:33     ` Kirill A. Shutemov
2013-06-28 16:22       ` Yinghai Lu
2013-06-28 20:04         ` Rafael J. Wysocki
2013-06-25 16:22 ` [PATCH 5/6] PCI: acpiphp: look _RMV method a bit deeper in the hierarhcy Mika Westerberg
2013-06-25 18:15   ` Andy Shevchenko
2013-06-25 18:31     ` Mika Westerberg
2013-06-25 18:31       ` Andy Shevchenko
2013-06-25 18:51         ` Mika Westerberg
2013-06-25 19:30           ` Andy Shevchenko
2013-07-02 10:44   ` Kirill A. Shutemov
2013-07-02 17:09     ` Bjorn Helgaas
2013-07-02 17:45       ` Kirill A. Shutemov
2013-07-02 20:48         ` Rafael J. Wysocki
2013-07-02 20:40       ` Rafael J. Wysocki
2013-06-25 16:22 ` Mika Westerberg [this message]
2013-06-25 21:15   ` [PATCH 6/6] x86/PCI: quirk Thunderbolt PCI-to-PCI bridges Jesse Barnes
2013-06-26 12:17     ` Mika Westerberg
2013-06-26 15:04       ` Greg Kroah-Hartman
2013-06-26 20:59       ` Bjorn Helgaas
2013-06-26 22:15         ` Alex Williamson
2013-06-27 13:09           ` Mika Westerberg
2013-06-26 22:18   ` Bjorn Helgaas
2013-06-26 22:26     ` Yinghai Lu
2013-06-26 22:31       ` Yinghai Lu
2013-06-26 22:44         ` Rafael J. Wysocki
2013-06-26 22:38           ` Yinghai Lu
2013-06-26 22:55         ` Bjorn Helgaas
2013-06-26 23:56           ` Yinghai Lu
2013-06-27 16:00             ` Bjorn Helgaas
2013-06-27 17:27               ` Yinghai Lu
2013-06-27 13:58       ` Mika Westerberg
2013-06-27 13:54     ` Mika Westerberg
2013-06-27 16:27       ` Mika Westerberg
2013-06-27 17:18         ` Yinghai Lu
2013-06-25 23:24 ` [PATCH 0/6] Thunderbolt workarounds take 2 Rafael J. Wysocki
2013-06-26  7:25   ` Mika Westerberg
2013-06-26 12:45     ` Rafael J. Wysocki
2013-06-26 19:48       ` Bjorn Helgaas
2013-06-26 20:01         ` Rafael J. Wysocki
2013-06-26 19:55           ` Bjorn Helgaas

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1372177330-28013-7-git-send-email-mika.westerberg@linux.intel.com \
    --to=mika.westerberg@linux.intel.com \
    --cc=bhelgaas@google.com \
    --cc=bruce.w.allan@intel.com \
    --cc=gregkh@linuxfoundation.org \
    --cc=heikki.krogerus@linux.intel.com \
    --cc=jbarnes@virtuousgeek.org \
    --cc=john.ronciak@intel.com \
    --cc=kirill.shutemov@linux.intel.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=miles.j.penner@intel.com \
    --cc=rafael.j.wysocki@intel.com \
    --cc=x86@kernel.org \
    --cc=yinghai@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).