From: Wei Yang <weiyang@linux.vnet.ibm.com>
To: linux-pci@vger.kernel.org
Cc: weiyang@linux.vnet.ibm.com, linuxram@us.ibm.com,
shangw@linux.vnet.ibm.com
Subject: [PATCH 4/4] PCI: fix the io resource alignment calculation in pbus_size_io()
Date: Mon, 1 Jul 2013 23:10:32 +0800 [thread overview]
Message-ID: <1372691432-6440-5-git-send-email-weiyang@linux.vnet.ibm.com> (raw)
In-Reply-To: <1372691432-6440-1-git-send-email-weiyang@linux.vnet.ibm.com>
In commit 462d9303 ("PCI: Align P2P windows using pcibios_window_alignment()"),
it introduce a new method to calculate the window alignment of P2P bridge.
When the io_window_1k is set, the calculation for the io resource alignment
is different from the original one. In the original logic before 462d9303,
the alignment is no bigger than 4K even the io_window_1k is set. The logic
introduced in 462d9303 will limit the alignment to 1k in this case.
This patch fix this issue.
Signed-off-by: Wei Yang <weiyang@linux.vnet.ibm.com>
Reviewed-by: Gavin Shan <shangw@linux.vnet.ibm.com>
Reviewed-by: Ram Pai <linuxram@us.ibm.com>
---
drivers/pci/setup-bus.c | 4 ++++
1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c
index bd0ce39d..5c60ca0 100644
--- a/drivers/pci/setup-bus.c
+++ b/drivers/pci/setup-bus.c
@@ -755,6 +755,10 @@ static void pbus_size_io(struct pci_bus *bus, resource_size_t min_size,
return;
io_align = min_align = window_alignment(bus, IORESOURCE_IO);
+ /* Don't exceed 4KiB for windows requesting 1KiB alignment */
+ if (bus->self->io_window_1k && io_align == PCI_P2P_DEFAULT_IO_ALIGN_1K)
+ io_align = PCI_P2P_DEFAULT_IO_ALIGN;
+
list_for_each_entry(dev, &bus->devices, bus_list) {
int i;
--
1.7.5.4
next prev parent reply other threads:[~2013-07-01 15:11 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-07-01 15:10 [PATCH 0/4] optimization/fix/cleanup in pci_assign_unassigned_resources Wei Yang
2013-07-01 15:10 ` [PATCH 1/4] PCI: optimize pci_bus_get_depth() by enumerating on pci bus hierachy Wei Yang
2013-07-08 20:46 ` Bjorn Helgaas
2013-07-09 2:38 ` Wei Yang
2013-07-09 19:27 ` Bjorn Helgaas
2013-07-10 1:36 ` Wei Yang
2013-07-01 15:10 ` [PATCH 2/4] PCI: add comment for pbus_size_mem() parameter Wei Yang
2013-07-01 15:10 ` [PATCH 3/4] PCI: trivial cleanup in pbus_size_io() Wei Yang
2013-07-01 15:10 ` Wei Yang [this message]
2013-07-08 21:15 ` [PATCH 4/4] PCI: fix the io resource alignment calculation " Bjorn Helgaas
2013-07-09 3:20 ` Wei Yang
2013-07-09 17:38 ` Bjorn Helgaas
2013-07-10 1:34 ` Wei Yang
2013-07-19 3:10 ` Wei Yang
2013-07-25 21:22 ` Bjorn Helgaas
[not found] ` <20130701231040.GA8174@shangw.(null)>
[not found] ` <20130701231540.GA15263@shangw.(null)>
2013-07-02 1:51 ` [PATCH 0/4] optimization/fix/cleanup in pci_assign_unassigned_resources Wei Yang
2013-07-04 1:15 ` Wei Yang
-- strict thread matches above, loose matches on Subject: below --
2013-08-02 9:31 Wei Yang
2013-08-02 9:31 ` [PATCH 4/4] PCI: fix the io resource alignment calculation in pbus_size_io() Wei Yang
2013-08-02 22:51 ` Bjorn Helgaas
2013-08-05 17:58 ` Bjorn Helgaas
2013-08-05 19:05 ` Yinghai Lu
2013-08-05 19:51 ` Bjorn Helgaas
2013-08-05 20:52 ` Yinghai Lu
2013-08-05 20:59 ` Bjorn Helgaas
2013-08-05 21:09 ` Yinghai Lu
2013-08-05 22:21 ` Bjorn Helgaas
2013-08-06 6:15 ` Wei Yang
2013-08-06 13:39 ` Bjorn Helgaas
2013-08-06 15:34 ` Wei Yang
2013-08-06 17:58 ` Bjorn Helgaas
2013-08-07 2:01 ` Wei Yang
[not found] ` <20130806032227.GA7736@shangw.(null)>
2013-08-06 6:26 ` Wei Yang
2013-08-06 13:42 ` Bjorn Helgaas
[not found] ` <52006bfc.6a5d3c0a.2753.ffffa6b7SMTPIN_ADDED_BROKEN@mx.google.com>
2013-08-06 13:35 ` Bjorn Helgaas
2013-08-06 6:19 ` Wei Yang
2013-08-06 13:44 ` Bjorn Helgaas
2013-08-06 15:47 ` Wei Yang
2013-08-06 18:01 ` Bjorn Helgaas
2013-08-06 20:56 ` Bjorn Helgaas
2013-08-07 2:01 ` Wei Yang
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