From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
To: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Cc: Russell King <linux@arm.linux.org.uk>,
Jason Cooper <jason@lakedaemon.net>, Andrew Lunn <andrew@lunn.ch>,
Bjorn Helgaas <bhelgaas@google.com>,
Thomas Petazzoni <thomas.petazzoni@free-electrons.com>,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org
Subject: [PATCH 1/9] PCI: mvebu: move clock enable before register access
Date: Mon, 12 Aug 2013 20:46:47 +0200 [thread overview]
Message-ID: <1376333215-12885-2-git-send-email-sebastian.hesselbarth@gmail.com> (raw)
In-Reply-To: <1376333215-12885-1-git-send-email-sebastian.hesselbarth@gmail.com>
The clock passed to PCI controller found on MVEBU SoCs may come from a
clock gate. This requires the clock to be enabled before any registers
are accessed. Therefore, move the clock enable before register iomap to
ensure it is enabled.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
---
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: linux-kernel@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-pci@vger.kernel.org
---
drivers/pci/host/pci-mvebu.c | 23 ++++++++++-------------
1 file changed, 10 insertions(+), 13 deletions(-)
diff --git a/drivers/pci/host/pci-mvebu.c b/drivers/pci/host/pci-mvebu.c
index 6aa0daf..d5fe674 100644
--- a/drivers/pci/host/pci-mvebu.c
+++ b/drivers/pci/host/pci-mvebu.c
@@ -897,6 +897,16 @@ static int __init mvebu_pcie_probe(struct platform_device *pdev)
continue;
}
+ port->clk = of_clk_get_by_name(child, NULL);
+ if (IS_ERR(port->clk)) {
+ dev_err(&pdev->dev, "PCIe%d.%d: cannot get clock\n",
+ port->port, port->lane);
+ iounmap(port->base);
+ port->haslink = 0;
+ continue;
+ }
+ clk_prepare_enable(port->clk);
+
port->base = mvebu_pcie_map_registers(pdev, child, port);
if (!port->base) {
dev_err(&pdev->dev, "PCIe%d.%d: cannot map registers\n",
@@ -916,22 +926,9 @@ static int __init mvebu_pcie_probe(struct platform_device *pdev)
port->port, port->lane);
}
- port->clk = of_clk_get_by_name(child, NULL);
- if (IS_ERR(port->clk)) {
- dev_err(&pdev->dev, "PCIe%d.%d: cannot get clock\n",
- port->port, port->lane);
- iounmap(port->base);
- port->haslink = 0;
- continue;
- }
-
port->dn = child;
-
- clk_prepare_enable(port->clk);
spin_lock_init(&port->conf_lock);
-
mvebu_sw_pci_bridge_init(port);
-
i++;
}
--
1.7.10.4
next prev parent reply other threads:[~2013-08-12 18:46 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-08-12 18:46 [PATCH 0/9] ARM: dove: DT PCIe support Sebastian Hesselbarth
2013-08-12 18:46 ` Sebastian Hesselbarth [this message]
2013-08-13 7:11 ` [PATCH 1/9] PCI: mvebu: move clock enable before register access Thomas Petazzoni
2013-08-13 9:22 ` Sebastian Hesselbarth
2013-08-13 7:58 ` Thierry Reding
2013-08-12 18:46 ` [PATCH 2/9] PCI: mvebu: increment nports only for registered ports Sebastian Hesselbarth
2013-08-13 7:15 ` Thomas Petazzoni
2013-08-13 9:23 ` Sebastian Hesselbarth
2013-08-12 18:46 ` [PATCH 3/9] PCI: mvebu: remove subsys_initcall Sebastian Hesselbarth
2013-08-13 7:19 ` Thomas Petazzoni
2013-08-13 8:06 ` Thierry Reding
2013-08-13 9:25 ` Sebastian Hesselbarth
2013-08-12 18:46 ` [PATCH 4/9] PCI: mvebu: add support for reset on GPIO Sebastian Hesselbarth
2013-08-13 0:56 ` Kumar Gala
2013-08-13 9:19 ` Sebastian Hesselbarth
2013-08-13 8:09 ` Thierry Reding
2013-08-13 8:30 ` Thomas Petazzoni
2013-08-13 9:59 ` Sascha Hauer
2013-08-13 10:03 ` Thierry Reding
2013-08-13 10:40 ` Sebastian Hesselbarth
2013-08-13 10:59 ` Philipp Zabel
2013-08-12 18:46 ` [PATCH 5/9] PCI: mvebu: add support for Marvell Dove SoCs Sebastian Hesselbarth
2013-08-12 20:54 ` [PATCH 0/9] ARM: dove: DT PCIe support Bjorn Helgaas
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