linux-pci.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Guo Chao <yan@linux.vnet.ibm.com>
To: linux-pci@vger.kernel.org
Cc: bhelgaas@google.com, yinghai@kernel.org
Subject: [RFC PATCH 3/3] PCI: do not reset bridge's IORESOURCE_MEM_64 flag for ROM BAR
Date: Tue, 19 Nov 2013 14:36:58 +0800	[thread overview]
Message-ID: <1384843018-9479-4-git-send-email-yan@linux.vnet.ibm.com> (raw)
In-Reply-To: <1384843018-9479-1-git-send-email-yan@linux.vnet.ibm.com>

If 32-bit prefetchable BARs detected, the prefetchable resource's
IORESOURCE_MEM_64 flag of its upstream bridge will be reset. This in
turn causes all upstream bridges up to the root bridge have their
IORESOURCE_MEM_64 reset. If prefetchable windows in a system located
above 4G, then they are never used for the sake of 32-bit prefetchable BAR.

Desert 64-bit prefetchable windows for ROM BAR seems unreasonable.
Just don't reset bridge's IORESOURCE_MEM_64 flag in case of ROM BARs.
They will fail to get address from 4G-above prefetchable window and
fall back to non-prefetchable window within 4G.

Signed-off-by: Guo Chao <yan@linux.vnet.ibm.com>
---
 drivers/pci/setup-bus.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c
index 4ce83b2..e9006b9 100644
--- a/drivers/pci/setup-bus.c
+++ b/drivers/pci/setup-bus.c
@@ -974,7 +974,8 @@ static int pbus_size_mem(struct pci_bus *bus, unsigned long mask,
 				aligns[order] += align;
 			if (order > max_order)
 				max_order = order;
-			mem64_mask &= r->flags & IORESOURCE_MEM_64;
+			if (i != PCI_ROM_RESOURCE)
+				mem64_mask &= r->flags & IORESOURCE_MEM_64;
 
 			if (realloc_head)
 				children_add_size += get_res_add_size(realloc_head, r);
-- 
1.8.3.2


      parent reply	other threads:[~2013-11-19  6:37 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-11-19  6:36 [RFC PATCH 0/3] Make 64-bit prefetchable MMIO work Guo Chao
2013-11-19  6:36 ` [RFC PATCH 1/3] PCI: do not compare CPU address with PCI address Guo Chao
2013-11-19 19:31   ` Yinghai Lu
2013-11-19 19:35     ` Yinghai Lu
2013-11-19 23:48     ` Bjorn Helgaas
2013-11-19  6:36 ` [RFC PATCH 2/3] PCI: set proper default value of PCIBIOS_MAX_MEM_32 Guo Chao
2013-11-19  6:36 ` Guo Chao [this message]

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1384843018-9479-4-git-send-email-yan@linux.vnet.ibm.com \
    --to=yan@linux.vnet.ibm.com \
    --cc=bhelgaas@google.com \
    --cc=linux-pci@vger.kernel.org \
    --cc=yinghai@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).