Re: [net-next] pci_regs.h: Add PCI bus link speed and width defines

[Jeff Kirsher <jeffrey.t.kirsher@intel.com>]

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On Fri, 2014-01-03 at 19:30 -0500, David Miller wrote:
> From: Bjorn Helgaas <bhelgaas@google.com>
> Date: Fri, 3 Jan 2014 17:00:42 -0700
> 
> > On Fri, Jan 3, 2014 at 4:56 PM, David Miller <davem@davemloft.net> wrote:
> >> From: Bjorn Helgaas <bhelgaas@google.com>
> >> Date: Fri, 3 Jan 2014 15:15:57 -0700
> >>
> >>> However, I do raise my eyebrows a bit at drivers that poke around in
> >>> the PCIe capability.  I would prefer to have PCI core interfaces that
> >>> handle that instead.  But I haven't seen Jeff's changes yet.
> >>
> >> The changes just read the link status to interpret the speed at which
> >> the PCI-E link is running at.
> > 
> > Several drivers want to do that.  It'd be nice if somebody abstracted
> > that out somehow.  Jacob added pcie_get_minimum_link() which is
> > similar.  But maybe Jeff needs something more in this case.
> > 
> > In any case, it's not a blocker for this patch.
> 
> Ok.
> 
> Jeff, please merge this via the Intel submission process and don't forget
> to add Bjorn's ACK.
> 
> Thanks.

Ok, will do.  What do you want to do with the current series of patches
(mainly the ixgbe LER patches) on my tree?  I know that there is a
thread going on between Joe Perches and Mark, but it sounded like Mark
is working on a follow-on patch to address Joe's concerns.

Guess I want to know if I leave my tree alone for you to pull or toss
the current pull request series and get the i40e series applied.

Cheers,
Jeff

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